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authorRong Chang <rongchang@chromium.org>2015-09-07 15:46:05 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-09-14 00:48:39 -0700
commit2eabf6fe8cffdd2c1e125344aa1692fab6795759 (patch)
tree96d0657ed25bb4344f9a08e1035405de5699ba54
parentea6c69c8392a3756c4f74ea23ab15db3ad263bbe (diff)
downloadchrome-ec-2eabf6fe8cffdd2c1e125344aa1692fab6795759.tar.gz
oak_pd: tcpm_power_status: Update power status on init
Oak board relies on TCPCI power status. When board init, PD should update it's VBUS status and TCPM needs to get power status after enable TCPC power status mask. BRANCH=none BUG=chrome-os-partner:44952 TEST=manual build and load on oak, disconnect battery. power on system with zinger, and check PD state. Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: Ic0d4b50d38ac39ff31b3a257c4b3b5dde0ebda4b Reviewed-on: https://chromium-review.googlesource.com/297871 Reviewed-by: Alec Berg <alecaberg@chromium.org>
-rw-r--r--common/usb_pd_tcpc.c47
-rw-r--r--driver/tcpm/tcpci.c58
2 files changed, 61 insertions, 44 deletions
diff --git a/common/usb_pd_tcpc.c b/common/usb_pd_tcpc.c
index 5c42640d5b..88d4996844 100644
--- a/common/usb_pd_tcpc.c
+++ b/common/usb_pd_tcpc.c
@@ -744,25 +744,6 @@ static void alert(int port, int mask)
tcpc_alert(port);
}
-void tcpc_init(int port)
-{
- int i;
-
- /* Initialize physical layer */
- pd_hw_init(port, PD_ROLE_DEFAULT);
- pd[port].cc_pull = PD_ROLE_DEFAULT == PD_ROLE_SOURCE ? TYPEC_CC_RP :
- TYPEC_CC_RD;
-
- /* make sure PD monitoring is disabled initially */
- pd[port].rx_enabled = 0;
-
- /* make initial readings of CC voltages */
- for (i = 0; i < 2; i++) {
- pd[port].cc_status[i] = cc_voltage_to_status(port,
- pd_adc_read(port, i));
- }
-}
-
int tcpc_run(int port, int evt)
{
int cc, i, res;
@@ -1037,6 +1018,34 @@ int tcpc_get_message(int port, uint32_t *payload, int *head)
return EC_SUCCESS;
}
+void tcpc_init(int port)
+{
+ int i;
+
+ /* Initialize physical layer */
+ pd_hw_init(port, PD_ROLE_DEFAULT);
+ pd[port].cc_pull = PD_ROLE_DEFAULT == PD_ROLE_SOURCE ? TYPEC_CC_RP :
+ TYPEC_CC_RD;
+
+ /* make sure PD monitoring is disabled initially */
+ pd[port].rx_enabled = 0;
+
+ /* make initial readings of CC voltages */
+ for (i = 0; i < 2; i++) {
+ pd[port].cc_status[i] = cc_voltage_to_status(port,
+ pd_adc_read(port, i));
+ }
+
+#ifdef CONFIG_USB_PD_TCPM_VBUS
+#if CONFIG_USB_PD_PORT_COUNT >= 2
+ tcpc_set_power_status(port, !gpio_get_level(port ?
+ GPIO_USB_C1_VBUS_WAKE_L :
+ GPIO_USB_C0_VBUS_WAKE_L));
+#else
+ tcpc_set_power_status(port, !gpio_get_level(GPIO_USB_C0_VBUS_WAKE_L));
+#endif /* CONFIG_USB_PD_PORT_COUNT >= 2 */
+#endif /* CONFIG_USB_PD_TCPM_VBUS */
+}
#ifdef CONFIG_USB_PD_TCPM_VBUS
void pd_vbus_evt_p0(enum gpio_signal signal)
diff --git a/driver/tcpm/tcpci.c b/driver/tcpm/tcpci.c
index 939ab9ccf2..926a1dda1b 100644
--- a/driver/tcpm/tcpci.c
+++ b/driver/tcpm/tcpci.c
@@ -55,31 +55,6 @@ static int init_power_status_mask(int port)
}
#endif
-int tcpm_init(int port)
-{
- int rv, err = 0;
-
- while (1) {
- rv = i2c_read16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
- TCPC_REG_ERROR_STATUS, &err);
- /*
- * If i2c succeeds and the uninitialized bit is clear, then
- * initalization is complete, clear all alert bits and write
- * the initial alert mask.
- */
- if (rv == EC_SUCCESS && !(err & TCPC_REG_ERROR_STATUS_UNINIT)) {
- i2c_write16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
- TCPC_REG_ALERT, 0xff);
-#ifdef CONFIG_USB_PD_TCPM_VBUS
- /* Initialize power_status_mask */
- init_power_status_mask(port);
-#endif
- return init_alert_mask(port);
- }
- msleep(10);
- }
-}
-
int tcpm_get_cc(int port, int *cc1, int *cc2)
{
int status;
@@ -294,3 +269,36 @@ void tcpc_alert(int port)
TCPC_TX_COMPLETE_FAILED);
}
}
+
+int tcpm_init(int port)
+{
+ int rv, err = 0;
+#ifdef CONFIG_USB_PD_TCPM_VBUS
+ int power_status;
+#endif
+
+ while (1) {
+ rv = i2c_read16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
+ TCPC_REG_ERROR_STATUS, &err);
+ /*
+ * If i2c succeeds and the uninitialized bit is clear, then
+ * initalization is complete, clear all alert bits and write
+ * the initial alert mask.
+ */
+ if (rv == EC_SUCCESS && !(err & TCPC_REG_ERROR_STATUS_UNINIT)) {
+ i2c_write16(I2C_PORT_TCPC, I2C_ADDR_TCPC(port),
+ TCPC_REG_ALERT, 0xff);
+#ifdef CONFIG_USB_PD_TCPM_VBUS
+ /* Initialize power_status_mask */
+ init_power_status_mask(port);
+ /* Read Power Status register */
+ tcpm_get_power_status(port, &power_status);
+ /* Update VBUS status */
+ tcpc_vbus[port] = power_status &
+ TCPC_REG_POWER_VBUS_PRES ? 1 : 0;
+#endif
+ return init_alert_mask(port);
+ }
+ msleep(10);
+ }
+}