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author | Caveh Jalali <caveh@chromium.org> | 2021-06-02 00:46:44 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-06-03 04:22:04 +0000 |
commit | 300a9a70b84f0e4275c8d18ac2de7857a9888094 (patch) | |
tree | 9d4ca134d4ee56ed1d90e1a7fb21e9ab7448fa77 | |
parent | d7b562f6117ff985cbfc17f5e3e41acf45fc65ba (diff) | |
download | chrome-ec-300a9a70b84f0e4275c8d18ac2de7857a9888094.tar.gz |
COIL: Remove CONFIG_SPI_MASTER_NO_CS_GPIOS
This removes the CONFIG_SPI_MASTER_NO_CS_GPIOS config option as no code
actually uses it.
BRANCH=none
BUG=b:181607131
TEST=make buildall passes;
"compare_build.sh -b all" shows no difference
Change-Id: Iab1c7a79ee0ad973605c768f87ad8e19ed6ef4e7
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932470
-rw-r--r-- | include/config.h | 4 | ||||
-rw-r--r-- | util/config_allowed.txt | 1 |
2 files changed, 0 insertions, 5 deletions
diff --git a/include/config.h b/include/config.h index 193f4c52cb..4c5e6bfa9b 100644 --- a/include/config.h +++ b/include/config.h @@ -3653,10 +3653,6 @@ /* Support STM32 SPI1 as master. */ #undef CONFIG_STM32_SPI1_MASTER -/* Support SPI masters without GPIO-specified Chip Selects, instead rely on the - * SPI master port's hardwired CS pin. */ -#undef CONFIG_SPI_MASTER_NO_CS_GPIOS - /* Support MCHP MEC family GP-SPI master(s) * Define to 0x01 for GPSPI0 only. * Define to 0x02 for GPSPI1 only. diff --git a/util/config_allowed.txt b/util/config_allowed.txt index 00b6fa43a6..d9e725dc0c 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -872,7 +872,6 @@ CONFIG_SPI_FLASH_W25X40 CONFIG_SPI_FP_PORT CONFIG_SPI_HALFDUPLEX CONFIG_SPI_MASTER -CONFIG_SPI_MASTER_NO_CS_GPIOS CONFIG_SPI_NOR CONFIG_SPI_NOR_BLOCK_ERASE CONFIG_SPI_NOR_DEBUG |