diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2017-05-30 21:15:06 +0200 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-06-02 10:38:57 -0700 |
| commit | 5479dcbbc515482494fc6e4bbce2124c428b1f2a (patch) | |
| tree | 5bba9f11554ac3cba9a2767e367b820ebc15a35f | |
| parent | 5babc4f3590b46f549cd6ba86c7e8040915fb577 (diff) | |
| download | chrome-ec-5479dcbbc515482494fc6e4bbce2124c428b1f2a.tar.gz | |
cr50: configure flash counter
Add the robust non-volatile counter provided by CONFIG_FLASH_NVCOUNTER
in order to support the U2F implementation.
The counter implementation needs 2 (raw) pages of flash for its
underlying storage.
In order to try to avoid disrupting the existing machines by
invalidating the nvmem if we touch its mapping, those pages are placed
in each RW between the code/read-only and the read-write nvmem area by
shrinking the code/read-only by one page, so the nvmem mapping should be
untouched.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=cr50
BUG=b:35545754
TEST=with follow-up CLs, run U2FTest on Eve.
Change-Id: Ib3d7dcb9a1b13cff74b56461332937e3a4cc9ae1
Reviewed-on: https://chromium-review.googlesource.com/518137
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/board.c | 8 | ||||
| -rw-r--r-- | board/cr50/board.h | 15 | ||||
| -rw-r--r-- | chip/g/config_chip.h | 2 |
3 files changed, 16 insertions, 9 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c index 408cd55c9e..ea057f4a36 100644 --- a/board/cr50/board.c +++ b/board/cr50/board.c @@ -647,14 +647,14 @@ int flash_regions_to_enable(struct g_flash_region *regions, /* Enable access to the NVRAM partition A region */ regions[1].reg_base = CONFIG_MAPPED_STORAGE_BASE + - CONFIG_FLASH_NVMEM_OFFSET_A; - regions[1].reg_size = NVMEM_PARTITION_SIZE; + CFG_TOP_A_OFF; + regions[1].reg_size = CFG_TOP_SIZE; regions[1].reg_perms = FLASH_REGION_EN_ALL; /* Enable access to the NVRAM partition B region */ regions[2].reg_base = CONFIG_MAPPED_STORAGE_BASE + - CONFIG_FLASH_NVMEM_OFFSET_B; - regions[2].reg_size = NVMEM_PARTITION_SIZE; + CFG_TOP_B_OFF; + regions[2].reg_size = CFG_TOP_SIZE; regions[2].reg_perms = FLASH_REGION_EN_ALL; return 3; diff --git a/board/cr50/board.h b/board/cr50/board.h index 53411170de..d21951a457 100644 --- a/board/cr50/board.h +++ b/board/cr50/board.h @@ -43,20 +43,27 @@ #define CONFIG_CRC8 +/* Non-volatile counter storage for U2F */ +#define CONFIG_FLASH_NVCOUNTER +#define CONFIG_FLASH_NVCTR_SIZE CONFIG_FLASH_BANK_SIZE +#define CONFIG_FLASH_NVCTR_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ + CFG_TOP_A_OFF) +#define CONFIG_FLASH_NVCTR_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \ + CFG_TOP_B_OFF) /* We're using TOP_A for partition 0, TOP_B for partition 1 */ #define CONFIG_FLASH_NVMEM /* Offset to start of NvMem area from base of flash */ -#define CONFIG_FLASH_NVMEM_OFFSET_A (CFG_TOP_A_OFF) -#define CONFIG_FLASH_NVMEM_OFFSET_B (CFG_TOP_B_OFF) +#define CONFIG_FLASH_NVMEM_OFFSET_A (CFG_TOP_A_OFF + CONFIG_FLASH_NVCTR_SIZE) +#define CONFIG_FLASH_NVMEM_OFFSET_B (CFG_TOP_B_OFF + CONFIG_FLASH_NVCTR_SIZE) /* Address of start of Nvmem area */ #define CONFIG_FLASH_NVMEM_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ CONFIG_FLASH_NVMEM_OFFSET_A) #define CONFIG_FLASH_NVMEM_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \ CONFIG_FLASH_NVMEM_OFFSET_B) /* Size partition in NvMem */ -#define NVMEM_PARTITION_SIZE CFG_TOP_SIZE +#define NVMEM_PARTITION_SIZE (CFG_TOP_SIZE - CONFIG_FLASH_NVCTR_SIZE) /* Size in bytes of NvMem area */ -#define CONFIG_FLASH_NVMEM_SIZE (CFG_TOP_SIZE * NVMEM_NUM_PARTITIONS) +#define CONFIG_FLASH_NVMEM_SIZE (NVMEM_PARTITION_SIZE * NVMEM_NUM_PARTITIONS) /* Enable <key, value> variable support. */ #define CONFIG_FLASH_NVMEM_VARS #define NVMEM_CR50_SIZE 272 diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h index 838f38f812..bfcd912914 100644 --- a/chip/g/config_chip.h +++ b/chip/g/config_chip.h @@ -95,7 +95,7 @@ * use these two areas for the same thing, it's just more convenient to make * them the same size. */ -#define CFG_TOP_SIZE 0x3000 +#define CFG_TOP_SIZE 0x3800 #define CFG_TOP_A_OFF (CFG_FLASH_HALF - CFG_TOP_SIZE) #define CFG_TOP_B_OFF (CONFIG_FLASH_SIZE - CFG_TOP_SIZE) |