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authorTom Hughes <tomhughes@chromium.org>2019-12-17 12:08:43 -0800
committerCommit Bot <commit-bot@chromium.org>2020-01-03 18:48:29 +0000
commit573438d53ff64c18ee2e1a94cecefb2ff4511784 (patch)
tree9fc72e37b78a5c714c18b0668c845e5469f8bea9
parentef46fe6bb507eabc0810d512fbfef490132e9e36 (diff)
downloadchrome-ec-573438d53ff64c18ee2e1a94cecefb2ff4511784.tar.gz
bloonchipper: Update GPIOs for Hatch 3.0 design
Based on the following schematics: https://ee-schematics.teams.x20web.corp.google.com/hatch/hatch_p0/hatch_p0_499d1e339869c92d67ea9077ba35b66a6c103e1c.html BRANCH=none BUG=b:145847137 TEST=none Change-Id: I29c5ec5abb9bdf7650c5a1eb190309c6ea85bfce Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1972376 Commit-Queue: Craig Hesling <hesling@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
-rw-r--r--board/hatch_fp/gpio.inc16
1 files changed, 9 insertions, 7 deletions
diff --git a/board/hatch_fp/gpio.inc b/board/hatch_fp/gpio.inc
index bb6b345500..07b6fcdcbf 100644
--- a/board/hatch_fp/gpio.inc
+++ b/board/hatch_fp/gpio.inc
@@ -6,19 +6,20 @@
/* Interrupts */
GPIO_INT(FPS_INT, PIN(A, 0), GPIO_INT_RISING, fps_event)
-GPIO_INT(PCH_SLP_S0_L, PIN(A, 3), GPIO_INT_BOTH, slp_event)
+GPIO_INT(PCH_SLP_S0_L, PIN(A, 8), GPIO_INT_BOTH, slp_event)
GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event)
+GPIO_INT(PCH_SLP_S3_L, PIN(B, 6), GPIO_INT_BOTH, slp_event)
-GPIO_INT(PCH_SLP_S3_L, PIN(B, 1), GPIO_INT_BOTH, slp_event)
-GPIO(PCH_SLP_S4_L, PIN(B, 2), GPIO_INPUT)
-GPIO(PCH_SLP_SUS_L, PIN(B, 5), GPIO_INPUT)
-
+/* Inputs */
+GPIO(FP_SENSOR_SEL, PIN(B, 0), GPIO_INPUT)
+GPIO(TRANSPORT_SEL, PIN(B, 1), GPIO_INPUT)
GPIO(WP, PIN(B, 7), GPIO_INPUT)
/* Outputs */
GPIO(EC_INT_L, PIN(A, 1), GPIO_OUT_HIGH)
GPIO(FP_RST_ODL, PIN(B,10), GPIO_OUT_HIGH)
GPIO(SPI2_NSS, PIN(B,12), GPIO_OUT_HIGH)
+GPIO(DIVIDER_HIGHSIDE, PIN(B, 8), GPIO_OUT_LOW)
GPIO(USER_PRES_L, PIN(B, 9), GPIO_ODR_HIGH)
/*
@@ -28,8 +29,9 @@ GPIO(USER_PRES_L, PIN(B, 9), GPIO_ODR_HIGH)
* ("AN4365") section 1.2.6 and STM32F412 reference manual section 7.3.12.
*/
UNUSED(PIN(A, 2))
-UNUSED(PIN(A, 8))
-UNUSED(PIN(B, 0))
+UNUSED(PIN(A, 3))
+UNUSED(PIN(B, 2))
+UNUSED(PIN(B, 5))
UNUSED(PIN(C, 13))
UNUSED(PIN(C, 14))
UNUSED(PIN(C, 15))