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authorJun Lin <CHLin56@nuvoton.com>2022-01-06 17:01:49 +0800
committerCommit Bot <commit-bot@chromium.org>2022-01-24 04:57:38 +0000
commit604729509a6fa169dba2cfcfb0d6215983bd63e0 (patch)
treee4cc531d6241330d8886ae5c18f8d262a5e519d9
parent3c44ab6ede22417db89cc2831f2f3d3872d07a16 (diff)
downloadchrome-ec-604729509a6fa169dba2cfcfb0d6215983bd63e0.tar.gz
npcx: gpio: add a new guard to KSI's GPIO_INT
In npcx chips, KSI pins are muxed with GPIO pins. In the current gpio driver, the GPIO interrupt for these pins is enabled only when KEYSCAN task is not defined. However, this assumption is not true when the ADC anti-ghost feature is introduced. This CL adds a new guard for the GPIO_INT of KSIs. The board level driver can define this flag to override the default behavior. BRANCH=none BUG=b:213412432 TEST=pass "make buildall" Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I21b2278f3bcf4b8bc685f5c2d7a4a4a1a0b7705b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369175 Tested-by: Arthur Lin <arthur.lin@lcfc.corp-partner.google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: CH Lin <chlin56@nuvoton.com>
-rw-r--r--chip/npcx/config_chip.h4
-rw-r--r--chip/npcx/gpio-npcx5.c6
-rw-r--r--chip/npcx/gpio-npcx9.c6
-rw-r--r--chip/npcx/keyboard_raw.c2
4 files changed, 12 insertions, 6 deletions
diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h
index cee339206c..c397161e07 100644
--- a/chip/npcx/config_chip.h
+++ b/chip/npcx/config_chip.h
@@ -84,4 +84,8 @@
#define GPIO_PIN(port, index) GPIO_##port, BIT(index)
#define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m)
+#if !defined(HAS_TASK_KEYSCAN)
+#define NPCX_SELECT_KSI_TO_GPIO
+#endif
+
#endif /* __CROS_EC_CONFIG_CHIP_H */
diff --git a/chip/npcx/gpio-npcx5.c b/chip/npcx/gpio-npcx5.c
index 9412aa9d9f..6742f19369 100644
--- a/chip/npcx/gpio-npcx5.c
+++ b/chip/npcx/gpio-npcx5.c
@@ -29,7 +29,7 @@ static void gpio_init(void)
task_enable_irq(NPCX_IRQ_TWD_WKINTB_0);
task_enable_irq(NPCX_IRQ_WKINTA_1);
task_enable_irq(NPCX_IRQ_WKINTB_1);
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
task_enable_irq(NPCX_IRQ_KSI_WKINTC_1);
#endif
task_enable_irq(NPCX_IRQ_WKINTD_1);
@@ -156,7 +156,7 @@ GPIO_IRQ_FUNC(__gpio_wk0b_interrupt, WUI_INT(MIWU_TABLE_0, MIWU_GROUP_2));
GPIO_IRQ_FUNC(__gpio_wk0c_interrupt, WUI_INT(MIWU_TABLE_0, MIWU_GROUP_3));
GPIO_IRQ_FUNC(__gpio_wk1a_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_1));
GPIO_IRQ_FUNC(__gpio_wk1b_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_2));
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
/* Declare GPIO irq functions for KSI pins if there's no keyboard scan task, */
GPIO_IRQ_FUNC(__gpio_wk1c_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_3));
#endif
@@ -174,7 +174,7 @@ DECLARE_IRQ(NPCX_IRQ_WKINTC_0, __gpio_wk0c_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTEFGH_0, __gpio_wk0efgh_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTA_1, __gpio_wk1a_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTB_1, __gpio_wk1b_interrupt, 3);
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3);
#endif
DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3);
diff --git a/chip/npcx/gpio-npcx9.c b/chip/npcx/gpio-npcx9.c
index 31ed4e62ac..b567f1d1c8 100644
--- a/chip/npcx/gpio-npcx9.c
+++ b/chip/npcx/gpio-npcx9.c
@@ -34,7 +34,7 @@ static void gpio_init(void)
task_enable_irq(NPCX_IRQ_WKINTH_0);
task_enable_irq(NPCX_IRQ_WKINTA_1);
task_enable_irq(NPCX_IRQ_WKINTB_1);
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
task_enable_irq(NPCX_IRQ_KSI_WKINTC_1);
#endif
task_enable_irq(NPCX_IRQ_WKINTD_1);
@@ -171,7 +171,7 @@ GPIO_IRQ_FUNC(__gpio_wk0g_interrupt, WUI_INT(MIWU_TABLE_0, MIWU_GROUP_7));
GPIO_IRQ_FUNC(__gpio_wk0h_interrupt, WUI_INT(MIWU_TABLE_0, MIWU_GROUP_8));
GPIO_IRQ_FUNC(__gpio_wk1a_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_1));
GPIO_IRQ_FUNC(__gpio_wk1b_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_2));
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
/* Declare GPIO irq functions for KSI pins if there's no keyboard scan task, */
GPIO_IRQ_FUNC(__gpio_wk1c_interrupt, WUI_INT(MIWU_TABLE_1, MIWU_GROUP_3));
#endif
@@ -190,7 +190,7 @@ DECLARE_IRQ(NPCX_IRQ_WKINTG_0, __gpio_wk0g_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTH_0, __gpio_wk0h_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTA_1, __gpio_wk1a_interrupt, 3);
DECLARE_IRQ(NPCX_IRQ_WKINTB_1, __gpio_wk1b_interrupt, 3);
-#ifndef HAS_TASK_KEYSCAN
+#ifdef NPCX_SELECT_KSI_TO_GPIO
DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3);
#endif
DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3);
diff --git a/chip/npcx/keyboard_raw.c b/chip/npcx/keyboard_raw.c
index 4d0f76c994..acd40d9f10 100644
--- a/chip/npcx/keyboard_raw.c
+++ b/chip/npcx/keyboard_raw.c
@@ -138,6 +138,7 @@ test_mockable int keyboard_raw_read_rows(void)
return (~NPCX_KBSIN) & KB_ROW_MASK;
}
+#ifndef NPCX_SELECT_KSI_TO_GPIO
/**
* Enable or disable keyboard interrupts.
*/
@@ -161,6 +162,7 @@ static void keyboard_raw_interrupt(void)
task_wake(TASK_ID_KEYSCAN);
}
DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, keyboard_raw_interrupt, 5);
+#endif
int keyboard_raw_is_input_low(int port, int id)
{