diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:00:44 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-28 06:42:03 +0000 |
| commit | 664713ef1b6ac5e4195c42b29891119512f53b0b (patch) | |
| tree | 80d83a1fcd306e3b1a7704c2c8e70f9889d65400 | |
| parent | 375484eccfada0ed81d066aa2f47e805955a814e (diff) | |
| download | chrome-ec-664713ef1b6ac5e4195c42b29891119512f53b0b.tar.gz | |
board/primus/sensors.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I95f841a65ba81c81300853f300684dfd104fcd87
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728844
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| -rw-r--r-- | board/primus/sensors.c | 62 |
1 files changed, 26 insertions, 36 deletions
diff --git a/board/primus/sensors.c b/board/primus/sensors.c index 60cfa1428f..91878cebae 100644 --- a/board/primus/sensors.c +++ b/board/primus/sensors.c @@ -59,36 +59,26 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* Temperature sensor configuration */ const struct temp_sensor_t temp_sensors[] = { - [TEMP_SENSOR_1_DDR_SOC] = { - .name = "DDR and SOC", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_1_DDR_SOC - }, - [TEMP_SENSOR_2_SSD] = { - .name = "SSD", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_2_SSD - }, - [TEMP_SENSOR_3_CHARGER] = { - .name = "Charger", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_3_CHARGER - }, - [TEMP_SENSOR_4_MEMORY] = { - .name = "MEMORY", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_4_MEMORY - }, - [TEMP_SENSOR_5_USBC] = { - .name = "USBC", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_5_USBC - }, + [TEMP_SENSOR_1_DDR_SOC] = { .name = "DDR and SOC", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_1_DDR_SOC }, + [TEMP_SENSOR_2_SSD] = { .name = "SSD", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_2_SSD }, + [TEMP_SENSOR_3_CHARGER] = { .name = "Charger", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_3_CHARGER }, + [TEMP_SENSOR_4_MEMORY] = { .name = "MEMORY", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_4_MEMORY }, + [TEMP_SENSOR_5_USBC] = { .name = "USBC", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_5_USBC }, }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); @@ -102,8 +92,8 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_CPU \ - { \ +#define THERMAL_CPU \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ @@ -119,8 +109,8 @@ __maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_SSD \ - { \ +#define THERMAL_SSD \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ [EC_TEMP_THRESH_HALT] = C_TO_K(92), \ @@ -149,8 +139,8 @@ __maybe_unused static const struct ec_thermal_config thermal_ssd = THERMAL_SSD; /* * TODO(b/202062363): Remove when clang is fixed. */ -#define THERMAL_INDUCTOR \ - { \ +#define THERMAL_INDUCTOR \ + { \ .temp_host = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ |