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authorjohnwc_yeh <johnwc_yeh@compal.corp-partner.google.com>2022-05-06 17:23:21 +0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-05-11 02:09:02 +0000
commit74aa410552225b76686a451941acefe66c238626 (patch)
treeb50508577dc6c6253e73b67b7add9889c5cfe898
parent999b1a6384d259c1b8567e55dd8f84ed26854b82 (diff)
downloadchrome-ec-74aa410552225b76686a451941acefe66c238626.tar.gz
mithrax: Initial EC image
Copy the Felwinter reference board EC files into a new directory name for the Mithrax variant. (Copy from commit 60c5d955940500bd5c9ea29ed8814c2977adc266.) BUG=b:223091246 BRANCH=None TEST=make BOARD=mithrax Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: Ieea80fcf70f55e02755d32d065c90503a820d97c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3631847 Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com>
Diffstat
-rw-r--r--board/mithrax/battery.c66
-rw-r--r--board/mithrax/board.c152
-rw-r--r--board/mithrax/board.h108
-rw-r--r--board/mithrax/build.mk5
-rw-r--r--board/mithrax/charger_isl9241.c (renamed from board/mithrax/charger.c)9
-rw-r--r--board/mithrax/ec.tasklist6
-rw-r--r--board/mithrax/fans.c15
-rw-r--r--board/mithrax/fw_config.c30
-rw-r--r--board/mithrax/fw_config.h44
-rw-r--r--board/mithrax/generated-gpio.inc125
-rw-r--r--board/mithrax/gpio.inc182
-rw-r--r--board/mithrax/i2c.c40
-rw-r--r--board/mithrax/keyboard.c31
-rw-r--r--board/mithrax/led.c163
-rw-r--r--board/mithrax/pwm.c41
-rw-r--r--board/mithrax/sensors.c234
-rw-r--r--board/mithrax/tune_mp2964.c43
-rw-r--r--board/mithrax/usbc_config.c350
-rw-r--r--board/mithrax/usbc_config.h13
-rw-r--r--board/mithrax/vif_override.xml151
20 files changed, 642 insertions, 1166 deletions
diff --git a/board/mithrax/battery.c b/board/mithrax/battery.c
index 172365195e..08c129d118 100644
--- a/board/mithrax/battery.c
+++ b/board/mithrax/battery.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -6,10 +6,9 @@
*/
#include "battery_fuel_gauge.h"
-#include "cbi.h"
#include "common.h"
#include "compile_time_macros.h"
-#include "gpio.h"
+
/*
* Battery info for all Brya battery types. Note that the fields
* start_charging_min/max and charging_min/max are not used for the charger.
@@ -33,80 +32,35 @@
* address, mask, and disconnect value need to be provided.
*/
const struct board_batt_params board_battery_info[] = {
- /* POW-TECH GQA05 Battery Information */
- [BATTERY_POWER_TECH] = {
+ [BATTERY_C536] = {
/* BQ40Z50 Fuel Gauge */
.fuel_gauge = {
- .manuf_name = "POW-TECH",
- .device_name = "BATGQA05L22",
+ .manuf_name = "AS3GXAE3jB",
+ .device_name = "C536-49",
.ship_mode = {
.reg_addr = 0x00,
.reg_data = { 0x0010, 0x0010 },
},
.fet = {
- .mfgacc_support = 1,
.reg_addr = 0x00,
.reg_mask = 0x2000, /* XDSG */
.disconnect_val = 0x2000,
}
},
.batt_info = {
- .voltage_max = TARGET_WITH_MARGIN(13050, 5),
- .voltage_normal = 11400, /* mV */
- .voltage_min = 9000, /* mV */
- .precharge_current = 280, /* mA */
- .start_charging_min_c = 0,
- .start_charging_max_c = 45,
- .charging_min_c = 0,
- .charging_max_c = 45,
- .discharging_min_c = -10,
- .discharging_max_c = 60,
- },
- },
- /* LGC L17L3PB0 Battery Information */
- /*
- * Battery info provided by ODM on b/143477210, comment #11
- */
- [BATTERY_LGC011] = {
- .fuel_gauge = {
- .manuf_name = "LGC",
- .ship_mode = {
- .reg_addr = 0x00,
- .reg_data = { 0x0010, 0x0010 },
- },
- .fet = {
- .reg_addr = 0x0,
- .reg_mask = 0x6000,
- .disconnect_val = 0x6000,
- }
- },
- .batt_info = {
- .voltage_max = TARGET_WITH_MARGIN(13200, 5),
- .voltage_normal = 11550, /* mV */
+ .voltage_max = 13200,
+ .voltage_normal = 11800, /* mV */
.voltage_min = 9000, /* mV */
.precharge_current = 256, /* mA */
.start_charging_min_c = 0,
.start_charging_max_c = 45,
.charging_min_c = 0,
.charging_max_c = 60,
- .discharging_min_c = 0,
- .discharging_max_c = 75,
+ .discharging_min_c = -20,
+ .discharging_max_c = 60,
},
},
};
BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
-const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH;
-
-enum battery_present battery_hw_present(void)
-{
- enum gpio_signal batt_pres;
-
- if (get_board_id() == 1)
- batt_pres = GPIO_ID_1_EC_BATT_PRES_ODL;
- else
- batt_pres = GPIO_EC_BATT_PRES_ODL;
-
- /* The GPIO is low when the battery is physically present */
- return gpio_get_level(batt_pres) ? BP_NO : BP_YES;
-}
+const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C536;
diff --git a/board/mithrax/board.c b/board/mithrax/board.c
index 4ca53ffa48..892c4d85bd 100644
--- a/board/mithrax/board.c
+++ b/board/mithrax/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -15,7 +15,6 @@
#include "hooks.h"
#include "driver/accel_lis2dw12.h"
#include "driver/accelgyro_lsm6dso.h"
-#include "driver/als_tcs3400.h"
#include "fw_config.h"
#include "hooks.h"
#include "lid_switch.h"
@@ -33,6 +32,16 @@
#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)
#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)
+/******************************************************************************/
+/* USB-A charging control */
+
+const int usb_port_enable[USB_PORT_COUNT] = {
+ GPIO_EN_PP5000_USBA_R,
+};
+BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT);
+
+/******************************************************************************/
+
__override void board_cbi_init(void)
{
config_usb_db_type();
@@ -42,11 +51,7 @@ __override void board_cbi_init(void)
static void board_chipset_resume(void)
{
/* Allow keyboard backlight to be enabled */
-
- if (get_board_id() == 1)
- gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 1);
- else
- gpio_set_level(GPIO_EC_KB_BL_EN_L, 0);
+ gpio_set_level(GPIO_EC_KB_BL_EN_L, 0);
}
DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
@@ -54,55 +59,114 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
static void board_chipset_suspend(void)
{
/* Turn off the keyboard backlight if it's on. */
-
- if (get_board_id() == 1)
- gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 0);
- else
- gpio_set_level(GPIO_EC_KB_BL_EN_L, 1);
+ gpio_set_level(GPIO_EC_KB_BL_EN_L, 1);
}
DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
+/* Called on AP S5 -> S3 transition */
+static void board_chipset_startup(void)
+{
+ pen_config();
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
+
+#ifdef CONFIG_CHARGE_RAMP_SW
+
/*
- * Explicitly apply the board ID 1 *gpio.inc settings to pins that
- * were reassigned on current boards.
+ * TODO(b/181508008): tune this threshold
*/
-static void set_board_id_1_gpios(void)
+#define BC12_MIN_VOLTAGE 4400
+
+/**
+ * Return true if VBUS is too low
+ */
+int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state)
{
- if (get_board_id() != 1)
- return;
+ int voltage;
+
+ if (charger_get_vbus_voltage(port, &voltage))
+ voltage = 0;
+
+ if (voltage == 0) {
+ CPRINTS("%s: must be disconnected", __func__);
+ return 1;
+ }
+
+ if (voltage < BC12_MIN_VOLTAGE) {
+ CPRINTS("%s: port %d: vbus %d lower than %d", __func__,
+ port, voltage, BC12_MIN_VOLTAGE);
+ return 1;
+ }
- gpio_set_flags(GPIO_ID_1_EC_KB_BL_EN, GPIO_OUT_LOW);
+ return 0;
}
-DECLARE_HOOK(HOOK_INIT, set_board_id_1_gpios, HOOK_PRIO_FIRST);
-/*
- * Reclaim GPIO pins on board ID 1 that are used as ADC inputs on
- * current boards. ALT function group MODULE_ADC pins are set in
- * HOOK_PRIO_INIT_ADC and can be reclaimed right after the hook runs.
- */
+#endif /* CONFIG_CHARGE_RAMP_SW */
+
+enum battery_present battery_hw_present(void)
+{
+ enum gpio_signal batt_pres;
+
+ batt_pres = GPIO_EC_BATT_PRES_ODL;
-static void board_id_1_reclaim_adc(void)
+ /* The GPIO is low when the battery is physically present */
+ return gpio_get_level(batt_pres) ? BP_NO : BP_YES;
+}
+
+static void board_init(void)
+{
+ if (ec_cfg_usb_db_type() == DB_USB4_NCT3807)
+ db_update_usb4_config_from_config();
+
+ if (ec_cfg_usb_mb_type() == MB_USB4_TBT)
+ mb_update_usb4_tbt_config_from_config();
+
+ if (ec_cfg_stylus() == STYLUS_PRSENT)
+ gpio_enable_interrupt(GPIO_PEN_DET_ODL);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+
+/**
+ * Deferred function to handle pen detect change
+ */
+static void pendetect_deferred(void)
{
- if (get_board_id() != 1)
+ static int debounced_pen_detect;
+ int pen_detect = !gpio_get_level(GPIO_PEN_DET_ODL);
+
+ if (pen_detect == debounced_pen_detect)
return;
- /*
- * GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL is on GPIO34
- *
- * The TCPC has already been reset by board_tcpc_init() executed
- * from HOOK_PRIO_INIT_CHIPSET. Later, the pin gets set to ADC6
- * in HOOK_PRIO_INIT_ADC, so we simply need to set the pin back
- * to GPIO34.
- */
- gpio_set_flags(GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL, GPIO_ODR_HIGH);
- gpio_set_alternate_function(GPIO_PORT_3, BIT(4), GPIO_ALT_FUNC_NONE);
-
- /*
- * The pin gets set to ADC7 in HOOK_PRIO_INIT_ADC, so we simply
- * need to set it back to GPIOE1.
- */
- gpio_set_flags(GPIO_ID_1_EC_BATT_PRES_ODL, GPIO_INPUT);
- gpio_set_alternate_function(GPIO_PORT_E, BIT(1), GPIO_ALT_FUNC_NONE);
+ debounced_pen_detect = pen_detect;
+
+ if (!chipset_in_state(CHIPSET_STATE_ANY_OFF))
+ gpio_set_level(GPIO_EN_PP5000_PEN, debounced_pen_detect);
+}
+DECLARE_DEFERRED(pendetect_deferred);
+DECLARE_HOOK(HOOK_INIT, pendetect_deferred, HOOK_PRIO_DEFAULT);
+
+void pen_detect_interrupt(enum gpio_signal s)
+{
+ /* Trigger deferred notification of pen detect change */
+ hook_call_deferred(&pendetect_deferred_data,
+ 500 * MSEC);
+}
+
+void pen_config(void)
+{
+ if (ec_cfg_stylus() == STYLUS_PRSENT) {
+ /* Make sure pen detection is triggered or not at resume */
+ if (!gpio_get_level(GPIO_PEN_DET_ODL))
+ gpio_set_level(GPIO_EN_PP5000_PEN, 1);
+ else
+ gpio_set_level(GPIO_EN_PP5000_PEN, 0);
+ }
+}
+
+static void board_chipset_shutdown(void)
+{
+ gpio_set_level(GPIO_EN_PP5000_PEN, 0);
}
-DECLARE_HOOK(HOOK_INIT, board_id_1_reclaim_adc, HOOK_PRIO_INIT_ADC + 1);
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
diff --git a/board/mithrax/board.h b/board/mithrax/board.h
index 27d467c6a5..d8bcd11705 100644
--- a/board/mithrax/board.h
+++ b/board/mithrax/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -10,11 +10,6 @@
#include "compile_time_macros.h"
-/*
- * Early brya boards are not set up for vivaldi
- */
-#undef CONFIG_KEYBOARD_VIVALDI
-
/* Baseboard features */
#include "baseboard.h"
@@ -27,29 +22,17 @@
#define CONFIG_MP2964
/* LED */
-#define CONFIG_LED_PWM
-#define CONFIG_LED_PWM_COUNT 2
-#undef CONFIG_LED_PWM_NEAR_FULL_COLOR
-#undef CONFIG_LED_PWM_SOC_ON_COLOR
-#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR
-#undef CONFIG_LED_PWM_LOW_BATT_COLOR
-#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE
-#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE
-#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE
-#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER
+#define CONFIG_LED_ONOFF_STATES
+#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10
+#define GPIO_PWR_LED_WHITE_L GPIO_LED_1_L
+#define GPIO_BAT_LED_AMBER_L GPIO_LED_3_L
+#define GPIO_BAT_LED_WHITE_L GPIO_LED_4_L
/* Sensors */
#define CONFIG_ACCELGYRO_LSM6DSO /* Base accel */
#define CONFIG_ACCEL_LSM6DSO_INT_EVENT \
TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL)
-/* TCS3400 ALS */
-#define CONFIG_ALS
-#define ALS_COUNT 1
-#define CONFIG_ALS_TCS3400
-#define CONFIG_ALS_TCS3400_INT_EVENT \
- TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS)
-
/* Enable sensor fifo, must also define the _SIZE and _THRES */
#define CONFIG_ACCEL_FIFO
/* FIFO size is in power of 2. */
@@ -58,9 +41,7 @@
#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
/* Sensors without hardware FIFO are in forced mode */
-#define CONFIG_ACCEL_FORCE_MODE_MASK \
- (BIT(LID_ACCEL) | BIT(CLEAR_ALS))
-
+#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL)
/* Lid accel */
#define CONFIG_LID_ANGLE
#define CONFIG_LID_ANGLE_UPDATE
@@ -86,20 +67,17 @@
#define CONFIG_IO_EXPANDER
#define CONFIG_IO_EXPANDER_NCT38XX
-#define CONFIG_IO_EXPANDER_PORT_COUNT 4
-
-#define CONFIG_USB_PD_FRS_PPC
+#define CONFIG_IO_EXPANDER_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_PS8815
-#define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID
#define CONFIG_USBC_RETIMER_INTEL_BB
-/* I2C speed console command */
-#define CONFIG_CMD_I2C_SPEED
-
/* I2C control host command */
#define CONFIG_HOSTCMD_I2C_CONTROL
+/* Disable console commands to help save space */
+#undef CONFIG_CMD_POWERINDEBUG
+
#define CONFIG_USBC_PPC_SYV682X
#define CONFIG_USBC_PPC_NX20P3483
@@ -112,8 +90,8 @@
* Passive USB-C cables only support up to 60W.
*/
#define PD_OPERATING_POWER_MW 15000
-#define PD_MAX_POWER_MW 60000
-#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_POWER_MW 65000
+#define PD_MAX_CURRENT_MA 3250
#define PD_MAX_VOLTAGE_MV 20000
/*
@@ -134,7 +112,7 @@
#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L
#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
-#define GPIO_TEMP_SENSOR_POWER GPIO_SEQ_EC_DSW_PWROK
+#define GPIO_TEMP_SENSOR_POWER GPIO_SEQ_EC_DSW_PWROK
/*
* GPIO_EC_PCH_INT_ODL is used for MKBP events as well as a PCH wakeup
@@ -150,8 +128,6 @@
#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL
#define GPIO_WP_L GPIO_EC_WP_ODL
-#define GPIO_ID_1_EC_KB_BL_EN GPIO_EC_BATT_PRES_ODL
-
/* System has back-lit keyboard */
#define CONFIG_PWM_KBLIGHT
@@ -159,16 +135,16 @@
#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0
-#define I2C_PORT_USB_C0_C2_TCPC NPCX_I2C_PORT1_0
+#define I2C_PORT_USB_C2_TCPC NPCX_I2C_PORT1_0
#define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1
-#define I2C_PORT_USB_C0_C2_PPC NPCX_I2C_PORT2_0
+#define I2C_PORT_USB_C2_PPC NPCX_I2C_PORT2_0
#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1
-#define I2C_PORT_USB_C0_C2_BC12 NPCX_I2C_PORT2_0
+#define I2C_PORT_USB_C2_BC12 NPCX_I2C_PORT2_0
#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1
-#define I2C_PORT_USB_C0_C2_MUX NPCX_I2C_PORT3_0
+#define I2C_PORT_USB_C2_MUX NPCX_I2C_PORT3_0
#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1
#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0
@@ -181,10 +157,10 @@
#define I2C_ADDR_MP2964_FLAGS 0x20
/*
- * see b/174768555#comment22
+ *
*/
-#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56
-#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57
+#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x56
+#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x58
/* Enabling Thunderbolt-compatible mode */
#define CONFIG_USB_PD_TBT_COMPAT_MODE
@@ -204,19 +180,12 @@
#define CONFIG_FANS FAN_CH_COUNT
/* Charger defines */
-#define CONFIG_CHARGER_BQ25720
-#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM
-#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70
+#define CONFIG_CHARGER_ISL9241
#define CONFIG_CHARGE_RAMP_SW
-#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10
-#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10
-#define CONFIG_CHARGER_BQ25710_PSYS_SENSING
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
-/*
- * Older boards have a different ADC assignment.
- */
-
-#define CONFIG_ADC_CHANNELS_RUNTIME_CONFIG
+#define CONFIG_KEYBOARD_REFRESH_ROW3
#ifndef __ASSEMBLER__
@@ -226,17 +195,15 @@
enum adc_channel {
ADC_TEMP_SENSOR_1_DDR_SOC,
- ADC_TEMP_SENSOR_2_AMBIENT,
+ ADC_TEMP_SENSOR_2_FAN,
ADC_TEMP_SENSOR_3_CHARGER,
- ADC_TEMP_SENSOR_4_WWAN,
ADC_CH_COUNT
};
enum temp_sensor_id {
TEMP_SENSOR_1_DDR_SOC,
- TEMP_SENSOR_2_AMBIENT,
+ TEMP_SENSOR_2_FAN,
TEMP_SENSOR_3_CHARGER,
- TEMP_SENSOR_4_WWAN,
TEMP_SENSOR_COUNT
};
@@ -244,32 +211,23 @@ enum sensor_id {
LID_ACCEL = 0,
BASE_ACCEL,
BASE_GYRO,
- CLEAR_ALS,
- RGB_ALS,
SENSOR_COUNT
};
enum ioex_port {
- IOEX_C0_NCT38XX = 0,
- IOEX_C2_NCT38XX,
- IOEX_ID_1_C0_NCT38XX,
- IOEX_ID_1_C2_NCT38XX,
+ IOEX_C2_NCT38XX = 0,
+ IOEX_C1_NCT38XX,
IOEX_PORT_COUNT
};
enum battery_type {
- BATTERY_POWER_TECH,
- BATTERY_LGC011,
+ BATTERY_C536,
BATTERY_TYPE_COUNT
};
enum pwm_channel {
- PWM_CH_LED2 = 0, /* PWM0 (white charger) */
- PWM_CH_LED3, /* PWM1 (orange on DB) */
- PWM_CH_LED1, /* PWM2 (orange charger) */
- PWM_CH_KBLIGHT, /* PWM3 */
+ PWM_CH_KBLIGHT = 0, /* PWM3 */
PWM_CH_FAN, /* PWM5 */
- PWM_CH_LED4, /* PWM7 (white on DB) */
PWM_CH_COUNT
};
@@ -283,6 +241,10 @@ enum mft_channel {
MFT_CH_COUNT
};
+void pen_detect_interrupt(enum gpio_signal s);
+
+void pen_config(void);
+
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BOARD_H */
diff --git a/board/mithrax/build.mk b/board/mithrax/build.mk
index e69587a781..5a0a20b5e6 100644
--- a/board/mithrax/build.mk
+++ b/board/mithrax/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
@@ -14,7 +14,7 @@ BASEBOARD:=brya
board-y=
board-y+=battery.o
board-y+=board.o
-board-y+=charger.o
+board-y+=charger_isl9241.o
board-y+=fans.o
board-y+=fw_config.o
board-y+=i2c.o
@@ -22,5 +22,4 @@ board-y+=keyboard.o
board-y+=led.o
board-y+=pwm.o
board-y+=sensors.o
-board-y+=tune_mp2964.o
board-y+=usbc_config.o
diff --git a/board/mithrax/charger.c b/board/mithrax/charger_isl9241.c
index e6a5c446d7..8bb38754dd 100644
--- a/board/mithrax/charger.c
+++ b/board/mithrax/charger_isl9241.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -10,7 +10,7 @@
#include "charger.h"
#include "compile_time_macros.h"
#include "console.h"
-#include "driver/charger/bq25710.h"
+#include "driver/charger/isl9241.h"
#include "usbc_ppc.h"
#include "usb_pd.h"
#include "util.h"
@@ -23,8 +23,8 @@
const struct charger_config_t chg_chips[] = {
{
.i2c_port = I2C_PORT_CHARGER,
- .i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS,
- .drv = &bq25710_drv,
+ .i2c_addr_flags = ISL9241_ADDR_FLAGS,
+ .drv = &isl9241_drv,
},
};
BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CHARGER_NUM);
@@ -84,6 +84,7 @@ int board_set_active_charge_port(int port)
__overridable void board_set_charge_limit(int port, int supplier, int charge_ma,
int max_ma, int charge_mv)
{
+ charge_ma = (charge_ma * 90) / 100;
charge_set_input_current_limit(MAX(charge_ma,
CONFIG_CHARGER_INPUT_CURRENT),
charge_mv);
diff --git a/board/mithrax/ec.tasklist b/board/mithrax/ec.tasklist
index a049ba3bfa..6d995d6b44 100644
--- a/board/mithrax/ec.tasklist
+++ b/board/mithrax/ec.tasklist
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -15,7 +15,6 @@
TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \
- TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \
@@ -27,6 +26,5 @@
TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \
TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_C2, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \
- TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \
+ TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \
TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE)
diff --git a/board/mithrax/fans.c b/board/mithrax/fans.c
index 27f5bca929..636364a6de 100644
--- a/board/mithrax/fans.c
+++ b/board/mithrax/fans.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -30,17 +30,10 @@ static const struct fan_conf fan_conf_0 = {
.enable_gpio = GPIO_EN_PP5000_FAN,
};
-/*
- * TOOD(b/181271666): thermistor placement and calibration
- *
- * Prototype fan spins at about 4200 RPM at 100% PWM, this
- * is specific to board ID 2 and might also apears in later
- * boards as well.
- */
static const struct fan_rpm fan_rpm_0 = {
- .rpm_min = 2200,
- .rpm_start = 2200,
- .rpm_max = 4200,
+ .rpm_min = 1100,
+ .rpm_start = 2000,
+ .rpm_max = 5000,
};
const struct fan_t fans[FAN_CH_COUNT] = {
diff --git a/board/mithrax/fw_config.c b/board/mithrax/fw_config.c
index 52f1003668..4228394d5b 100644
--- a/board/mithrax/fw_config.c
+++ b/board/mithrax/fw_config.c
@@ -1,16 +1,15 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
-#include "cbi.h"
#include "common.h"
#include "compile_time_macros.h"
#include "console.h"
#include "cros_board_info.h"
#include "fw_config.h"
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
static union brya_cbi_fw_config fw_config;
BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t));
@@ -33,21 +32,6 @@ void board_init_fw_config(void)
CPRINTS("CBI: Read FW_CONFIG failed, using board defaults");
fw_config = fw_config_defaults;
}
-
- if (get_board_id() == 0) {
- /*
- * Early boards have a zero'd out FW_CONFIG, so replace
- * it with a sensible default value. If DB_USB_ABSENT2
- * was used as an alternate encoding of DB_USB_ABSENT to
- * avoid the zero check, then fix it.
- */
- if (fw_config.raw_value == 0) {
- CPRINTS("CBI: FW_CONFIG is zero, using board defaults");
- fw_config = fw_config_defaults;
- } else if (fw_config.usb_db == DB_USB_ABSENT2) {
- fw_config.usb_db = DB_USB_ABSENT;
- }
- }
}
union brya_cbi_fw_config get_fw_config(void)
@@ -59,3 +43,13 @@ enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void)
{
return fw_config.usb_db;
}
+
+enum ec_cfg_usb_mb_type ec_cfg_usb_mb_type(void)
+{
+ return fw_config.usb_mb;
+}
+
+enum ec_cfg_stylus_type ec_cfg_stylus(void)
+{
+ return fw_config.stylus;
+}
diff --git a/board/mithrax/fw_config.h b/board/mithrax/fw_config.h
index ed4dbce7d9..5f5f956b61 100644
--- a/board/mithrax/fw_config.h
+++ b/board/mithrax/fw_config.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -9,15 +9,14 @@
#include <stdint.h>
/****************************************************************************
- * CBI FW_CONFIG layout for Brya board.
+ * CBI FW_CONFIG layout for felwinter board.
*
- * Source of truth is the project/brya/brya/config.star configuration file.
+ * Source of truth is the project/brya/felwinter/config.star configuration file.
*/
enum ec_cfg_usb_db_type {
- DB_USB_ABSENT = 0,
DB_USB3_PS8815 = 1,
- DB_USB_ABSENT2 = 15
+ DB_USB4_NCT3807 = 2
};
enum ec_cfg_keyboard_backlight_type {
@@ -25,14 +24,27 @@ enum ec_cfg_keyboard_backlight_type {
KEYBOARD_BACKLIGHT_ENABLED = 1
};
+enum ec_cfg_usb_mb_type {
+ MB_USB4_TBT = 0,
+ MB_USB3_NON_TBT = 1
+};
+
+enum ec_cfg_stylus_type {
+ STYLUS_ABSENT = 0,
+ STYLUS_PRSENT = 1
+};
+
union brya_cbi_fw_config {
struct {
- enum ec_cfg_usb_db_type usb_db : 4;
- uint32_t sd_db : 2;
- uint32_t lte_db : 1;
+ enum ec_cfg_usb_db_type usb_db : 3;
+ uint32_t wifi : 2;
+ enum ec_cfg_stylus_type stylus : 1;
enum ec_cfg_keyboard_backlight_type kb_bl : 1;
uint32_t audio : 3;
- uint32_t reserved_1 : 21;
+ uint32_t thermal : 2;
+ uint32_t table_mode : 1;
+ enum ec_cfg_usb_mb_type usb_mb : 3;
+ uint32_t reserved_1 : 16;
};
uint32_t raw_value;
};
@@ -51,4 +63,18 @@ union brya_cbi_fw_config get_fw_config(void);
*/
enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void);
+/**
+ * Get the USB main board type from FW_CONFIG.
+ *
+ * @return the USB main board type.
+ */
+enum ec_cfg_usb_mb_type ec_cfg_usb_mb_type(void);
+
#endif /* __BOARD_BRYA_FW_CONFIG_H_ */
+
+/**
+ * Get the stylus type from FW_CONFIG.
+ *
+ * @return the stylus type.
+ */
+enum ec_cfg_stylus_type ec_cfg_stylus(void);
diff --git a/board/mithrax/generated-gpio.inc b/board/mithrax/generated-gpio.inc
deleted file mode 100644
index f4772188a5..0000000000
--- a/board/mithrax/generated-gpio.inc
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * This file was auto-generated.
- */
-
-/* INTERRUPT GPIOs: */
-GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
-GPIO_INT(EC_ACCEL_INT_R_L, PIN(8, 1), GPIO_SEL_1P8V | GPIO_INT_FALLING, lis2dw12_interrupt)
-GPIO_INT(EC_ALS_RGB_INT_R_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt)
-GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, lsm6dso_interrupt)
-GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt)
-GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
-GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
-GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt)
-GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
-GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr)
-GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C0_C2_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event)
-GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt)
-GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event)
-GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt)
-
-/* USED GPIOs: */
-GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT)
-GPIO(CHARGER_VAP_OTG_EN, PIN(7, 3), GPIO_OUT_LOW)
-GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)
-GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT)
-GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW)
-GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH)
-GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW)
-GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT)
-GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT)
-GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT)
-GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT)
-GPIO(EC_I2C_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V)
-GPIO(EC_I2C_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V)
-GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_C2_RT_SCL, PIN(D, 1), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_C2_RT_SDA, PIN(D, 0), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_C2_TCPC_SCL, PIN(9, 0), GPIO_INPUT)
-GPIO(EC_I2C_USB_C0_C2_TCPC_SDA, PIN(8, 7), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT)
-GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT)
-GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH)
-GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT)
-GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH)
-GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH)
-GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW)
-GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW)
-GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW)
-GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH)
-GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH)
-GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH)
-GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW)
-GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW)
-GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT)
-GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW)
-GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH)
-GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW)
-GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW)
-GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW)
-GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT)
-GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW)
-GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW)
-
-/* UART alternate functions */
-ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */
-
-/* I2C alternate functions */
-ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */
-ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* GPIO87/I2C1_SDA0 */
-ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */
-ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0) /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */
-ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, GPIO_SEL_1P8V) /* GPIOB5/I2C0_SCL0, GPIOB4/I2C0_SDA0 */
-ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */
-ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0) /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */
-ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */
-
-/* PWM alternate functions */
-ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */
-ALTERNATE(PIN_MASK(6, 0x01), 0, MODULE_PWM, 0) /* GPIO60/PWM7 */
-ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */
-ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */
-ALTERNATE(PIN_MASK(C, 0x1c), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0, GPIOC2/PWM1/I2C6_SCL0 */
-
-/* ADC alternate functions */
-ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */
-ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */
-ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */
-
-/* KB alternate functions */
-ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */
-ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */
-ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */
-ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */
-ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */
-ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */
-
-/* PMU alternate functions */
-ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */
-ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /* GPIO01/PSL_IN3_L&GPI01 */
-ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */
-
-/* Unused Pins */
-UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */
-UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */
-UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */
-UNUSED(PIN(6, 6)) /* GPIO66 */
-UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */
-
-/* Pre-configured PSL balls: J8 K6 */
diff --git a/board/mithrax/gpio.inc b/board/mithrax/gpio.inc
index 56964f2aa5..86f71a9ea3 100644
--- a/board/mithrax/gpio.inc
+++ b/board/mithrax/gpio.inc
@@ -1,74 +1,154 @@
/* -*- mode:c -*-
*
- * Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#define MODULE_KB MODULE_KEYBOARD_SCAN
-/*
- * Generated-gpio.inc is produced using a Brya specific tool that
- * parses the GPIO definitions derived from the board schematics and
- * EC pinout descriptions derived form the chip datasheets to generate
- * the Chrome EC GPIO pinout definitions. Due to the confidential
- * nature of schematics and datasheets, they are not provided here.
- *
- * Variants that do not auto-generate their GPIO definitions should
- * combine the Brya gpio.inc and generated-gpio.inc into their
- * gpio.inc and customize as appropriate.
- */
+/* INTERRUPT GPIOs: */
+GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
+GPIO_INT(EC_ACCEL_INT_R_L, PIN(8, 1), GPIO_SEL_1P8V | GPIO_INT_FALLING, lis2dw12_interrupt)
+GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, lsm6dso_interrupt)
+GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt)
+GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
+GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt)
+GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
+GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr)
+GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event)
+GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt)
+GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt)
+GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event)
+GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt)
+GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt)
+GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt)
+GPIO_INT(PEN_DET_ODL, PIN(D, 4), GPIO_INT_BOTH, pen_detect_interrupt)
-#include "generated-gpio.inc"
+/* USED GPIOs: */
+GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT)
+GPIO(CHARGER_VAP_OTG_EN, PIN(7, 3), GPIO_OUT_LOW)
+GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)
+GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT)
+GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW)
+GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH)
+GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW)
+GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT)
+GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT)
+GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT)
+GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_RT_SCL, PIN(D, 1), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_RT_SDA, PIN(D, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_TCPC_SCL, PIN(9, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_C2_TCPC_SDA, PIN(8, 7), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT)
+GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH)
+GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT)
+GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH)
+GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH)
+GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW)
+GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW)
+GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW)
+GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH)
+GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH)
+GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH)
+GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW)
+GPIO(EN_PP5000_PEN, PIN(E, 1), GPIO_OUT_LOW)
+GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW)
+GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT)
+GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW)
+GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH)
+GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW)
+GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW)
+GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW)
+GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT)
+GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW)
+GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW)
-/*
- * The NPCX keyboard driver does not use named GPIOs to access
- * keyboard scan pins, so we do not list them in *gpio.inc. However, when
- * KEYBOARD_COL2_INVERTED is defined, this name is required.
- */
-GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW)
+/* LED */
+GPIO(LED_4_L, PIN(6, 0), GPIO_OUT_HIGH) /* battery led white */
+GPIO(LED_3_L, PIN(C, 2), GPIO_OUT_HIGH) /* battery led amber */
+GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_HIGH) /* power led white */
-/*
- * GPIOE1 is an ALT function ADC INPUT on board ID 2 and a GPIO INPUT on
- * board ID 1. This declaration gives us a signal name to use on board
- * ID 1.
- */
-GPIO(ID_1_EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT)
+/* UART alternate functions */
+ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */
-/*
- * GPIO34 is an INPUT on board ID 2 and ODR_LOW on board ID 1.
- *
- * Since this pin is pulled up to 3.3V through a 30.9K ohm resistor on
- * board ID 2, we will leak about 0.3mW until the pin is put in ALT mode
- * when MODULE_ADC configuration runs. Initializing the pin to ODR_LOW
- * gives us full control on both boards.
- */
-GPIO(ID_1_USB_C0_C2_TCPC_RST_ODL, PIN(3, 4), GPIO_ODR_LOW)
+/* I2C alternate functions */
+ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */
+ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* GPIO87/I2C1_SDA0 */
+ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */
+ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0) /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */
+ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, GPIO_SEL_1P8V) /* GPIOB5/I2C0_SCL0, GPIOB4/I2C0_SDA0 */
+ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */
+ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0) /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */
+ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */
-/* Board ID 1 IO expander configuration */
+/* PWM alternate functions */
+ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */
+ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */
+ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */
-IOEX(ID_1_USB_C0_RT_RST_ODL, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 2), GPIO_ODR_LOW)
-/* GPIO03_P1 to PU */
-IOEX(ID_1_USB_C0_FRS_EN, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 4), GPIO_LOW)
-IOEX(ID_1_USB_C0_OC_ODL, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 6), GPIO_ODR_HIGH)
-/* GPIO07_P1 to PU */
+/* ADC alternate functions */
+ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */
+ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */
-IOEX(ID_1_USB_C2_RT_RST_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 2), GPIO_ODR_LOW)
-/* GPIO03_P2 to PU */
-IOEX(ID_1_USB_C2_FRS_EN, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 4), GPIO_LOW)
-IOEX(ID_1_USB_C1_OC_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 6), GPIO_ODR_HIGH)
-IOEX(ID_1_USB_C2_OC_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 7), GPIO_ODR_HIGH)
+/* KB alternate functions */
+ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */
+ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */
+ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */
+ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */
+
+/* PMU alternate functions */
+ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */
+ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /* GPIO01/PSL_IN3_L&GPI01 */
+ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */
+
+/* Unused Pins */
+UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */
+UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */
+UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */
+UNUSED(PIN(6, 6)) /* GPIO66 */
+UNUSED(PIN(C, 3)) /* GPIOC3 */
+UNUSED(PIN(C, 6)) /* GPIOC6 */
+UNUSED(PIN(6, 2)) /* GPIO62 */
+UNUSED(PIN(B, 1)) /* GPIOB1 */
+UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */
-/* Board ID 2 IO expander configuration */
+/* Pre-configured PSL balls: J8 K6 */
+
+
+/*
+ * The NPCX keyboard driver does not use named GPIOs to access
+ * keyboard scan pins, so we do not list them in *gpio.inc. However, when
+ * KEYBOARD_COL2_INVERTED is defined, this name is required.
+ */
+GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW)
/* GPIO02_P2 to PU */
/* GPIO03_P2 to PU */
-IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_OUT_LOW)
-IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW)
+
+IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 2), GPIO_ODR_LOW)
+IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH)
+IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW)
IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW)
-IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 3), GPIO_ODR_HIGH)
IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_OUT_LOW)
+IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_LOW)
/* GPIO07_P2 to PU */
diff --git a/board/mithrax/i2c.c b/board/mithrax/i2c.c
index 12219981a8..a850c12544 100644
--- a/board/mithrax/i2c.c
+++ b/board/mithrax/i2c.c
@@ -1,15 +1,12 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "compile_time_macros.h"
-#include "console.h"
-#include "hooks.h"
-#include "i2c.h"
-#define BOARD_ID_FAST_PLUS_CAPABLE 2
+#include "i2c.h"
/* I2C port map configuration */
const struct i2c_port_t i2c_ports[] = {
@@ -23,24 +20,24 @@ const struct i2c_port_t i2c_ports[] = {
},
{
/* I2C1 */
- .name = "tcpc0,2",
- .port = I2C_PORT_USB_C0_C2_TCPC,
+ .name = "tcpc2",
+ .port = I2C_PORT_USB_C2_TCPC,
.kbps = 1000,
.scl = GPIO_EC_I2C_USB_C0_C2_TCPC_SCL,
.sda = GPIO_EC_I2C_USB_C0_C2_TCPC_SDA,
},
{
/* I2C2 */
- .name = "ppc0,2",
- .port = I2C_PORT_USB_C0_C2_PPC,
+ .name = "ppc2",
+ .port = I2C_PORT_USB_C2_PPC,
.kbps = 1000,
.scl = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL,
.sda = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA,
},
{
/* I2C3 */
- .name = "retimer0,2",
- .port = I2C_PORT_USB_C0_C2_MUX,
+ .name = "retimer2",
+ .port = I2C_PORT_USB_C2_MUX,
.kbps = 1000,
.scl = GPIO_EC_I2C_USB_C0_C2_RT_SCL,
.sda = GPIO_EC_I2C_USB_C0_C2_RT_SDA,
@@ -49,7 +46,7 @@ const struct i2c_port_t i2c_ports[] = {
/* I2C4 C1 TCPC */
.name = "tcpc1",
.port = I2C_PORT_USB_C1_TCPC,
- .kbps = 1000,
+ .kbps = 400,
.scl = GPIO_EC_I2C_USB_C1_TCPC_SCL,
.sda = GPIO_EC_I2C_USB_C1_TCPC_SDA,
.flags = I2C_PORT_FLAG_DYNAMIC_SPEED,
@@ -66,10 +63,9 @@ const struct i2c_port_t i2c_ports[] = {
/* I2C6 */
.name = "ppc1",
.port = I2C_PORT_USB_C1_PPC,
- .kbps = 1000,
+ .kbps = 400,
.scl = GPIO_EC_I2C_USB_C1_MIX_SCL,
.sda = GPIO_EC_I2C_USB_C1_MIX_SDA,
- .flags = I2C_PORT_FLAG_DYNAMIC_SPEED,
},
{
/* I2C7 */
@@ -81,19 +77,3 @@ const struct i2c_port_t i2c_ports[] = {
},
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-
-/*
- * I2C controllers are initialized in main.c. This sets the speed much
- * later, but before I2C peripherals are initialized.
- */
-static void set_board_legacy_i2c_speeds(void)
-{
- if (get_board_id() >= BOARD_ID_FAST_PLUS_CAPABLE)
- return;
-
- ccprints("setting USB DB I2C buses to 400 kHz\n");
-
- i2c_set_freq(I2C_PORT_USB_C1_TCPC, I2C_FREQ_400KHZ);
- i2c_set_freq(I2C_PORT_USB_C1_PPC, I2C_FREQ_400KHZ);
-}
-DECLARE_HOOK(HOOK_INIT, set_board_legacy_i2c_speeds, HOOK_PRIO_INIT_I2C - 1);
diff --git a/board/mithrax/keyboard.c b/board/mithrax/keyboard.c
index 133d574dfa..a8cbf72238 100644
--- a/board/mithrax/keyboard.c
+++ b/board/mithrax/keyboard.c
@@ -1,10 +1,10 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
-
+#include "ec_commands.h"
#include "keyboard_scan.h"
#include "timer.h"
@@ -19,7 +19,30 @@ __override struct keyboard_scan_config keyscan_config = {
.min_post_scan_delay_us = 1000,
.poll_timeout_us = 100 * MSEC,
.actual_key_mask = {
- 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
- 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
+ 0x1c, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+ 0xa4, 0xff, 0xfe, 0x55, 0xfe, 0xff, 0xff, 0xff, /* full set */
},
};
+
+static const struct ec_response_keybd_config felwinter_kb = {
+ .num_top_row_keys = 10,
+ .action_keys = {
+ TK_BACK, /* T1 */
+ TK_REFRESH, /* T2 */
+ TK_FULLSCREEN, /* T3 */
+ TK_OVERVIEW, /* T4 */
+ TK_SNAPSHOT, /* T5 */
+ TK_BRIGHTNESS_DOWN, /* T6 */
+ TK_BRIGHTNESS_UP, /* T7 */
+ TK_VOL_MUTE, /* T8 */
+ TK_VOL_DOWN, /* T9 */
+ TK_VOL_UP, /* T10 */
+ },
+ .capabilities = KEYBD_CAP_SCRNLOCK_KEY | KEYBD_CAP_NUMERIC_KEYPAD,
+};
+
+__override const struct ec_response_keybd_config
+*board_vivaldi_keybd_config(void)
+{
+ return &felwinter_kb;
+}
diff --git a/board/mithrax/led.c b/board/mithrax/led.c
index be2b832237..3b7e649470 100644
--- a/board/mithrax/led.c
+++ b/board/mithrax/led.c
@@ -1,93 +1,118 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
+ *
+ * Power and battery LED control for felwinter
*/
-/* Brya specific PWM LED settings: there are 2 LEDs on each side of the board,
- * each one can be controlled separately. The LED colors are white or amber,
- * and the default behavior is tied to the charging process: both sides are
- * amber while charging the battery and white when the battery is charged.
- */
+#include "chipset.h"
+#include "gpio.h"
+#include "led_common.h"
+#include "led_onoff_states.h"
+#include "system.h"
-#include <stdint.h>
+#define LED_OFF_LVL 1
+#define LED_ON_LVL 0
-#include "common.h"
-#include "compile_time_macros.h"
-#include "ec_commands.h"
-#include "led_pwm.h"
-#include "pwm.h"
-#include "util.h"
+__override const int led_charge_lvl_1;
+__override const int led_charge_lvl_2 = 94;
-const enum ec_led_id supported_led_ids[] = {
- EC_LED_ID_LEFT_LED,
- EC_LED_ID_RIGHT_LED,
+__override struct led_descriptor
+ led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = {
+ [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} },
+ [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} },
+ [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} },
+ [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} },
+ [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC},
+ {LED_OFF, 3 * LED_ONE_SEC} },
+ [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} },
+ [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} },
+ [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC},
+ {LED_OFF, 1 * LED_ONE_SEC} },
};
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-/*
- * We only have a white and an amber LED, so setting any other color results in
- * both LEDs being off. Cap at 50% to save power.
- */
-struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = {
- /* Amber, White */
- [EC_LED_COLOR_RED] = { 0, 0 },
- [EC_LED_COLOR_GREEN] = { 0, 0 },
- [EC_LED_COLOR_BLUE] = { 0, 0 },
- [EC_LED_COLOR_YELLOW] = { 0, 0 },
- [EC_LED_COLOR_WHITE] = { 0, 50 },
- [EC_LED_COLOR_AMBER] = { 50, 0 },
+__override const struct led_descriptor
+ led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = {
+ [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} },
+ [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC},
+ {LED_OFF, 3 * LED_ONE_SEC} },
+ [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC},
+ {LED_OFF, 3 * LED_ONE_SEC} },
+ [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} },
};
-/* Two logical LEDs with amber and white channels. */
-struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = {
- {
- .ch0 = PWM_CH_LED1,
- .ch1 = PWM_CH_LED2,
- .ch2 = PWM_LED_NO_CHANNEL,
- .enable = &pwm_enable,
- .set_duty = &pwm_set_duty,
- },
- {
- .ch0 = PWM_CH_LED3,
- .ch1 = PWM_CH_LED4,
- .ch2 = PWM_LED_NO_CHANNEL,
- .enable = &pwm_enable,
- .set_duty = &pwm_set_duty,
- },
+const enum ec_led_id supported_led_ids[] = {
+ EC_LED_ID_BATTERY_LED,
+ EC_LED_ID_POWER_LED,
};
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+__override void led_set_color_power(enum ec_led_colors color)
{
- memset(brightness_range, '\0',
- sizeof(*brightness_range) * EC_LED_COLOR_COUNT);
- brightness_range[EC_LED_COLOR_AMBER] = 100;
- brightness_range[EC_LED_COLOR_WHITE] = 100;
+ if (color == EC_LED_COLOR_WHITE)
+ gpio_set_level(GPIO_PWR_LED_WHITE_L, LED_ON_LVL);
+ else
+ /* LED_OFF and unsupported colors */
+ gpio_set_level(GPIO_PWR_LED_WHITE_L, LED_OFF_LVL);
}
-int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+__override void led_set_color_battery(enum ec_led_colors color)
{
- enum pwm_led_id pwm_id;
-
- /* Convert ec_led_id to pwm_led_id. */
- switch (led_id) {
- case EC_LED_ID_LEFT_LED:
- pwm_id = PWM_LED0;
+ switch (color) {
+ case EC_LED_COLOR_WHITE:
+ gpio_set_level(GPIO_BAT_LED_WHITE_L, LED_ON_LVL);
+ gpio_set_level(GPIO_BAT_LED_AMBER_L, LED_OFF_LVL);
+ break;
+ case EC_LED_COLOR_AMBER:
+ gpio_set_level(GPIO_BAT_LED_WHITE_L, LED_OFF_LVL);
+ gpio_set_level(GPIO_BAT_LED_AMBER_L, LED_ON_LVL);
break;
- case EC_LED_ID_RIGHT_LED:
- pwm_id = PWM_LED1;
+ default: /* LED_OFF and other unsupported colors */
+ gpio_set_level(GPIO_BAT_LED_WHITE_L, LED_OFF_LVL);
+ gpio_set_level(GPIO_BAT_LED_AMBER_L, LED_OFF_LVL);
break;
- default:
- return EC_ERROR_UNKNOWN;
}
+}
- if (brightness[EC_LED_COLOR_WHITE])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE);
- else if (brightness[EC_LED_COLOR_AMBER])
- set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER);
- else
- /* Otherwise, the "color" is "off". */
- set_pwm_led_color(pwm_id, -1);
+__override enum led_states board_led_get_state(enum led_states desired_state)
+{
+ if (desired_state == STATE_BATTERY_ERROR) {
+ if (chipset_in_state(CHIPSET_STATE_ON))
+ return desired_state;
+ else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND))
+ return STATE_DISCHARGE_S3;
+ else
+ return STATE_DISCHARGE_S5;
+ }
+ return desired_state;
+}
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+ if (led_id == EC_LED_ID_BATTERY_LED) {
+ brightness_range[EC_LED_COLOR_WHITE] = 1;
+ brightness_range[EC_LED_COLOR_AMBER] = 1;
+ } else if (led_id == EC_LED_ID_POWER_LED) {
+ brightness_range[EC_LED_COLOR_WHITE] = 1;
+ }
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+ if (led_id == EC_LED_ID_BATTERY_LED) {
+ if (brightness[EC_LED_COLOR_WHITE] != 0)
+ led_set_color_battery(EC_LED_COLOR_WHITE);
+ else if (brightness[EC_LED_COLOR_AMBER] != 0)
+ led_set_color_battery(EC_LED_COLOR_AMBER);
+ else
+ led_set_color_battery(LED_OFF);
+ } else if (led_id == EC_LED_ID_POWER_LED) {
+ if (brightness[EC_LED_COLOR_WHITE] != 0)
+ led_set_color_power(EC_LED_COLOR_WHITE);
+ else
+ led_set_color_power(LED_OFF);
+ }
return EC_SUCCESS;
}
diff --git a/board/mithrax/pwm.c b/board/mithrax/pwm.c
index de19f15cd5..fea431c4ce 100644
--- a/board/mithrax/pwm.c
+++ b/board/mithrax/pwm.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -11,21 +11,6 @@
#include "pwm_chip.h"
const struct pwm_t pwm_channels[] = {
- [PWM_CH_LED2] = {
- .channel = 0,
- .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- .freq = 4800,
- },
- [PWM_CH_LED3] = {
- .channel = 1,
- .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- .freq = 4800,
- },
- [PWM_CH_LED1] = {
- .channel = 2,
- .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- .freq = 4800,
- },
[PWM_CH_KBLIGHT] = {
.channel = 3,
.flags = 0,
@@ -39,33 +24,15 @@ const struct pwm_t pwm_channels[] = {
},
[PWM_CH_FAN] = {
.channel = 5,
- .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP,
- .freq = 1000
- },
- [PWM_CH_LED4] = {
- .channel = 7,
- .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP,
- .freq = 4800,
+ .flags = PWM_CONFIG_OPEN_DRAIN,
+ .freq = 25000,
},
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
static void board_pwm_init(void)
{
- /*
- * Turn off all the LEDs.
- * Turn on the fan at 100%.
- */
- pwm_enable(PWM_CH_LED1, 1);
- pwm_set_duty(PWM_CH_LED1, 0);
- pwm_enable(PWM_CH_LED2, 1);
- pwm_set_duty(PWM_CH_LED2, 0);
- pwm_enable(PWM_CH_LED3, 1);
- pwm_set_duty(PWM_CH_LED3, 0);
- pwm_enable(PWM_CH_LED4, 1);
- pwm_set_duty(PWM_CH_LED4, 0);
-
pwm_enable(PWM_CH_KBLIGHT, 1);
- pwm_set_duty(PWM_CH_KBLIGHT, 50);
+ pwm_set_duty(PWM_CH_KBLIGHT, 0);
}
DECLARE_HOOK(HOOK_INIT, board_pwm_init, HOOK_PRIO_DEFAULT);
diff --git a/board/mithrax/sensors.c b/board/mithrax/sensors.c
index f926fdbb20..fd3f721947 100644
--- a/board/mithrax/sensors.c
+++ b/board/mithrax/sensors.c
@@ -1,14 +1,13 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "accelgyro.h"
-#include "adc.h"
+#include "adc_chip.h"
#include "driver/accel_lis2dw12.h"
#include "driver/accelgyro_lsm6dso.h"
-#include "driver/als_tcs3400_public.h"
#include "gpio.h"
#include "hooks.h"
#include "motion_sense.h"
@@ -17,7 +16,7 @@
#include "temp_sensor/thermistor.h"
/* ADC configuration */
-struct adc_t adc_channels[] = {
+const struct adc_t adc_channels[] = {
[ADC_TEMP_SENSOR_1_DDR_SOC] = {
.name = "TEMP_DDR_SOC",
.input_ch = NPCX_ADC_CH0,
@@ -25,8 +24,8 @@ struct adc_t adc_channels[] = {
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
- [ADC_TEMP_SENSOR_2_AMBIENT] = {
- .name = "TEMP_AMBIENT",
+ [ADC_TEMP_SENSOR_2_FAN] = {
+ .name = "TEMP_FAN",
.input_ch = NPCX_ADC_CH1,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
@@ -39,13 +38,6 @@ struct adc_t adc_channels[] = {
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
- [ADC_TEMP_SENSOR_4_WWAN] = {
- .name = "TEMP_WWAN",
- .input_ch = NPCX_ADC_CH7,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
@@ -54,11 +46,10 @@ K_MUTEX_DEFINE(g_base_accel_mutex);
static struct stprivate_data g_lis2dw12_data;
static struct lsm6dso_data lsm6dso_data;
-/* TODO(b/184779333): calibrate the orientation matrix on later board stage */
static const mat33_fp_t lid_standard_ref = {
- { 0, FLOAT_TO_FP(1), 0},
{ FLOAT_TO_FP(1), 0, 0},
- { 0, 0, FLOAT_TO_FP(-1)}
+ { 0, FLOAT_TO_FP(1), 0},
+ { 0, 0, FLOAT_TO_FP(1)}
};
/* TODO(b/184779743): verify orientation matrix */
@@ -68,60 +59,6 @@ static const mat33_fp_t base_standard_ref = {
{ 0, 0, FLOAT_TO_FP(-1)}
};
-/* TCS3400 private data */
-static struct als_drv_data_t g_tcs3400_data = {
- .als_cal.scale = 1,
- .als_cal.uscale = 0,
- .als_cal.offset = 0,
- .als_cal.channel_scale = {
- .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */
- .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */
- },
-};
-
-/*
- * TODO: b/184702900 need to calibrate ALS/RGB sensor. At default settings,
- * shining phone flashlight on sensor pegs all readings at 0xFFFF.
- */
-static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = {
- .calibration.rgb_cal[X] = {
- .offset = 0,
- .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0),
- .scale = {
- .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */
- .cover_scale = ALS_CHANNEL_SCALE(1.0)
- }
- },
- .calibration.rgb_cal[Y] = {
- .offset = 0,
- .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0),
- .scale = {
- .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */
- .cover_scale = ALS_CHANNEL_SCALE(1.0)
- },
- },
- .calibration.rgb_cal[Z] = {
- .offset = 0,
- .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0),
- .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0),
- .scale = {
- .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */
- .cover_scale = ALS_CHANNEL_SCALE(1.0)
- }
- },
- .calibration.irt = INT_TO_FP(1),
- .saturation.again = TCS_DEFAULT_AGAIN,
- .saturation.atime = TCS_DEFAULT_ATIME,
-};
-
struct motion_sensor_t motion_sensors[] = {
[LID_ACCEL] = {
.name = "Lid Accel",
@@ -141,7 +78,7 @@ struct motion_sensor_t motion_sensors[] = {
.config = {
/* EC use accel for angle detection */
[SENSOR_CONFIG_EC_S0] = {
- .odr = 10000 | ROUND_UP_FLAG,
+ .odr = 12500 | ROUND_UP_FLAG,
},
/* Sensor on for lid angle detection */
[SENSOR_CONFIG_EC_S3] = {
@@ -195,59 +132,13 @@ struct motion_sensor_t motion_sensors[] = {
.min_frequency = LSM6DSO_ODR_MIN_VAL,
.max_frequency = LSM6DSO_ODR_MAX_VAL,
},
-
- [CLEAR_ALS] = {
- .name = "Clear Light",
- .active_mask = SENSOR_ACTIVE_S0_S3,
- .chip = MOTIONSENSE_CHIP_TCS3400,
- .type = MOTIONSENSE_TYPE_LIGHT,
- .location = MOTIONSENSE_LOC_CAMERA,
- .drv = &tcs3400_drv,
- .drv_data = &g_tcs3400_data,
- .port = I2C_PORT_SENSOR,
- .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS,
- .rot_standard_ref = NULL,
- .default_range = 0x10000, /* scale = 1x, uscale = 0 */
- .min_frequency = TCS3400_LIGHT_MIN_FREQ,
- .max_frequency = TCS3400_LIGHT_MAX_FREQ,
- .config = {
- /* Run ALS sensor in S0 */
- [SENSOR_CONFIG_EC_S0] = {
- .odr = 1000,
- },
- },
- },
-
- [RGB_ALS] = {
- /*
- * RGB channels read by CLEAR_ALS and so the i2c port and
- * address do not need to be defined for RGB_ALS.
- */
- .name = "RGB Light",
- .active_mask = SENSOR_ACTIVE_S0_S3,
- .chip = MOTIONSENSE_CHIP_TCS3400,
- .type = MOTIONSENSE_TYPE_LIGHT_RGB,
- .location = MOTIONSENSE_LOC_CAMERA,
- .drv = &tcs3400_rgb_drv,
- .drv_data = &g_tcs3400_rgb_data,
- .rot_standard_ref = NULL,
- .default_range = 0x10000, /* scale = 1x, uscale = 0 */
- },
};
const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
-/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */
-const struct motion_sensor_t *motion_als_sensors[] = {
- &motion_sensors[CLEAR_ALS],
-};
-BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT);
-
static void baseboard_sensors_init(void)
{
/* Enable gpio interrupt for lid accel sensor */
gpio_enable_interrupt(GPIO_EC_ACCEL_INT_R_L);
- /* Enable interrupt for the TCS3400 color light sensor */
- gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_R_L);
/* Enable gpio interrupt for base accelgyro sensor */
gpio_enable_interrupt(GPIO_EC_IMU_INT_R_L);
}
@@ -259,25 +150,19 @@ const struct temp_sensor_t temp_sensors[] = {
.name = "DDR and SOC",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_1_DDR_SOC,
+ .idx = ADC_TEMP_SENSOR_1_DDR_SOC
},
- [TEMP_SENSOR_2_AMBIENT] = {
- .name = "Ambient",
+ [TEMP_SENSOR_2_FAN] = {
+ .name = "FAN",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_2_AMBIENT,
+ .idx = ADC_TEMP_SENSOR_2_FAN
},
[TEMP_SENSOR_3_CHARGER] = {
.name = "Charger",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_3_CHARGER,
- },
- [TEMP_SENSOR_4_WWAN] = {
- .name = "WWAN",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_4_WWAN,
+ .idx = ADC_TEMP_SENSOR_3_CHARGER
},
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
@@ -285,7 +170,7 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
/*
* TODO(b/180681346): update for Alder Lake/brya
*
- * Alder Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at
+ * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at
* 130 C. However, sensor is located next to DDR, so we need to use the lower
* DDR temperature limit (85 C)
*/
@@ -295,14 +180,14 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
#define THERMAL_CPU \
{ \
.temp_host = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \
- [EC_TEMP_THRESH_HALT] = C_TO_K(90), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(80), \
}, \
.temp_host_release = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \
}, \
- .temp_fan_off = C_TO_K(35), \
- .temp_fan_max = C_TO_K(60), \
+ .temp_fan_off = C_TO_K(30), \
+ .temp_fan_max = C_TO_K(73), \
}
__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU;
@@ -322,92 +207,39 @@ __maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU;
/*
* TODO(b/202062363): Remove when clang is fixed.
*/
-#define THERMAL_AMBIENT \
+#define THERMAL_FAN \
{ \
.temp_host = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \
- [EC_TEMP_THRESH_HALT] = C_TO_K(90), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(70), \
}, \
.temp_host_release = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \
}, \
- .temp_fan_off = C_TO_K(35), \
- .temp_fan_max = C_TO_K(60), \
+ .temp_fan_off = C_TO_K(30), \
+ .temp_fan_max = C_TO_K(63), \
}
-__maybe_unused static const struct ec_thermal_config thermal_ambient =
- THERMAL_AMBIENT;
+__maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN;
-/*
- * Inductor limits - used for both charger and PP3300 regulator
- *
- * Need to use the lower of the charger IC, PP3300 regulator, and the inductors
- *
- * Charger max recommended temperature 125C, max absolute temperature 150C
- * PP3300 regulator: operating range -40 C to 125 C
- *
- * Inductors: limit of 125c
- * PCB: limit is 80c
- */
-/*
- * TODO(b/202062363): Remove when clang is fixed.
- */
#define THERMAL_CHARGER \
{ \
.temp_host = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \
- [EC_TEMP_THRESH_HALT] = C_TO_K(120), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(80), \
}, \
.temp_host_release = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \
+ [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \
}, \
- .temp_fan_off = C_TO_K(35), \
- .temp_fan_max = C_TO_K(65), \
+ .temp_fan_off = C_TO_K(30), \
+ .temp_fan_max = C_TO_K(73), \
}
__maybe_unused static const struct ec_thermal_config thermal_charger =
THERMAL_CHARGER;
-/*
- * TODO(b/180681346): update for brya WWAN module
- */
-/*
- * TODO(b/202062363): Remove when clang is fixed.
- */
-#define THERMAL_WWAN \
- { \
- .temp_host = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(130), \
- [EC_TEMP_THRESH_HALT] = C_TO_K(130), \
- }, \
- .temp_host_release = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \
- }, \
- .temp_fan_off = C_TO_K(35), \
- .temp_fan_max = C_TO_K(60), \
- }
-__maybe_unused static const struct ec_thermal_config thermal_wwan =
- THERMAL_WWAN;
-
+/* this should really be "const" */
struct ec_thermal_config thermal_params[] = {
[TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU,
- [TEMP_SENSOR_2_AMBIENT] = THERMAL_AMBIENT,
+ [TEMP_SENSOR_2_FAN] = THERMAL_FAN,
[TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER,
- [TEMP_SENSOR_4_WWAN] = THERMAL_WWAN,
};
BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
-
-static void board_thermals_init(void)
-{
- if (get_board_id() == 1) {
- /*
- * Board ID 1 only has 3 sensors and the AMBIENT sensor
- * ADC pins have been reassigned, so we're down to 2
- * sensors that can easily be configured. So, alias the
- * AMBIENT sensor ADC channel to the unimplemented ADC
- * slots.
- */
- adc_channels[ADC_TEMP_SENSOR_3_CHARGER].input_ch = NPCX_ADC_CH1;
- adc_channels[ADC_TEMP_SENSOR_4_WWAN].input_ch = NPCX_ADC_CH1;
- }
-}
-
-DECLARE_HOOK(HOOK_INIT, board_thermals_init, HOOK_PRIO_INIT_CHIPSET);
diff --git a/board/mithrax/tune_mp2964.c b/board/mithrax/tune_mp2964.c
deleted file mode 100644
index f67caa587e..0000000000
--- a/board/mithrax/tune_mp2964.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Tune the MP2964 IMVP9.1 parameters for brya */
-
-#include "common.h"
-#include "compile_time_macros.h"
-#include "console.h"
-#include "hooks.h"
-#include "mp2964.h"
-
-const static struct mp2964_reg_val rail_a[] = {
- { MP2964_MFR_ALT_SET, 0xe081 }, /* ALERT_DELAY = 200ns */
-};
-const static struct mp2964_reg_val rail_b[] = {
- { MP2964_MFR_ALT_SET, 0xe081 }, /* ALERT_DELAY = 200ns */
-};
-
-static void mp2964_on_startup(void)
-{
- static int chip_updated;
- int status;
-
- if (get_board_id() != 1)
- return;
-
- if (chip_updated)
- return;
-
- chip_updated = 1;
-
- ccprintf("%s: attempting to tune PMIC\n", __func__);
-
- status = mp2964_tune(rail_a, ARRAY_SIZE(rail_a),
- rail_b, ARRAY_SIZE(rail_b));
- if (status != EC_SUCCESS)
- ccprintf("%s: could not update all settings\n", __func__);
-}
-
-DECLARE_HOOK(HOOK_CHIPSET_STARTUP, mp2964_on_startup,
- HOOK_PRIO_FIRST);
diff --git a/board/mithrax/usbc_config.c b/board/mithrax/usbc_config.c
index 43583f6a62..14eec1a145 100644
--- a/board/mithrax/usbc_config.c
+++ b/board/mithrax/usbc_config.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -6,9 +6,6 @@
#include <stdint.h>
#include <stdbool.h>
-#include "cbi.h"
-#include "charger.h"
-#include "charge_ramp.h"
#include "common.h"
#include "compile_time_macros.h"
#include "console.h"
@@ -39,22 +36,12 @@
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
-#ifdef CONFIG_ZEPHYR
-enum ioex_port {
- IOEX_C0_NCT38XX = 0,
- IOEX_C2_NCT38XX,
- IOEX_ID_1_C0_NCT38XX,
- IOEX_ID_1_C2_NCT38XX,
- IOEX_PORT_COUNT
-};
-#endif /* CONFIG_ZEPHYR */
-
/* USBC TCPC configuration */
-const struct tcpc_config_t tcpc_config[] = {
- [USBC_PORT_C0] = {
+struct tcpc_config_t tcpc_config[] = {
+ [USBC_PORT_C2] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
- .port = I2C_PORT_USB_C0_C2_TCPC,
+ .port = I2C_PORT_USB_C2_TCPC,
.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
},
.drv = &nct38xx_tcpm_drv,
@@ -70,67 +57,56 @@ const struct tcpc_config_t tcpc_config[] = {
.drv = &ps8xxx_tcpm_drv,
.flags = TCPC_FLAGS_TCPCI_REV2_0 |
TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
- TCPC_FLAGS_CONTROL_VCONN |
- TCPC_FLAGS_CONTROL_FRS,
- },
- [USBC_PORT_C2] = {
- .bus_type = EC_BUS_TYPE_I2C,
- .i2c_info = {
- .port = I2C_PORT_USB_C0_C2_TCPC,
- .addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
- },
- .drv = &nct38xx_tcpm_drv,
- .flags = TCPC_FLAGS_TCPCI_REV2_0,
+ TCPC_FLAGS_CONTROL_VCONN,
},
};
BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
-/******************************************************************************/
-/* USB-A charging control */
-
-#ifndef CONFIG_ZEPHYR
-const int usb_port_enable[USB_PORT_COUNT] = {
- GPIO_EN_PP5000_USBA_R,
+struct tcpc_config_t tcpc_config_c1 = {
+ .bus_type = EC_BUS_TYPE_I2C,
+ .i2c_info = {
+ .port = I2C_PORT_USB_C1_TCPC,
+ .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
+ },
+ .drv = &nct38xx_tcpm_drv,
+ .flags = TCPC_FLAGS_TCPCI_REV2_0 |
+ TCPC_FLAGS_NO_DEBUG_ACC_CONTROL,
};
-#endif
-BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT);
-
-/******************************************************************************/
/* USBC PPC configuration */
struct ppc_config_t ppc_chips[] = {
- [USBC_PORT_C0] = {
- .i2c_port = I2C_PORT_USB_C0_C2_PPC,
- .i2c_addr_flags = SYV682X_ADDR0_FLAGS,
- .frs_en = IOEX_USB_C0_FRS_EN,
+ [USBC_PORT_C2] = {
+ .i2c_port = I2C_PORT_USB_C2_PPC,
+ .i2c_addr_flags = SYV682X_ADDR2_FLAGS,
.drv = &syv682x_drv,
},
[USBC_PORT_C1] = {
- /* Compatible with Silicon Mitus SM5360A */
+ /* Compatible with Silicon Mitus SM536A0 */
.i2c_port = I2C_PORT_USB_C1_PPC,
.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
.drv = &nx20p348x_drv,
},
- [USBC_PORT_C2] = {
- .i2c_port = I2C_PORT_USB_C0_C2_PPC,
- .i2c_addr_flags = SYV682X_ADDR2_FLAGS,
- .frs_en = IOEX_USB_C2_FRS_EN,
- .drv = &syv682x_drv,
- },
};
BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+struct ppc_config_t ppc_chips_c1 = {
+ .i2c_port = I2C_PORT_USB_C1_PPC,
+ .i2c_addr_flags = SYV682X_ADDR0_FLAGS,
+ .drv = &syv682x_drv,
+};
+
/* USBC mux configuration - Alder Lake includes internal mux */
-static const struct usb_mux usbc0_tcss_usb_mux = {
- .usb_port = USBC_PORT_C0,
+static const struct usb_mux usbc2_tcss_usb_mux = {
+ .usb_port = USBC_PORT_C2,
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
};
-static const struct usb_mux usbc2_tcss_usb_mux = {
- .usb_port = USBC_PORT_C2,
+
+static const struct usb_mux usbc1_tcss_usb_mux = {
+ .usb_port = USBC_PORT_C1,
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
};
@@ -146,14 +122,11 @@ static const struct usb_mux usbc1_usb3_db_retimer = {
.hpd_update = &ps8xxx_tcpc_update_hpd_status,
};
-const struct usb_mux usb_muxes[] = {
- [USBC_PORT_C0] = {
- .usb_port = USBC_PORT_C0,
- .driver = &bb_usb_retimer,
- .hpd_update = bb_retimer_hpd_update,
- .i2c_port = I2C_PORT_USB_C0_C2_MUX,
- .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR,
- .next_mux = &usbc0_tcss_usb_mux,
+struct usb_mux usb_muxes[] = {
+ [USBC_PORT_C2] = {
+ .usb_port = USBC_PORT_C2,
+ .driver = &virtual_usb_mux_driver,
+ .hpd_update = &virtual_hpd_update,
},
[USBC_PORT_C1] = {
/* PS8815 DB */
@@ -162,32 +135,38 @@ const struct usb_mux usb_muxes[] = {
.hpd_update = &virtual_hpd_update,
.next_mux = &usbc1_usb3_db_retimer,
},
- [USBC_PORT_C2] = {
+};
+BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
+
+static const struct usb_mux usb_muxes_c1 = {
+ .usb_port = USBC_PORT_C1,
+ .driver = &bb_usb_retimer,
+ .hpd_update = bb_retimer_hpd_update,
+ .i2c_port = I2C_PORT_USB_C1_MUX,
+ .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR,
+ .next_mux = &usbc1_tcss_usb_mux,
+};
+
+static const struct usb_mux usb_muxes_c2 = {
.usb_port = USBC_PORT_C2,
.driver = &bb_usb_retimer,
.hpd_update = bb_retimer_hpd_update,
- .i2c_port = I2C_PORT_USB_C0_C2_MUX,
+ .i2c_port = I2C_PORT_USB_C2_MUX,
.i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR,
.next_mux = &usbc2_tcss_usb_mux,
- },
};
-BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
-#ifndef CONFIG_ZEPHYR
+
/* BC1.2 charger detect configuration */
const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
- [USBC_PORT_C0] = {
- .i2c_port = I2C_PORT_USB_C0_C2_BC12,
- .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+ [USBC_PORT_C2] = {
+ .i2c_port = I2C_PORT_USB_C2_BC12,
+ .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS,
},
[USBC_PORT_C1] = {
.i2c_port = I2C_PORT_USB_C1_BC12,
.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
},
- [USBC_PORT_C2] = {
- .i2c_port = I2C_PORT_USB_C0_C2_BC12,
- .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS,
- },
};
BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
@@ -201,67 +180,20 @@ BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
*/
struct ioexpander_config_t ioex_config[] = {
- [IOEX_C0_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
+ [IOEX_C1_NCT38XX] = {
+ .i2c_host_port = I2C_PORT_USB_C1_TCPC,
.i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
.drv = &nct38xx_ioexpander_drv,
.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
},
[IOEX_C2_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
- },
- [IOEX_ID_1_C0_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
+ .i2c_host_port = I2C_PORT_USB_C2_TCPC,
.i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
.drv = &nct38xx_ioexpander_drv,
.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
},
- [IOEX_ID_1_C2_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
- },
};
BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
-#endif /* !CONFIG_ZEPHYR */
-
-#ifdef CONFIG_CHARGE_RAMP_SW
-
-/*
- * TODO(b/181508008): tune this threshold
- */
-
-#define BC12_MIN_VOLTAGE 4400
-
-/**
- * Return true if VBUS is too low
- */
-int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state)
-{
- int voltage;
-
- if (charger_get_vbus_voltage(port, &voltage))
- voltage = 0;
-
- if (voltage == 0) {
- CPRINTS("%s: must be disconnected", __func__);
- return 1;
- }
-
- if (voltage < BC12_MIN_VOLTAGE) {
- CPRINTS("%s: port %d: vbus %d lower than %d", __func__,
- port, voltage, BC12_MIN_VOLTAGE);
- return 1;
- }
-
- return 0;
-}
-
-#endif /* CONFIG_CHARGE_RAMP_SW */
void config_usb_db_type(void)
{
@@ -276,27 +208,14 @@ void config_usb_db_type(void)
__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
{
- enum ioex_signal rst_signal;
-
- if (me->usb_port == USBC_PORT_C0) {
-/* TODO: explore how to handle board id in zephyr*/
-#ifndef CONFIG_ZEPHYR
- if (get_board_id() == 1)
- rst_signal = IOEX_ID_1_USB_C0_RT_RST_ODL;
- else
-#endif /* !CONFIG_ZEPHYR */
- rst_signal = IOEX_USB_C0_RT_RST_ODL;
- } else if (me->usb_port == USBC_PORT_C2) {
-/* TODO: explore how to handle board id in zephyr*/
-#ifndef CONFIG_ZEPHYR
- if (get_board_id() == 1)
- rst_signal = IOEX_ID_1_USB_C2_RT_RST_ODL;
- else
-#endif /* !CONFIG_ZEPHYR */
- rst_signal = IOEX_USB_C2_RT_RST_ODL;
- } else {
+ int rst_signal;
+
+ if (me->usb_port == USBC_PORT_C1)
+ rst_signal = IOEX_USB_C1_RT_RST_ODL;
+ else if (me->usb_port == USBC_PORT_C2)
+ rst_signal = IOEX_USB_C2_RT_RST_ODL;
+ else
return EC_ERROR_INVAL;
- }
/*
* We do not have a load switch for the burnside bridge chips,
@@ -310,28 +229,14 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
* retimer_init() function ensures power is up before calling
* this function.
*/
- ioex_set_level(rst_signal, 1);
+ gpio_or_ioex_set_level(rst_signal, 1);
/*
* Allow 1ms time for the retimer to power up lc_domain
* which powers I2C controller within retimer
*/
msleep(1);
- if (get_board_id() == 1) {
- int val;
-
- /*
- * Check if we were able to deassert
- * reset. Board ID 1 uses a GPIO that is
- * uncontrollable when a debug accessory is
- * connected.
- */
- if (ioex_get_level(rst_signal, &val) != EC_SUCCESS)
- return EC_ERROR_UNKNOWN;
- if (val != 1)
- return EC_ERROR_NOT_POWERED;
- }
} else {
- ioex_set_level(rst_signal, 0);
+ gpio_or_ioex_set_level(rst_signal, 0);
msleep(1);
}
return EC_SUCCESS;
@@ -339,25 +244,16 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
void board_reset_pd_mcu(void)
{
- enum gpio_signal tcpc_rst;
-
- if (get_board_id() == 1)
-/* TODO: explore how to handle board id in zephyr*/
-#ifndef CONFIG_ZEPHYR
- tcpc_rst = GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL;
- else
-#endif /* !CONFIG_ZEPHYR */
- tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL;
-
/*
* TODO(b/179648104): figure out correct timing
*/
- gpio_set_level(tcpc_rst, 0);
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
+ gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 0);
+ gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
+
+ if (ec_cfg_usb_db_type() == DB_USB4_NCT3807)
gpio_set_level(GPIO_USB_C1_RST_ODL, 0);
- gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
- }
+
/*
* delay for power-on to reset-off and min. assertion time
@@ -365,56 +261,49 @@ void board_reset_pd_mcu(void)
msleep(20);
- gpio_set_level(tcpc_rst, 1);
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
+ gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 1);
+ gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
+
+ if (ec_cfg_usb_db_type() == DB_USB4_NCT3807)
gpio_set_level(GPIO_USB_C1_RST_ODL, 1);
- gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
- }
/* wait for chips to come up */
msleep(50);
}
+static void enable_ioex(int ioex)
+{
+ ioex_init(ioex);
+}
+
static void board_tcpc_init(void)
{
/* Don't reset TCPCs after initial reset */
- if (!system_jumped_late())
+ if (!system_jumped_late()) {
board_reset_pd_mcu();
- /*
- * These IO expander pins are implemented using the
- * C0/C2 TCPC, so they must be set up after the TCPC has
- * been taken out of reset.
- */
- if (get_board_id() == 1) {
- ioex_init(IOEX_ID_1_C0_NCT38XX);
- ioex_init(IOEX_ID_1_C2_NCT38XX);
- } else {
- ioex_init(IOEX_C0_NCT38XX);
- ioex_init(IOEX_C2_NCT38XX);
+ /*
+ * These IO expander pins are implemented using the
+ * C0/C2 TCPC, so they must be set up after the TCPC has
+ * been taken out of reset.
+ */
+ if (ec_cfg_usb_db_type() == DB_USB4_NCT3807)
+ enable_ioex(IOEX_C1_NCT38XX);
+ enable_ioex(IOEX_C2_NCT38XX);
}
/* Enable PPC interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
+ gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL);
/* Enable TCPC interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL);
+ gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
+ gpio_enable_interrupt(GPIO_USB_C2_TCPC_INT_ODL);
-#ifndef CONFIG_ZEPHYR
/* Enable BC1.2 interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
+ gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL);
-#endif /* !CONFIG_ZEPHYR */
-
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
- gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
-#ifndef CONFIG_ZEPHYR
- gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
-#endif /* !CONFIG_ZEPHYR */
- }
}
DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
@@ -422,11 +311,10 @@ uint16_t tcpc_get_alert_status(void)
{
uint16_t status = 0;
- if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0)
- status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2;
+ if (gpio_get_level(GPIO_USB_C2_TCPC_INT_ODL) == 0)
+ status |= PD_STATUS_TCPC_ALERT_0;
- if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) &&
- gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
+ if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
status |= PD_STATUS_TCPC_ALERT_1;
return status;
@@ -434,25 +322,20 @@ uint16_t tcpc_get_alert_status(void)
int ppc_get_alert_status(int port)
{
- if (port == USBC_PORT_C0)
- return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
- else if ((port == USBC_PORT_C1) &&
- (ec_cfg_usb_db_type() != DB_USB_ABSENT))
- return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
- else if (port == USBC_PORT_C2)
+ if (port == USBC_PORT_C2)
return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0;
+ else if (port == USBC_PORT_C1)
+ return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
return 0;
}
void tcpc_alert_event(enum gpio_signal signal)
{
switch (signal) {
- case GPIO_USB_C0_C2_TCPC_INT_ODL:
- schedule_deferred_pd_interrupt(USBC_PORT_C0);
+ case GPIO_USB_C2_TCPC_INT_ODL:
+ schedule_deferred_pd_interrupt(USBC_PORT_C2);
break;
case GPIO_USB_C1_TCPC_INT_ODL:
- if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
- break;
schedule_deferred_pd_interrupt(USBC_PORT_C1);
break;
default:
@@ -463,17 +346,12 @@ void tcpc_alert_event(enum gpio_signal signal)
void bc12_interrupt(enum gpio_signal signal)
{
switch (signal) {
- case GPIO_USB_C0_BC12_INT_ODL:
+ case GPIO_USB_C2_BC12_INT_ODL:
task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
break;
case GPIO_USB_C1_BC12_INT_ODL:
- if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
- break;
task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
break;
- case GPIO_USB_C2_BC12_INT_ODL:
- task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12);
- break;
default:
break;
}
@@ -482,17 +360,14 @@ void bc12_interrupt(enum gpio_signal signal)
void ppc_interrupt(enum gpio_signal signal)
{
switch (signal) {
- case GPIO_USB_C0_PPC_INT_ODL:
- syv682x_interrupt(USBC_PORT_C0);
- break;
case GPIO_USB_C1_PPC_INT_ODL:
switch (ec_cfg_usb_db_type()) {
- case DB_USB_ABSENT:
- case DB_USB_ABSENT2:
- break;
case DB_USB3_PS8815:
nx20p348x_interrupt(USBC_PORT_C1);
break;
+ case DB_USB4_NCT3807:
+ syv682x_interrupt(USBC_PORT_C1);
+ break;
}
break;
case GPIO_USB_C2_PPC_INT_ODL:
@@ -512,12 +387,15 @@ void retimer_interrupt(enum gpio_signal signal)
__override bool board_is_dts_port(int port)
{
- return port == USBC_PORT_C0;
+ return port == USBC_PORT_C2;
}
__override bool board_is_tbt_usb4_port(int port)
{
- if (port == USBC_PORT_C0 || port == USBC_PORT_C2)
+ if (((port == USBC_PORT_C2) &&
+ (ec_cfg_usb_mb_type() == MB_USB4_TBT)) ||
+ ((port == USBC_PORT_C1) &&
+ (ec_cfg_usb_db_type() == DB_USB4_NCT3807)))
return true;
return false;
@@ -530,3 +408,15 @@ __override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port)
return TBT_SS_TBT_GEN3;
}
+
+void db_update_usb4_config_from_config(void)
+{
+ tcpc_config[USBC_PORT_C1] = tcpc_config_c1;
+ ppc_chips[USBC_PORT_C1] = ppc_chips_c1;
+ usb_muxes[USBC_PORT_C1] = usb_muxes_c1;
+}
+
+void mb_update_usb4_tbt_config_from_config(void)
+{
+ usb_muxes[USBC_PORT_C2] = usb_muxes_c2;
+}
diff --git a/board/mithrax/usbc_config.h b/board/mithrax/usbc_config.h
index ef292aa3d7..9f0a26210f 100644
--- a/board/mithrax/usbc_config.h
+++ b/board/mithrax/usbc_config.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -8,17 +8,18 @@
#ifndef __CROS_EC_USBC_CONFIG_H
#define __CROS_EC_USBC_CONFIG_H
-#ifndef CONFIG_ZEPHYR
-#define CONFIG_USB_PD_PORT_MAX_COUNT 3
-#endif
+#define CONFIG_USB_PD_PORT_MAX_COUNT 2
+#define CONFIG_USB_PD_TCPC_RUNTIME_CONFIG
+#define CONFIG_USB_MUX_RUNTIME_CONFIG
enum usbc_port {
- USBC_PORT_C0 = 0,
+ USBC_PORT_C2 = 0,
USBC_PORT_C1,
- USBC_PORT_C2,
USBC_PORT_COUNT
};
void config_usb_db_type(void);
+void db_update_usb4_config_from_config(void);
+void mb_update_usb4_tbt_config_from_config(void);
#endif /* __CROS_EC_USBC_CONFIG_H */
diff --git a/board/mithrax/vif_override.xml b/board/mithrax/vif_override.xml
index 6ade5d2f92..32736caf64 100644
--- a/board/mithrax/vif_override.xml
+++ b/board/mithrax/vif_override.xml
@@ -1,148 +1,3 @@
-<?xml version="1.0" encoding="utf-8"?>
-<vif:VIF xmlns="http://usb.org/VendorInfoFile.xsd">
- <vif:Product_Revision>2</vif:Product_Revision>
- <vif:TID>0</vif:TID>
- <vif:Product>
- <vif:USB4_Num_Internal_Host_Controllers value="1" />
- <vif:USB4_Num_PCIe_DN_Bridges value="0" />
- <vif:USB4RouterList>
- <vif:Usb4Router>
- <!--USB4 Router 0-->
- <vif:USB4_Router_ID value="0" />
- <vif:USB4_Silicon_VID value="32903">8087</vif:USB4_Silicon_VID>
- <vif:USB4_Num_Lane_Adapters value="4" />
- <vif:USB4_Num_USB3_DN_Adapters value="1" />
- <vif:USB4_Num_DP_IN_Adapters value="1" />
- <vif:USB4_Num_DP_OUT_Adapters value="0" />
- <vif:USB4_Num_PCIe_DN_Adapters value="4" />
- <vif:USB4_TBT3_Not_Supported value="0">TBT3 Compatible</vif:USB4_TBT3_Not_Supported>
- <vif:USB4_PCIe_Wake_Supported value="true" />
- <vif:USB4_USB3_Wake_Supported value="false" />
- <vif:USB4_Num_Unused_Adapters value="0" />
- <vif:USB4_TBT3_VID value="32903">8087</vif:USB4_TBT3_VID>
- <vif:USB4_PCIe_Switch_Vendor_ID value="32902">8086</vif:USB4_PCIe_Switch_Vendor_ID>
- <vif:USB4_PCIe_Switch_Device_ID value="39451">9A1B</vif:USB4_PCIe_Switch_Device_ID>
- </vif:Usb4Router>
- </vif:USB4RouterList>
- </vif:Product>
-
- <vif:Component>
- <vif:USB4_Max_Speed value="1">Gen 3 (40Gb)</vif:USB4_Max_Speed>
-
- <!--;USB Host-->
-
- <vif:Host_Speed value="4">USB 3.2 Gen 2x2</vif:Host_Speed>
- <vif:Host_Contains_Captive_Retimer value="true" />
- <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
- <vif:Host_Suspend_Supported value="true" />
-
- <!--;PD Source-->
- <!-- will we ever clear USB_Suspend_Supported? -->
- <vif:USB_Suspend_May_Be_Cleared value="true" />
-
- <!-- remove FR_Swap_* when we enable CONFIG_USB_PD_FRS -->
- <!--;Dual Role-->
- <vif:FR_Swap_Supported_As_Initial_Sink value="true" />
- <!--;PD Source-->
- <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="3">3A @ 5V</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
- <vif:SrcPdoList>
- <vif:SrcPDO>
- <!--Source PDO 1-->
- <vif:Src_PD_OCP_OC_Debounce value="50">50 msec</vif:Src_PD_OCP_OC_Debounce>
- <vif:Src_PD_OCP_OC_Threshold value="360">3600 mA</vif:Src_PD_OCP_OC_Threshold>
- </vif:SrcPDO>
- </vif:SrcPdoList>
-
- <!-- SOP Discover ID -->
- <vif:Product_Type_UFP_SOP value="2">PDUSB Peripheral</vif:Product_Type_UFP_SOP>
- <vif:Product_Type_DFP_SOP value="2">PDUSB Host</vif:Product_Type_DFP_SOP>
-
- <!-- USB4 Port -->
- <vif:USB4_Lane_0_Adapter value="1" />
- <vif:USB4_UFP_Supported value="false" />
- <vif:USB4_DFP_Supported value="true" />
- <vif:USB4_USB3_Tunneling_Supported value="true" />
- <vif:USB4_DP_Tunneling_Supported value="true" />
- <vif:USB4_CL1_State_Supported value="true" />
- <vif:USB4_CL2_State_Supported value="true" />
- <vif:USB4_Num_Retimers value="1" />
- <vif:USB4_DP_Bit_Rate value="3">HBR3</vif:USB4_DP_Bit_Rate>
- <vif:USB4_Num_DP_Lanes value="4">4 Lanes</vif:USB4_Num_DP_Lanes>
-
- </vif:Component>
-
- <vif:Component>
- <vif:USB4_Supported value="false" />
-
- <!--;USB Host-->
- <vif:Host_Speed value="2">USB 3.2 Gen 2x1</vif:Host_Speed>
- <vif:Host_Contains_Captive_Retimer value="true" />
- <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
- <vif:Host_Suspend_Supported value="true" />
-
- <!--;PD Source-->
- <!-- will we ever clear USB_Suspend_Supported? -->
- <vif:USB_Suspend_May_Be_Cleared value="true" />
-
- <!-- remove FR_Swap_* when we enable CONFIG_USB_PD_FRS -->
- <!--;Dual Role-->
- <vif:FR_Swap_Supported_As_Initial_Sink value="true" />
- <!--;PD Source-->
- <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="3">3A @ 5V</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
- <vif:SrcPdoList>
- <vif:SrcPDO>
- <!--Source PDO 1-->
- <vif:Src_PD_OCP_OC_Debounce value="50">50 msec</vif:Src_PD_OCP_OC_Debounce>
- <vif:Src_PD_OCP_OC_Threshold value="360">3600 mA</vif:Src_PD_OCP_OC_Threshold>
- </vif:SrcPDO>
- </vif:SrcPdoList>
-
- <!-- SOP Discover ID -->
- <vif:Product_Type_UFP_SOP value="3">PSD</vif:Product_Type_UFP_SOP>
- <vif:Product_Type_DFP_SOP value="2">PDUSB Host</vif:Product_Type_DFP_SOP>
-
- </vif:Component>
-
- <vif:Component>
- <vif:USB4_Max_Speed value="1">Gen 3 (40Gb)</vif:USB4_Max_Speed>
- <!--;USB Host-->
- <vif:Host_Speed value="4">USB 3.2 Gen 2x2</vif:Host_Speed>
- <vif:Host_Contains_Captive_Retimer value="true" />
- <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
- <vif:Host_Suspend_Supported value="true" />
-
- <!--;PD Source-->
- <!-- will we ever clear USB_Suspend_Supported? -->
- <vif:USB_Suspend_May_Be_Cleared value="true" />
-
- <!-- remove FR_Swap_* when we enable CONFIG_USB_PD_FRS -->
- <!--;Dual Role-->
- <vif:FR_Swap_Supported_As_Initial_Sink value="true" />
- <!--;PD Source-->
- <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="3">3A @ 5V</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
- <vif:SrcPdoList>
- <vif:SrcPDO>
- <!--Source PDO 1-->
- <vif:Src_PD_OCP_OC_Debounce value="50">50 msec</vif:Src_PD_OCP_OC_Debounce>
- <vif:Src_PD_OCP_OC_Threshold value="360">3600 mA</vif:Src_PD_OCP_OC_Threshold>
- </vif:SrcPDO>
- </vif:SrcPdoList>
-
- <!-- SOP Discover ID -->
- <vif:Product_Type_UFP_SOP value="2">PDUSB Peripheral</vif:Product_Type_UFP_SOP>
- <vif:Product_Type_DFP_SOP value="2">PDUSB Host</vif:Product_Type_DFP_SOP>
-
- <!-- USB4 Port -->
- <vif:USB4_Lane_0_Adapter value="1" />
- <vif:USB4_UFP_Supported value="false" />
- <vif:USB4_DFP_Supported value="true" />
- <vif:USB4_USB3_Tunneling_Supported value="true" />
- <vif:USB4_DP_Tunneling_Supported value="true" />
- <vif:USB4_CL1_State_Supported value="true" />
- <vif:USB4_CL2_State_Supported value="true" />
- <vif:USB4_Num_Retimers value="1" />
- <vif:USB4_DP_Bit_Rate value="3">HBR3</vif:USB4_DP_Bit_Rate>
- <vif:USB4_Num_DP_Lanes value="4">4 Lanes</vif:USB4_Num_DP_Lanes>
-
- </vif:Component>
-</vif:VIF>
+<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File
+ Definition from the USB-IF.
+-->
View Lorry Controller Status