diff options
author | Ruibin Chang <ruibin.chang@ite.com.tw> | 2020-07-07 15:20:51 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-09-18 14:09:35 +0000 |
commit | 8e82913186916a485ec34e09f207fc0f5fc45b73 (patch) | |
tree | b5f82e09d479ed07b4071231cdfe303106613b69 | |
parent | e848f17193a803e591f7fdda908d4ae408a17527 (diff) | |
download | chrome-ec-8e82913186916a485ec34e09f207fc0f5fc45b73.tar.gz |
TCPMv1, TCPMv2: add pd event for receiving hard reset
When we receive hard reset message, we call pd_execute_hard_reset()
and set task to hard reset state, but the waked up pd_task() may have
chance setting to other state. So I add a pd event for receiving hard
reset, then waked up pd_task() set the state to hard reset.
TCPMv1: When we are in SNK_HRAD_RESET_RECOVER state, we enable rx.
At this time If port partner sends source capability, HW auto responds
GoodCRC, but in SNK_HRAD_RESET_RECOVER state the handle_data_request()
can't process source capability then break the case. So partner sender
response timeout and tx hard reset. So I move the enable_rx() to
SNK_DISCOVERY state that we are able to handle source capability.
BRANCH=None
BUG=b:159394180
TEST=On board reef_it8320, and it81202_pdevb:
1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection,
When we're SRC and SNK.
2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection,
When we're SRC and SNK.
Change-Id: Ia4944883f4ee0420183cb4d1ec62743c49386ea3
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1389992
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2416074
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Commit-Queue: Eric Yilun Lin <yllin@chromium.org>
-rw-r--r-- | common/usb_pd_protocol.c | 25 | ||||
-rw-r--r-- | include/usb_pd.h | 1 |
2 files changed, 16 insertions, 10 deletions
diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c index 5e48c2f0fd..fb43754e78 100644 --- a/common/usb_pd_protocol.c +++ b/common/usb_pd_protocol.c @@ -903,6 +903,7 @@ void pd_execute_hard_reset(int port) CPRINTF("C%d HARD RST RX\n", port); pd[port].msg_id = 0; + tcpm_set_rx_enable(port, 0); #ifdef CONFIG_USB_PD_ALT_MODE_DFP pd_dfp_exit_mode(port, 0, 0); #endif @@ -2239,6 +2240,9 @@ void pd_task(void *u) } #endif + if (evt & PD_EVENT_RX_HARD_RESET) + pd_execute_hard_reset(port); + /* process any potential incoming message */ incoming_packet = evt & PD_EVENT_RX; if (incoming_packet) { @@ -2919,16 +2923,6 @@ void pd_task(void *u) } if (pd_is_vbus_present(port) && snk_hard_reset_vbus_off) { -#ifdef CONFIG_USB_PD_TCPM_TCPCI - /* - * After transmitting hard reset, TCPM writes - * to RECEIVE_MESSAGE register to enable - * PD message passing. - */ - if (pd_comm_is_enabled(port)) - tcpm_set_rx_enable(port, 1); -#endif /* CONFIG_USB_PD_TCPM_TCPCI */ - /* VBUS went high again */ set_state(port, PD_STATE_SNK_DISCOVERY); timeout = 10*MSEC; @@ -2944,6 +2938,17 @@ void pd_task(void *u) /* Wait for source cap expired only if we are enabled */ if ((pd[port].last_state != pd[port].task_state) && pd_comm_is_enabled(port)) { +#ifdef CONFIG_USB_PD_TCPM_TCPCI + /* + * If we come from hard reset recover state, + * then we can process the source capabilities + * form partner now, so enable PHY layer + * receiving function. + */ + if (pd[port].last_state == + PD_STATE_SNK_HARD_RESET_RECOVER) + tcpm_set_rx_enable(port, 1); +#endif /* CONFIG_USB_PD_TCPM_TCPCI */ /* * If VBUS has never been low, and we timeout * waiting for source cap, try a soft reset diff --git a/include/usb_pd.h b/include/usb_pd.h index 4d303b5766..4c585a57b3 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -43,6 +43,7 @@ enum pd_rx_errors { #define PD_EVENT_CC (1<<4) /* CC line change event */ #define PD_EVENT_TCPC_RESET (1<<5) /* TCPC has reset */ #define PD_EVENT_UPDATE_DUAL_ROLE (1<<6) /* DRP state has changed */ +#define PD_EVENT_RX_HARD_RESET (1<<12) /* Receive a Hard Reset. */ /* --- PD data message helpers --- */ #define PDO_MAX_OBJECTS 7 |