diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:51:02 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-28 13:14:00 +0000 |
| commit | 9e454d41e19b72aad96802ee71fdd439f1cae514 (patch) | |
| tree | da9290ee9e860cae893920433ff7c45ad3e51297 | |
| parent | 22b958eff1b23d6711a67766bcc1505e2020f299 (diff) | |
| download | chrome-ec-9e454d41e19b72aad96802ee71fdd439f1cae514.tar.gz | |
driver/led/aw20198.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I9c209550976809ffb578e59288c244d229045996
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730013
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| -rw-r--r-- | driver/led/aw20198.h | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/driver/led/aw20198.h b/driver/led/aw20198.h index bbb284cc3a..84aacfc7db 100644 --- a/driver/led/aw20198.h +++ b/driver/led/aw20198.h @@ -7,38 +7,38 @@ #define __CROS_EC_DRIVER_LED_AW20198_H /* This depends on AD0 and AD1. (GRD, GRD) = 0x20. */ -#define AW20198_I2C_ADDR_FLAG 0x20 - -#define AW20198_ROW_SIZE 6 -#define AW20198_COL_SIZE 11 -#define AW20198_GRID_SIZE (AW20198_COL_SIZE * AW20198_ROW_SIZE) - -#define AW20198_PAGE_FUNC 0xC0 -#define AW20198_PAGE_PWM 0xC1 -#define AW20198_PAGE_SCALE 0xC2 - -#define AW20198_REG_GCR 0x00 -#define AW20198_REG_GCR_SWSEL_MASK 0xF0 -#define AW20198_REG_GCR_SWSEL_SHIFT 4 -#define AW20198_REG_GCR_SW1_ACTIVE 0 -#define AW20198_REG_GCR_SW1_TO_SW2_ACTIVE 1 -#define AW20198_REG_GCR_SW1_TO_SW3_ACTIVE 2 -#define AW20198_REG_GCR_SW1_TO_SW4_ACTIVE 3 -#define AW20198_REG_GCR_SW1_TO_SW5_ACTIVE 4 -#define AW20198_REG_GCR_SW1_TO_SW6_ACTIVE 5 -#define AW20198_REG_GCR_SW1_TO_SW7_ACTIVE 6 -#define AW20198_REG_GCR_SW1_TO_SW8_ACTIVE 7 -#define AW20198_REG_GCR_SW1_TO_SW9_ACTIVE 8 -#define AW20198_REG_GCR_SW1_TO_SW10_ACTIVE 9 -#define AW20198_REG_GCR_SW1_TO_SW11_ACTIVE 10 - -#define AW20198_REG_GCC 0x01 -#define AW20198_REG_RSTN 0x2F -#define AW20198_REG_MIXCR 0x46 -#define AW20198_REG_PAGE 0xF0 - -#define AW20198_RESET_MAGIC 0xAE +#define AW20198_I2C_ADDR_FLAG 0x20 + +#define AW20198_ROW_SIZE 6 +#define AW20198_COL_SIZE 11 +#define AW20198_GRID_SIZE (AW20198_COL_SIZE * AW20198_ROW_SIZE) + +#define AW20198_PAGE_FUNC 0xC0 +#define AW20198_PAGE_PWM 0xC1 +#define AW20198_PAGE_SCALE 0xC2 + +#define AW20198_REG_GCR 0x00 +#define AW20198_REG_GCR_SWSEL_MASK 0xF0 +#define AW20198_REG_GCR_SWSEL_SHIFT 4 +#define AW20198_REG_GCR_SW1_ACTIVE 0 +#define AW20198_REG_GCR_SW1_TO_SW2_ACTIVE 1 +#define AW20198_REG_GCR_SW1_TO_SW3_ACTIVE 2 +#define AW20198_REG_GCR_SW1_TO_SW4_ACTIVE 3 +#define AW20198_REG_GCR_SW1_TO_SW5_ACTIVE 4 +#define AW20198_REG_GCR_SW1_TO_SW6_ACTIVE 5 +#define AW20198_REG_GCR_SW1_TO_SW7_ACTIVE 6 +#define AW20198_REG_GCR_SW1_TO_SW8_ACTIVE 7 +#define AW20198_REG_GCR_SW1_TO_SW9_ACTIVE 8 +#define AW20198_REG_GCR_SW1_TO_SW10_ACTIVE 9 +#define AW20198_REG_GCR_SW1_TO_SW11_ACTIVE 10 + +#define AW20198_REG_GCC 0x01 +#define AW20198_REG_RSTN 0x2F +#define AW20198_REG_MIXCR 0x46 +#define AW20198_REG_PAGE 0xF0 + +#define AW20198_RESET_MAGIC 0xAE extern const struct rgbkbd_drv aw20198_drv; -#endif /* __CROS_EC_DRIVER_LED_AW20198_H */ +#endif /* __CROS_EC_DRIVER_LED_AW20198_H */ |