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authorJack Rosenthal <jrosenth@chromium.org>2022-06-27 13:15:30 -0600
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-06-29 00:45:57 +0000
commita1a0b3080112f6bd24464b12c5da0bb7d037243f (patch)
treeed22ff9f828496eeff800aa0b7bf27f190fe2d4a
parent763b2f3c7bc328a8d3cbc1d548cbf754d2a8a182 (diff)
downloadchrome-ec-a1a0b3080112f6bd24464b12c5da0bb7d037243f.tar.gz
baseboard/herobrine/baseboard.h: Format with clang-format
BUG=b:236386294 BRANCH=none TEST=none Change-Id: I8e4650402acc70df2fd291dcb78bddae55f5c731 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3727525 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
-rw-r--r--baseboard/herobrine/baseboard.h88
1 files changed, 43 insertions, 45 deletions
diff --git a/baseboard/herobrine/baseboard.h b/baseboard/herobrine/baseboard.h
index ae5b2a3d33..065437dd52 100644
--- a/baseboard/herobrine/baseboard.h
+++ b/baseboard/herobrine/baseboard.h
@@ -13,12 +13,12 @@
* The sensor stack is generating a lot of activity.
* They can be enabled through the console command 'chan'.
*/
-#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_HOSTCMD)))
+#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_HOSTCMD)))
/* NPCX7 config */
-#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
-#define NPCX_TACH_SEL2 0 /* No tach. */
-#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
+#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
+#define NPCX_TACH_SEL2 0 /* No tach. */
+#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
/* Internal SPI flash on NPCX7 */
#define CONFIG_SPI_FLASH_REGS
@@ -140,13 +140,13 @@
#define CONFIG_CMD_ACCEL_INFO
/* PD */
-#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
-#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
-#define PD_OPERATING_POWER_MW 10000
-#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)
-#define PD_MAX_CURRENT_MA 3000
-#define PD_MAX_VOLTAGE_MV 20000
+#define PD_OPERATING_POWER_MW 10000
+#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
/* Chipset */
#define CONFIG_CHIPSET_SC7280
@@ -163,56 +163,54 @@
* then redefined here to so it's more clear which signal is being used for
* which purpose.
*/
-#define GPIO_POWER_BUTTON_L GPIO_EC_PWR_BTN_ODL
-#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL
-#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL
-#define GPIO_LID_OPEN GPIO_LID_OPEN_EC
-#define GPIO_SHI_CS_L GPIO_AP_EC_SPI_CS_L
-#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
-#define GPIO_BATT_PRES_ODL GPIO_EC_BATT_PRES_ODL
-#define GPIO_ENABLE_BACKLIGHT GPIO_EC_BL_DISABLE_L
-#define GPIO_BOARD_VERSION1 GPIO_BRD_ID0
-#define GPIO_BOARD_VERSION2 GPIO_BRD_ID1
-#define GPIO_BOARD_VERSION3 GPIO_BRD_ID2
-#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
+#define GPIO_POWER_BUTTON_L GPIO_EC_PWR_BTN_ODL
+#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL
+#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL
+#define GPIO_LID_OPEN GPIO_LID_OPEN_EC
+#define GPIO_SHI_CS_L GPIO_AP_EC_SPI_CS_L
+#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
+#define GPIO_BATT_PRES_ODL GPIO_EC_BATT_PRES_ODL
+#define GPIO_ENABLE_BACKLIGHT GPIO_EC_BL_DISABLE_L
+#define GPIO_BOARD_VERSION1 GPIO_BRD_ID0
+#define GPIO_BOARD_VERSION2 GPIO_BRD_ID1
+#define GPIO_BOARD_VERSION3 GPIO_BRD_ID2
+#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
/* I2C Ports */
#define I2C_PORT_BATTERY I2C_PORT_POWER
#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY
#define I2C_PORT_CHARGER I2C_PORT_POWER
-#define I2C_PORT_ACCEL I2C_PORT_SENSOR
-#define I2C_PORT_POWER NPCX_I2C_PORT0_0
-#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0
-#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
-#define I2C_PORT_WLC NPCX_I2C_PORT3_0
-#define I2C_PORT_RTC NPCX_I2C_PORT4_1
-#define I2C_PORT_EEPROM NPCX_I2C_PORT5_0
-#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
+#define I2C_PORT_ACCEL I2C_PORT_SENSOR
+#define I2C_PORT_POWER NPCX_I2C_PORT0_0
+#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0
+#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
+#define I2C_PORT_WLC NPCX_I2C_PORT3_0
+#define I2C_PORT_RTC NPCX_I2C_PORT4_1
+#define I2C_PORT_EEPROM NPCX_I2C_PORT5_0
+#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
/* UART */
#define CONFIG_CMD_CHARGEN
/* Define the host events which are allowed to wake AP up from S3 */
-#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \
- (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_RTC) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_DEVICE))
+#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \
+ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_RTC) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_DEVICE))
/* And the MKBP events */
#ifdef HAS_TASK_KEYSCAN
-#define CONFIG_MKBP_EVENT_WAKEUP_MASK \
- (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \
- BIT(EC_MKBP_EVENT_HOST_EVENT) | \
- BIT(EC_MKBP_EVENT_SENSOR_FIFO))
+#define CONFIG_MKBP_EVENT_WAKEUP_MASK \
+ (BIT(EC_MKBP_EVENT_KEY_MATRIX) | BIT(EC_MKBP_EVENT_HOST_EVENT) | \
+ BIT(EC_MKBP_EVENT_SENSOR_FIFO))
#else
#define CONFIG_MKBP_EVENT_WAKEUP_MASK \
- (BIT(EC_MKBP_EVENT_HOST_EVENT) | \
- BIT(EC_MKBP_EVENT_SENSOR_FIFO))
+ (BIT(EC_MKBP_EVENT_HOST_EVENT) | BIT(EC_MKBP_EVENT_SENSOR_FIFO))
#endif
#endif /* __CROS_EC_BASEBOARD_H */