krabby: enable zephyr build

Copy from asurada/hayato, will cleanup in following CLs.

BUG=b:202808130
TEST=zmake -D -l DEBUG configure -b zephyr/projects/corsola/krabby/
BRANCH=main

Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I667ed99bd418997e932ca272daed936db54988f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3219882
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>

15 files changed, 1226 insertions, 0 deletions

diff --git a/zephyr/boards/riscv/corsola/Kconfig.board b/zephyr/boards/riscv/corsola/Kconfig.board
new file mode 100644
index 0000000000..7968f223cd
--- /dev/null
+++ b/zephyr/boards/riscv/corsola/Kconfig.board
@@ -0,0 +1,14 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# "BOARD" below refers to a Zephyr board, which does not have a 1:1
+# mapping with the Chrome OS concept of a board.  By Zephyr's
+# conventions, we'll still call it "BOARD_*" to make this more
+# applicable to be upstreamed, even though this code is shared by all
+# projects using Trogdor baseboard.
+config BOARD_CORSOLA
+	bool "Google Asurada Baseboard"
+	depends on SOC_IT8XXX2
+	# Allow generating initial 0 line coverage.
+	select HAS_COVERAGE_SUPPORT
diff --git a/zephyr/boards/riscv/corsola/Kconfig.defconfig b/zephyr/boards/riscv/corsola/Kconfig.defconfig
new file mode 100644
index 0000000000..bec25afa54
--- /dev/null
+++ b/zephyr/boards/riscv/corsola/Kconfig.defconfig
@@ -0,0 +1,56 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if BOARD_CORSOLA
+
+config BOARD
+	default "corsola"
+
+# Zephyr internal stack sizes
+
+config IDLE_STACK_SIZE
+	default 256
+
+config ISR_STACK_SIZE
+	default 800
+
+config SHELL_STACK_SIZE
+	default 1048
+
+config SYSTEM_WORKQUEUE_STACK_SIZE
+	default 1024
+
+
+# Chromium EC stack sizes
+
+config TASK_CHARGER_STACK_SIZE
+	default 960
+
+config TASK_CHIPSET_STACK_SIZE
+	default 820
+
+config TASK_HOOKS_STACK_SIZE
+	default 672
+
+config TASK_HOSTCMD_STACK_SIZE
+	default 1024
+
+config TASK_KEYSCAN_STACK_SIZE
+	default 920
+
+config TASK_MOTIONSENSE_STACK_SIZE
+	default 920
+
+config TASK_PD_STACK_SIZE
+	default 1024
+
+config TASK_USB_CHG_STACK_SIZE
+	default 800
+
+
+choice PLATFORM_EC_HOSTCMD_DEBUG_MODE
+	default HCDEBUG_OFF
+endchoice # PLATFORM_EC_HOSTCMD_DEBUG_MODE
+
+endif # BOARD_CORSOLA
diff --git a/zephyr/boards/riscv/corsola/corsola.dts b/zephyr/boards/riscv/corsola/corsola.dts
new file mode 100644
index 0000000000..9fe934604e
--- /dev/null
+++ b/zephyr/boards/riscv/corsola/corsola.dts
@@ -0,0 +1,202 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <cros/ite/it8xxx2.dtsi>
+#include <dt-bindings/adc/adc.h>
+#include <dt-bindings/gpio_defines.h>
+#include <it8xxx2.dtsi>
+#include <dt-bindings/wake_mask_event_defines.h>
+
+/ {
+	model = "Google Corsola Baseboard";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,flash = &flash0;
+		zephyr,flash-controller = &flashctrl;
+	};
+
+	ec-mkbp-host-event-wakeup-mask {
+		compatible = "ec-wake-mask-event";
+		wakeup-mask = <(
+			HOST_EVENT_MASK(HOST_EVENT_AC_CONNECTED) |
+			HOST_EVENT_MASK(HOST_EVENT_AC_DISCONNECTED) |
+			HOST_EVENT_MASK(HOST_EVENT_LID_OPEN) |
+			HOST_EVENT_MASK(HOST_EVENT_POWER_BUTTON) |
+			HOST_EVENT_MASK(HOST_EVENT_HANG_DETECT) |
+			HOST_EVENT_MASK(HOST_EVENT_MODE_CHANGE))>;
+	};
+
+	ec-mkbp-event-wakeup-mask {
+		compatible = "ec-wake-mask-event";
+		wakeup-mask = <(MKBP_EVENT_KEY_MATRIX |
+				MKBP_EVENT_HOST_EVENT)>;
+	};
+
+	named-adc-channels {
+		compatible = "named-adc-channels";
+
+		adc_vbus_c0 {
+			label = "ADC_VBUS_C0";
+			enum-name = "ADC_VBUS_C0";
+			channel = <0>;
+			mul = <10>;
+		};
+		adc_board_id0 {
+			label = "ADC_BOARD_ID_0";
+			enum-name = "ADC_BOARD_ID_0";
+			channel = <1>;
+		};
+		adc_board_id1 {
+			label = "ADC_BOARD_ID_1";
+			enum-name = "ADC_BOARD_ID_1";
+			channel = <2>;
+		};
+		adc_charger_amon_r {
+			label = "ADC_AMON_BMON";
+			enum-name = "ADC_AMON_BMON";
+			channel = <3>;
+			mul = <1000>;
+			div = <18>;
+		};
+		adc_vbus_c1 {
+			label = "ADC_VBUS_C1";
+			enum-name = "ADC_VBUS_C1";
+			channel = <5>;
+			mul = <10>;
+		};
+		adc_charger_pmon {
+			label = "ADC_PMON";
+			enum-name = "ADC_PMON";
+			channel = <6>;
+		};
+		adc-psys {
+			label = "ADC_PSYS";
+			enum-name = "ADC_PSYS";
+			channel = <6>;
+		};
+	};
+
+	named-i2c-ports {
+		compatible = "named-i2c-ports";
+
+		power {
+			i2c-port = <&i2c0>;
+			enum-name = "I2C_PORT_POWER";
+			label = "POWER";
+		};
+		battery {
+			i2c-port = <&i2c0>;
+			remote-port = <0>;
+			enum-name = "I2C_PORT_BATTERY";
+			label = "BATTERY";
+		};
+		eeprom {
+			i2c-port = <&i2c0>;
+			enum-name = "I2C_PORT_EEPROM";
+			label = "EEPROM";
+		};
+		charger {
+			i2c-port = <&i2c0>;
+			enum-name = "I2C_PORT_CHARGER";
+			label = "CHARGER";
+		};
+		i2c_sensor: sensor {
+			i2c-port = <&i2c1>;
+			enum-name = "I2C_PORT_SENSOR";
+			label = "SENSOR";
+		};
+		i2c-accel {
+			i2c-port = <&i2c1>;
+			enum-name = "I2C_PORT_ACCEL";
+			label = "ACCEL";
+		};
+		ppc0 {
+			i2c-port = <&i2c2>;
+			enum-name = "I2C_PORT_PPC0";
+			label = "PPC0";
+		};
+		ppc1 {
+			i2c-port = <&i2c4>;
+			enum-name = "I2C_PORT_PPC1";
+			label = "PPC1";
+		};
+		usb-c0 {
+			i2c-port = <&i2c2>;
+			enum-name = "I2C_PORT_USB_C0";
+			label = "USB_C0";
+		};
+		usb-c1 {
+			i2c-port = <&i2c4>;
+			enum-name = "I2C_PORT_USB_C1";
+			label = "USB_C1";
+		};
+		usb-mux0 {
+			i2c-port = <&i2c2>;
+			enum-name = "I2C_PORT_USB_MUX0";
+			label = "USB_MUX0";
+		};
+		usb-mux1 {
+			i2c-port = <&i2c4>;
+			enum-name = "I2C_PORT_USB_MUX1";
+			label = "USB_MUX1";
+		};
+	};
+
+	soc {
+		/delete-node/ kscan@f01d00;
+
+		cros_kb_raw: cros-kb-raw@f01d00 {
+			compatible = "ite,it8xxx2-cros-kb-raw";
+			reg = <0x00f01d00 0x29>;
+			label = "CROS_KB_RAW_0";
+			interrupt-parent = <&intc>;
+			interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <1804800>;
+};
+
+&adc0 {
+	status = "okay";
+};
+
+&i2c0 {
+	/* EC_I2C_PWR_CBI */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+};
+
+&i2c1 {
+	/* EC_I2C_SENSOR */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c2 {
+	/* EC_I2C_USB_C0 */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c4{
+	/* EC_I2C_USB_C1 */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&cros_kb_raw {
+	status = "okay";
+};
diff --git a/zephyr/boards/riscv/corsola/corsola_defconfig b/zephyr/boards/riscv/corsola/corsola_defconfig
new file mode 100644
index 0000000000..6dd0b3674b
--- /dev/null
+++ b/zephyr/boards/riscv/corsola/corsola_defconfig
@@ -0,0 +1,98 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y
+
+# Platform Configuration
+CONFIG_SOC_IT8XXX2=y
+CONFIG_BOARD_CORSOLA=y
+
+# SoC configuration
+CONFIG_AP=y
+CONFIG_AP_ARM_MTK_MT8192=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_NS16550=y
+CONFIG_SHELL_TAB=y
+CONFIG_SHELL_TAB_AUTOCOMPLETION=y
+CONFIG_SHELL_HISTORY=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+CONFIG_GPIO_ITE_IT8XXX2=y
+
+# ADC Driver
+CONFIG_ADC_ITE_IT8XXX2=y
+CONFIG_PLATFORM_EC_ADC=y
+CONFIG_PLATFORM_EC_ADC_RESOLUTION=10
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768
+
+# Flash
+CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y
+CONFIG_PLATFORM_EC_FLASH_CROS=y
+CONFIG_SOC_FLASH_ITE_IT8XXX2=y
+
+# I2C
+CONFIG_I2C_ITE_IT8XXX2=y
+CONFIG_PLATFORM_EC_I2C=y
+
+# Keyboard
+CONFIG_PLATFORM_EC_KEYBOARD=y
+CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y
+
+# Lid Switch
+CONFIG_PLATFORM_EC_LID_SWITCH=y
+
+# MKBP
+CONFIG_PLATFORM_EC_MKBP_EVENT=y
+CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y
+CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y
+CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+CONFIG_PINMUX_ITE_IT8XXX2=y
+
+# Power Button
+CONFIG_PLATFORM_EC_POWER_BUTTON=y
+
+# Power Sequencing
+CONFIG_PLATFORM_EC_POWERSEQ=y
+CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y
+CONFIG_PLATFORM_EC_POWERSEQ_IT8XXX2=y
+CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n
+CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
+CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y
+
+# PWM
+CONFIG_PWM=y
+CONFIG_PWM_SHELL=n
+CONFIG_PLATFORM_EC_PWM=y
+CONFIG_PWM_ITE_IT8XXX2=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Serial Host Interface (SHI) device.
+CONFIG_CROS_SHI_IT8XXX2=y
+
+# Timer configuration
+CONFIG_ITE_IT8XXX2_TIMER=y
+
+# WATCHDOG configuration
+CONFIG_WATCHDOG=y
+CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS=2500
+CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS=500
+
+# BBRAM
+CONFIG_BBRAM=y
+CONFIG_BBRAM_IT8XXX2=y
diff --git a/zephyr/projects/corsola/krabby/CMakeLists.txt b/zephyr/projects/corsola/krabby/CMakeLists.txt
new file mode 100644
index 0000000000..4f605d3a5c
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/CMakeLists.txt
@@ -0,0 +1,32 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+cmake_minimum_required(VERSION 3.13.1)
+add_compile_definitions(BOARD_KRABBY)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(krabby)
+
+zephyr_library_include_directories(include)
+
+set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/corsola" CACHE PATH
+    "Path to the platform/ec baseboard directory")
+set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/krabby" CACHE PATH
+  "Path to the platform/ec board directory")
+
+# Include selected EC source from the baseboard
+zephyr_library_sources(
+  "${PLATFORM_EC_BASEBOARD}/board_chipset.c"
+  "${PLATFORM_EC_BASEBOARD}/board_id.c"
+  "${PLATFORM_EC_BASEBOARD}/hibernate.c"
+  "${PLATFORM_EC_BASEBOARD}/regulator.c"
+  "${PLATFORM_EC_BASEBOARD}/usbc_config.c"
+  "${PLATFORM_EC_BASEBOARD}/usb_pd_policy.c")
+
+# Include selected EC source from the board
+zephyr_library_sources(
+  "${PLATFORM_EC_BOARD}/led.c")
+
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C
+  "src/i2c.c")
diff --git a/zephyr/projects/corsola/krabby/battery.dts b/zephyr/projects/corsola/krabby/battery.dts
new file mode 100644
index 0000000000..deb803bb8c
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/battery.dts
@@ -0,0 +1,12 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	batteries {
+		default_battery: c235 {
+			compatible = "as3gwrc3ka,c235-41";
+		};
+	};
+};
diff --git a/zephyr/projects/corsola/krabby/gpio.dts b/zephyr/projects/corsola/krabby/gpio.dts
new file mode 100644
index 0000000000..f04171651f
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/gpio.dts
@@ -0,0 +1,347 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	named-gpios {
+		compatible = "named-gpios";
+
+		power_button_l: power_button_l {
+			gpios = <&gpioe 4 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_POWER_BUTTON_L";
+			label = "POWER_BUTTON_L";
+		};
+		lid_open: lid_open {
+			gpios = <&gpioe 2 GPIO_INPUT>;
+			enum-name = "GPIO_LID_OPEN";
+			label = "LID_OPEN";
+		};
+		tablet_mode_l {
+			gpios = <&gpioj 7 GPIO_INPUT>;
+			enum-name = "GPIO_TABLET_MODE_L";
+			label = "TABLET_MODE_L";
+		};
+		ap_ec_warm_rst_req {
+			gpios = <&gpiod 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_AP_EC_WARM_RST_REQ";
+			label = "AP_EC_WARM_RST_REQ";
+		};
+		ap_ec_watchdog_l {
+			gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_AP_EC_WATCHDOG_L";
+			label = "AP_EC_WATCHDOG_L";
+		};
+		ap_in_sleep_l {
+			gpios = <&gpiof 2 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_AP_IN_SLEEP_L";
+			label = "AP_IN_SLEEP_L";
+		};
+		ap-xhci-init-done {
+			gpios = <&gpiod 2 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_AP_XHCI_INIT_DONE";
+			label = "AP_XHCI_INIT_DONE";
+		};
+		pmic_ec_pwrgd {
+			gpios = <&gpiof 3 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_PMIC_EC_PWRGD";
+			label = "PMIC_EC_PWRGD";
+		};
+		gpio_accel_gyro_int_l: base_imu_int_l {
+			gpios = <&gpioj 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_IMU_INT_L";
+			label = "BASE_IMU_INT_L";
+		};
+		lid_accel_int_l {
+			gpios = <&gpioj 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_LID_ACCEL_INT_L";
+			label = "LID_ACCEL_INT_L";
+		};
+		als_rgb_int_odl {
+			gpios = <&gpiof 0 GPIO_INPUT>;
+			enum-name = "GPIO_ALS_RGB_INT_ODL";
+			label = "ALS_RGB_INT_ODL";
+		};
+		usb_c0_ppc_int_odl {
+			gpios = <&gpiod 1 GPIO_INPUT>;
+			enum-name = "GPIO_USB_C0_PPC_INT_ODL";
+			label = "USB_C0_PPC_INT_ODL";
+		};
+		usb_c0_bc12_int_odl {
+			gpios = <&gpioj 6 GPIO_INPUT>;
+			enum-name = "GPIO_USB_C0_BC12_INT_ODL";
+			label = "USB_C0_BC12_INT_ODL";
+		};
+		usb_c1_bc12_int_l {
+			gpios = <&gpioj 4 GPIO_INPUT>;
+			enum-name = "GPIO_USB_C1_BC12_INT_L";
+			label = "USB_C1_BC12_INT_L";
+		};
+		volume_down_l {
+			gpios = <&gpiod 5 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_DOWN_L";
+			label = "VOLUME_DOWN_L";
+		};
+		volume_up_l {
+			gpios = <&gpiod 6 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_UP_L";
+			label = "VOLUME_UP_L";
+		};
+		ac_present: ac_present {
+			gpios = <&gpioe 5 GPIO_INPUT>;
+			enum-name = "GPIO_AC_PRESENT";
+			label = "AC_PRESENT";
+		};
+		wp {
+			gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_WP";
+			label = "WP";
+		};
+		spi0_cs {
+			gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_SPI0_CS";
+			label = "SPI0_CS";
+		};
+		x_ec_gpio2 {
+			gpios = <&gpiob 2 GPIO_ODR_HIGH>;
+			enum-name = "GPIO_X_EC_GPIO2";
+			label = "X_EC_GPIO2";
+		};
+		ec_pmic_en_odl {
+			gpios = <&gpiod 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_PMIC_EN_ODL";
+			label = "EC_PMIC_EN_ODL";
+		};
+		ec_pmic_watchdog_l {
+			gpios = <&gpioh 0 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_PMIC_WATCHDOG_L";
+			label = "EC_PMIC_WATCHDOG_L";
+		};
+		en_pp5000_a {
+			gpios = <&gpioc 6 GPIO_OUT_HIGH>;
+			enum-name = "GPIO_EN_PP5000_A";
+			label = "EN_PP5000_A";
+		};
+		pg_mt6315_proc_odl {
+			gpios = <&gpioe 1 GPIO_INPUT>;
+			enum-name = "GPIO_PG_MT6315_PROC_ODL";
+			label = "PG_MT6315_PROC_ODL";
+		};
+		pg_mt6360_odl {
+			gpios = <&gpiof 1 GPIO_INPUT>;
+			enum-name = "GPIO_PG_MT6360_ODL";
+			label = "PG_MT6360_ODL";
+		};
+		pg_pp5000_a_odl {
+			gpios = <&gpioa 6 GPIO_INPUT>;
+			enum-name = "GPIO_PG_PP5000_A_ODL";
+			label = "PG_PP5000_A_ODL";
+		};
+		en_slp_z {
+			gpios = <&gpioe 3 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EN_SLP_Z";
+			label = "EN_SLP_Z";
+		};
+		sys_rst_odl {
+			gpios = <&gpiob 6 GPIO_ODR_LOW>;
+			enum-name = "GPIO_SYS_RST_ODL";
+			label = "SYS_RST_ODL";
+		};
+		ec_bl_en_od {
+			gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_BL_EN_OD";
+			label = "EC_BL_EN_OD";
+		};
+		ec_int_l {
+			gpios = <&gpioe 6 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_INT_L";
+			label = "EC_INT_L";
+		};
+		dp_aux_path_sel {
+			gpios = <&gpiog 0 GPIO_OUT_HIGH>;
+			enum-name = "GPIO_DP_AUX_PATH_SEL";
+			label = "DP_AUX_PATH_SEL";
+		};
+		ec_dpbrdg_hpd_odl {
+			gpios = <&gpioj 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EC_DPBRDG_HPD_ODL";
+			label = "EC_DPBRDG_HPD_ODL";
+		};
+		en_pp5000_usb_a0_vbus {
+			gpios = <&gpiob 7 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EN_PP5000_USB_A0_VBUS";
+			label = "EN_PP5000_USB_A0_VBUS";
+		};
+		usb_c0_frs_en {
+			gpios = <&gpioh 3 GPIO_OUT_LOW>;
+			enum-name = "GPIO_USB_C0_FRS_EN";
+			label = "USB_C0_FRS_EN";
+		};
+		ec_batt_pres_odl {
+			gpios = <&gpioc 0 GPIO_INPUT>;
+			enum-name = "GPIO_BATT_PRES_ODL";
+			label = "EC_BATT_PRES_ODL";
+		};
+		bc12_det_en {
+			gpios = <&gpioj 5 GPIO_OUT_LOW>;
+			enum-name = "GPIO_BC12_DET_EN";
+			label = "BC12_DET_EN";
+		};
+		en_ec_id_odl {
+			gpios = <&gpioh 5 GPIO_ODR_LOW>;
+			enum-name = "GPIO_EN_EC_ID_ODL";
+			label = "EN_EC_ID_ODL";
+		};
+		entering_rw {
+			gpios = <&gpioc 5 GPIO_OUT_LOW>;
+			enum-name = "GPIO_ENTERING_RW";
+			label = "ENTERING_RW";
+		};
+		en_5v_usm {
+			gpios = <&gpiod 7 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EN_5V_USM";
+			label = "EN_5V_USM";
+		};
+		i2c_b_scl {
+			gpios = <&gpiob 3 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_B_SCL";
+			label = "I2C_B_SCL";
+		};
+		i2c_b_sda {
+			gpios = <&gpiob 4 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_B_SDA";
+			label = "I2C_B_SDA";
+		};
+		i2c_c_scl {
+			gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_I2C_C_SCL";
+			label = "I2C_C_SCL";
+		};
+		i2c_c_sda {
+			gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_I2C_C_SDA";
+			label = "I2C_C_SDA";
+		};
+		i2c_e_scl {
+			gpios = <&gpioe 0 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_E_SCL";
+			label = "I2C_E_SCL";
+		};
+		i2c_e_sda {
+			gpios = <&gpioe 7 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_E_SDA";
+			label = "I2C_E_SDA";
+		};
+		i2c_f_scl {
+			gpios = <&gpiof 6 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_F_SCL";
+			label = "I2C_F_SCL";
+		};
+		i2c_f_sda {
+			gpios = <&gpiof 7 GPIO_INPUT>;
+			enum-name = "GPIO_I2C_F_SDA";
+			label = "I2C_F_SDA";
+		};
+		ec_x_gpio1 {
+			gpios = <&gpioh 4 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EC_X_GPIO1";
+			label = "EC_X_GPIO1";
+		};
+		ec_x_gpio3 {
+			gpios = <&gpioj 1 GPIO_INPUT>;
+			enum-name = "GPIO_EC_X_GPIO3";
+			label = "EC_X_GPIO3";
+		};
+		set_vmc_volt_at_1v8 {
+			gpios = <&gpiod 4 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_SET_VMC_VOLT_AT_1V8";
+			label = "SET_VMC_VOLT_AT_1V8";
+		};
+		en_pp3000_vmc_pmu {
+			gpios = <&gpiod 2 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EN_PP3000_VMC_PMU";
+			label = "EN_PP3000_VMC_PMU";
+		};
+		packet_mode_en {
+			gpios = <&gpioa 3 (GPIO_INPUT | GPIO_PULL_DOWN)>;
+			enum-name = "GPIO_PACKET_MODE_EN";
+			label = "PACKET_MODE_EN";
+		};
+		usb_a0_fault_odl {
+			gpios = <&gpioa 7 GPIO_INPUT>;
+			enum-name = "GPIO_USB_A0_FAULT_ODL";
+			label = "USB_A0_FAULT_ODL";
+		};
+		charger_prochot_odl {
+			gpios = <&gpioc 3 GPIO_INPUT>;
+			enum-name = "GPIO_CHARGER_PROCHOT_ODL";
+			label = "CHARGER_PROCHOT_ODL";
+		};
+		pg_mt6315_gpu_odl {
+			gpios = <&gpioh 6 GPIO_INPUT>;
+			enum-name = "GPIO_PG_MT6315_GPU_ODL";
+			label = "PG_MT6315_GPU_ODL";
+		};
+		en_pp3000_sd_u {
+			gpios = <&gpiog 1 (GPIO_INPUT | GPIO_PULL_DOWN |
+					GPIO_VOLTAGE_1P8)>;
+			enum-name = "GPIO_EN_PP3000_SD_U";
+			label = "EN_PP3000_SD_U";
+		};
+		ccd_mode_odl {
+			gpios = <&gpioc 4 GPIO_INPUT>;
+			enum-name = "GPIO_CCD_MODE_ODL";
+			label = "CCD_MODE_ODL";
+		};
+		spi_clk_gpg6 {
+			gpios = <&gpiog 6 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_SPI_CLK_GPG6";
+			label = "SPI_CLK_GPG6";
+		};
+		spi_mosi_gpg4 {
+			gpios = <&gpiog 4 GPIO_OUT_LOW>;
+			enum-name = "GPIO_SPI_MOSI_GPG4";
+			label = "SPI_MOSI_GPG4";
+		};
+		spi_miso_gpg5 {
+			gpios = <&gpiog 5 GPIO_OUT_LOW>;
+			enum-name = "GPIO_SPI_MISO_GPG5";
+			label = "SPI_MISO_GPG5";
+		};
+		spi_cs_gpg7 {
+			gpios = <&gpiog 7 GPIO_OUT_LOW>;
+			enum-name = "GPIO_SPI_CS_GPG7";
+			label = "SPI_CS_GPG7";
+		};
+	};
+
+	hibernate-wake-pins {
+		compatible = "cros-ec,hibernate-wake-pins";
+		wakeup-pins = <&ac_present
+			       &power_button_l
+			       &lid_open>;
+	};
+
+	unused-pins {
+		compatible = "unused-gpios";
+
+		unused-gpios =
+			/* uart1_rx */
+			<&gpiob 0 GPIO_INPUT>,
+			/* nc_gpg3 */
+			<&gpiog 3 GPIO_OUT_LOW>,
+			/* nc_gpi7 */
+			<&gpioi 7 GPIO_OUT_LOW>,
+			/* nc_gpm2 */
+			<&gpiom 2 (GPIO_INPUT | GPIO_PULL_DOWN)>,
+			/* nc_gpm3 */
+			<&gpiom 3 (GPIO_INPUT | GPIO_PULL_DOWN)>,
+			/* nc_gpm6 */
+			<&gpiom 6 (GPIO_INPUT | GPIO_PULL_DOWN)>;
+	};
+};
diff --git a/zephyr/projects/corsola/krabby/include/gpio_map.h b/zephyr/projects/corsola/krabby/include/gpio_map.h
new file mode 100644
index 0000000000..5f01f290d2
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/include/gpio_map.h
@@ -0,0 +1,75 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_GPIO_MAP_H
+#define __ZEPHYR_GPIO_MAP_H
+
+#include <devicetree.h>
+#include <gpio_signal.h>
+
+/*
+ * TODO(b:188674805) create a driver to pull this information from DeviceTree
+ */
+#include "power/mt8192.h"
+
+#define GPIO_ENTERING_RW		GPIO_UNIMPLEMENTED
+#define GPIO_WP_L			GPIO_UNIMPLEMENTED
+
+#ifdef CONFIG_PLATFORM_EC_GMR_TABLET_MODE
+#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L
+#endif
+
+/*
+ * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
+ *
+ * Each GPIO_INT requires three parameters:
+ *   gpio_signal - The enum gpio_signal for the interrupt gpio
+ *   interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
+ *   handler - The platform/ec interrupt handler.
+ *
+ * Ensure that this files includes all necessary headers to declare all
+ * referenced handler functions.
+ *
+ * For example, one could use the follow definition:
+ * #define EC_CROS_GPIO_INTERRUPTS \
+ *   GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
+ */
+#define EC_CROS_GPIO_INTERRUPTS						\
+	GPIO_INT(GPIO_LID_OPEN,						\
+		 GPIO_INT_EDGE_BOTH, lid_interrupt)			\
+	GPIO_INT(GPIO_POWER_BUTTON_L,					\
+		 GPIO_INT_EDGE_BOTH, power_button_interrupt)		\
+	GPIO_INT(GPIO_EC_IMU_INT_L,					\
+		 GPIO_INT_EDGE_FALLING, bmi160_interrupt)		\
+	GPIO_INT(GPIO_LID_ACCEL_INT_L,					\
+		 GPIO_INT_EDGE_FALLING, lis2dw12_interrupt)		\
+	GPIO_INT(GPIO_TABLET_MODE_L,					\
+		 GPIO_INT_EDGE_BOTH, gmr_tablet_switch_isr)		\
+	GPIO_INT(GPIO_USB_C0_PPC_INT_ODL,				\
+		 GPIO_INT_EDGE_BOTH, ppc_interrupt)			\
+	GPIO_INT(GPIO_USB_C0_BC12_INT_ODL,				\
+		 GPIO_INT_EDGE_FALLING, bc12_interrupt)			\
+	GPIO_INT(GPIO_USB_C1_BC12_INT_L,				\
+		 GPIO_INT_EDGE_FALLING, bc12_interrupt)			\
+	GPIO_INT(GPIO_AC_PRESENT,					\
+		 GPIO_INT_EDGE_BOTH, extpower_interrupt)		\
+	GPIO_INT(GPIO_X_EC_GPIO2,					\
+		 GPIO_INT_EDGE_FALLING, x_ec_interrupt)			\
+	GPIO_INT(GPIO_AP_XHCI_INIT_DONE,				\
+		 GPIO_INT_EDGE_BOTH, usb_a0_interrupt)			\
+	GPIO_INT(GPIO_AP_EC_WATCHDOG_L,					\
+		 GPIO_INT_EDGE_BOTH, chipset_watchdog_interrupt)	\
+	GPIO_INT(GPIO_AP_IN_SLEEP_L,					\
+		 GPIO_INT_EDGE_BOTH, power_signal_interrupt)		\
+	GPIO_INT(GPIO_PMIC_EC_PWRGD,					\
+		 GPIO_INT_EDGE_BOTH, power_signal_interrupt)		\
+	GPIO_INT(GPIO_AP_EC_WARM_RST_REQ,				\
+		 GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt) \
+	GPIO_INT(GPIO_SPI0_CS,						\
+		 GPIO_INT_EDGE_FALLING, spi_event)
+
+#define GPIO_EN_PP5000 GPIO_EN_PP5000_A
+
+#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/corsola/krabby/include/i2c_map.h b/zephyr/projects/corsola/krabby/include/i2c_map.h
new file mode 100644
index 0000000000..898d5c398c
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/include/i2c_map.h
@@ -0,0 +1,13 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_I2C_MAP_H
+#define __ZEPHYR_I2C_MAP_H
+
+#include <devicetree.h>
+
+#include "i2c/i2c.h"
+
+#endif /* __ZEPHYR_I2C_MAP_H */
diff --git a/zephyr/projects/corsola/krabby/include/pwm_map.h b/zephyr/projects/corsola/krabby/include/pwm_map.h
new file mode 100644
index 0000000000..5cf7377f52
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/include/pwm_map.h
@@ -0,0 +1,15 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_CHROME_PWM_MAP_H
+#define __ZEPHYR_CHROME_PWM_MAP_H
+
+#include <devicetree.h>
+
+#include "config.h"
+
+#include "pwm/pwm.h"
+
+#endif /* __ZEPHYR_CHROME_PWM_MAP_H */
diff --git a/zephyr/projects/corsola/krabby/motionsense.dts b/zephyr/projects/corsola/krabby/motionsense.dts
new file mode 100644
index 0000000000..10128b0838
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/motionsense.dts
@@ -0,0 +1,157 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <dt-bindings/motionsense/utils.h>
+
+
+/ {
+	aliases {
+		/*
+		 * motion sense's <>_INT_EVENT is handled
+		 * by alias. Using the alias, each driver creates
+		 * its own <>_INT_EVENT.
+		 */
+		bmi160-int = &base_accel;
+		lis2dw12-int = &lid_accel;
+	};
+
+	/*
+	 * Declare mutexes used by sensor drivers.
+	 * A mutex node is used to create an instance of mutex_t.
+	 * A mutex node is referenced by a sensor node if the
+	 * corresponding sensor driver needs to use the
+	 * instance of the mutex.
+	 */
+	motionsense-mutex {
+		compatible = "cros-ec,motionsense-mutex";
+		lid_mutex: lid-mutex {
+			label = "LID_MUTEX";
+		};
+
+		mutex_bmi160: bmi160-mutex {
+			label = "BMI160_MUTEX";
+		};
+	};
+
+	/* Rotation matrix used by drivers. */
+	motionsense-rotation-ref {
+		compatible = "cros-ec,motionsense-rotation-ref";
+		lid_rot_ref: lid-rotation-ref {
+			mat33 = <(-1) 0 0
+				 0 (-1) 0
+				 0 0 1>;
+		};
+
+		base_rot_ref: base-rotation-ref {
+			mat33 = <1 0 0
+				 0 (-1) 0
+				 0 0 (-1)>;
+		};
+	};
+
+	/*
+	 * Driver specific data. A driver-specific data can be shared with
+	 * different motion sensors while they are using the same driver.
+	 *
+	 * If a node's compatible starts with "cros-ec,accelgyro-", it is for
+	 * a common structure defined in accelgyro.h.
+	 * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for
+	 * "struct als_drv_data_t" in accelgyro.h
+	 */
+	motionsense-sensor-data {
+		bmi160_data: bmi160-drv-data {
+			compatible = "cros-ec,drvdata-bmi160";
+			status = "okay";
+		};
+
+		lis2dw12_data: lis2dw12-drv-data {
+			compatible = "cros-ec,drvdata-lis2dw12";
+			status = "okay";
+		};
+	};
+
+	/*
+	 * List of motion sensors that creates motion_sensors array.
+	 * The label "lid_accel" and "base_accel" are used to indicate
+	 * motion sensor IDs for lid angle calculation.
+	 */
+	motionsense-sensor {
+		lid_accel: lid-accel {
+			compatible = "cros-ec,lis2dw12";
+			status = "okay";
+
+			label = "Lid Accel";
+			active-mask = "SENSOR_ACTIVE_S0_S3";
+			location = "MOTIONSENSE_LOC_LID";
+			mutex = <&lid_mutex>;
+			port = <&i2c_sensor>;
+			rot-standard-ref = <&lid_rot_ref>;
+			default-range = <2>;
+			drv-data = <&lis2dw12_data>;
+			configs {
+				compatible =
+					"cros-ec,motionsense-sensor-config";
+				ec-s0 {
+					label = "SENSOR_CONFIG_EC_S0";
+					odr = <(10000 | ROUND_UP_FLAG)>;
+				};
+				ec-s3 {
+					label = "SENSOR_CONFIG_EC_S3";
+					odr = <(10000 | ROUND_UP_FLAG)>;
+				};
+			};
+		};
+
+		base_accel: base-accel {
+			compatible = "cros-ec,bmi160-accel";
+			status = "okay";
+
+			label = "Base Accel";
+			active-mask = "SENSOR_ACTIVE_S0_S3";
+			location = "MOTIONSENSE_LOC_BASE";
+			mutex = <&mutex_bmi160>;
+			port = <&i2c_sensor>;
+			rot-standard-ref = <&base_rot_ref>;
+			drv-data = <&bmi160_data>;
+			configs {
+				compatible =
+					"cros-ec,motionsense-sensor-config";
+				ec-s0 {
+					label = "SENSOR_CONFIG_EC_S0";
+					odr = <(10000 | ROUND_UP_FLAG)>;
+				};
+				ec-s3 {
+					label = "SENSOR_CONFIG_EC_S3";
+					odr = <(10000 | ROUND_UP_FLAG)>;
+				};
+			};
+		};
+
+		base-gyro {
+			compatible = "cros-ec,bmi160-gyro";
+			status = "okay";
+
+			label = "Base Gyro";
+			active-mask = "SENSOR_ACTIVE_S0_S3";
+			location = "MOTIONSENSE_LOC_BASE";
+			mutex = <&mutex_bmi160>;
+			port = <&i2c_sensor>;
+			rot-standard-ref = <&base_rot_ref>;
+			drv-data = <&bmi160_data>;
+		};
+	};
+
+	motionsense-sensor-info {
+		compatible = "cros-ec,motionsense-sensor-info";
+
+		/*
+		 * list of GPIO interrupts that have to
+		 * be enabled at initial stage
+		 */
+		sensor-irqs = <&gpio_accel_gyro_int_l>;
+		/* list of sensors in force mode */
+		accel-force-mode-sensors = <&lid_accel>;
+	};
+};
diff --git a/zephyr/projects/corsola/krabby/prj.conf b/zephyr/projects/corsola/krabby/prj.conf
new file mode 100644
index 0000000000..7e5e5dc998
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/prj.conf
@@ -0,0 +1,121 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+CONFIG_CROS_EC=y
+CONFIG_PLATFORM_EC=y
+CONFIG_SHIMMED_TASKS=y
+
+# Bring up options
+CONFIG_KERNEL_SHELL=y
+CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y
+CONFIG_PLATFORM_EC_CONSOLE_USES_PRINTK=y
+
+# Battery
+CONFIG_PLATFORM_EC_BATTERY=y
+CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y
+CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y
+CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y
+CONFIG_PLATFORM_EC_BATTERY_SMART=y
+CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV=9000
+CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y
+CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y
+
+# Charger
+CONFIG_PLATFORM_EC_CHARGE_MANAGER=y
+CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=y
+CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y
+CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y
+CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y
+CONFIG_PLATFORM_EC_CHARGER_MAINTAIN_VBAT=y
+CONFIG_PLATFORM_EC_CHARGER_OTG=y
+CONFIG_PLATFORM_EC_CHARGER_PSYS=y
+CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y
+# BOARD_RS2
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10
+# BOARD_RS1
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20
+
+# Host Commands
+CONFIG_PLATFORM_EC_HOSTCMD=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y
+CONFIG_PLATFORM_EC_HOSTCMD_REGULATOR=y
+CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y
+
+# LED
+CONFIG_PLATFORM_EC_LED_COMMON=y
+CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y
+CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW=10
+
+# MKBP event mask
+CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK=y
+CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK=y
+
+# Sensors
+CONFIG_PLATFORM_EC_MOTIONSENSE=y
+CONFIG_PLATFORM_EC_ACCEL_FIFO=y
+CONFIG_PLATFORM_EC_ACCEL_INTERRUPTS=y
+CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y
+CONFIG_PLATFORM_EC_LID_ANGLE=y
+CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y
+CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y
+CONFIG_PLATFORM_EC_SWITCH=y
+CONFIG_PLATFORM_EC_TABLET_MODE=y
+CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y
+
+# Sensor Drivers
+CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y
+CONFIG_PLATFORM_EC_ACCEL_LIS2DW12_AS_BASE=y
+CONFIG_PLATFORM_EC_ACCELGYRO_BMI160=y
+CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y
+
+# USB-A
+CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1
+
+# USB-C
+CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y
+CONFIG_PLATFORM_EC_BC12_DETECT_MT6360=y
+CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n
+CONFIG_PLATFORM_EC_MT6360_BC12_GPIO=y
+CONFIG_PLATFORM_EC_SMBUS_PEC=y
+CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y
+CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y
+CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y
+CONFIG_PLATFORM_EC_USB_MUX_IT5205=y
+CONFIG_PLATFORM_EC_USB_MUX_PS8743=y
+CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y
+CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y
+CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM=y
+CONFIG_PLATFORM_EC_USB_PD_FRS=y
+CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT=2
+CONFIG_PLATFORM_EC_USB_PD_LOGGING=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y
+CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n
+CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT=y
+CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB_CUSTOM_HOOK=y
+CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n
+CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n
+CONFIG_PLATFORM_EC_USB_PD_USB4=n
+CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n
+
+# USB ID
+# This is allocated for Asurada
+# http://google3/hardware/standards/usb/
+# TODO(b/183608112): Move to device tree
+CONFIG_PLATFORM_EC_USB_PID=0x5053
+
+# VBoot without EFS2
+CONFIG_PLATFORM_EC_VBOOT_EFS2=n
+CONFIG_PLATFORM_EC_VBOOT_HASH=y
+
+# TODO(b/180980668): bring these features up
+CONFIG_LTO=n
+CONFIG_PLATFORM_EC_BACKLIGHT_LID=n
diff --git a/zephyr/projects/corsola/krabby/pwm.dts b/zephyr/projects/corsola/krabby/pwm.dts
new file mode 100644
index 0000000000..f86448cc8e
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/pwm.dts
@@ -0,0 +1,51 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	named-pwms {
+		compatible = "named-pwms";
+		/* NOTE: &pwm number needs same with channel number */
+		led1: led1 {
+			#pwm-cells = <0>;
+			pwms = <&pwm0 PWM_CHANNEL_0 PWM_POLARITY_INVERTED>;
+			label = "LED1";
+			/*
+			 * If we need pwm output in ITE chip power saving
+			 * mode, then we should set frequency <=324Hz.
+			 */
+			frequency = <324>;
+		};
+		led2: led2 {
+			#pwm-cells = <0>;
+			pwms = <&pwm1 PWM_CHANNEL_1 PWM_POLARITY_INVERTED>;
+			label = "LED2";
+			frequency = <324>;
+		};
+		led3: led3 {
+			#pwm-cells = <0>;
+			pwms = <&pwm2 PWM_CHANNEL_2 PWM_POLARITY_INVERTED>;
+			label = "LED3";
+			frequency = <324>;
+		};
+	};
+};
+
+/* LED1 */
+&pwm0 {
+	status = "okay";
+	prescaler-cx = <PWM_PRESCALER_C4>;
+};
+
+/* LED2 */
+&pwm1 {
+	status = "okay";
+	prescaler-cx = <PWM_PRESCALER_C4>;
+};
+
+/* LED3 */
+&pwm2 {
+	status = "okay";
+	prescaler-cx = <PWM_PRESCALER_C4>;
+};
diff --git a/zephyr/projects/corsola/krabby/src/i2c.c b/zephyr/projects/corsola/krabby/src/i2c.c
new file mode 100644
index 0000000000..2c7a9c7130
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/src/i2c.c
@@ -0,0 +1,17 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "i2c/i2c.h"
+#include "i2c.h"
+
+/* Hayato board specific i2c implementation */
+
+#ifdef CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED
+int board_allow_i2c_passthru(int port)
+{
+	return (i2c_get_device_for_port(port) ==
+		i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY));
+}
+#endif
diff --git a/zephyr/projects/corsola/krabby/zmake.yaml b/zephyr/projects/corsola/krabby/zmake.yaml
new file mode 100644
index 0000000000..29c1599f9d
--- /dev/null
+++ b/zephyr/projects/corsola/krabby/zmake.yaml
@@ -0,0 +1,16 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+board: corsola
+dts-overlays:
+  - battery.dts
+  - gpio.dts
+  - motionsense.dts
+  - pwm.dts
+supported-toolchains:
+  - coreboot-sdk
+  - zephyr
+supported-zephyr-versions:
+  - v2.7
+output-type: binman