diff options
author | Rajesh Kumar <rajesh3.kumar@intel.com> | 2021-10-11 12:22:31 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2022-01-20 04:25:03 +0000 |
commit | bfd62ee48d2578874701c59c53050b1a05f88726 (patch) | |
tree | 402d4db17e9f446c8653074ab299995c44c52d41 | |
parent | 183236e9875cf55cf5a92d6008152efce252507e (diff) | |
download | chrome-ec-bfd62ee48d2578874701c59c53050b1a05f88726.tar.gz |
zephyr: brya: Enable charger and type-c charging
This enables the configuration for charger
and their dependencies like power delivery and usb typec.
BUG=b:202701454
BRANCH=none
TEST=Tested feature by using Console command:
1. charger
2. chgstate
3. chgsup
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I0cbc4d74de0f86b18b1e9a881c6a0076aba8118e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3218111
Reviewed-by: Wai-Hong Tam <waihong@google.com>
-rw-r--r-- | board/brya/usbc_config.c | 25 | ||||
-rw-r--r-- | board/brya/usbc_config.h | 2 | ||||
-rw-r--r-- | zephyr/boards/arm/brya/brya.dts | 25 | ||||
-rw-r--r-- | zephyr/dts/bindings/gpio/gpio-enum-name.yaml | 25 | ||||
-rw-r--r-- | zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml | 2 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/BUILD.py | 2 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/CMakeLists.txt | 20 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/bb_retimer.dts | 24 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/gpio.dts | 222 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/include/gpio_map.h | 25 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/prj.conf | 52 | ||||
-rw-r--r-- | zephyr/projects/brya/brya/usbc.dts | 52 | ||||
-rw-r--r-- | zephyr/shim/include/config_chip.h | 4 |
13 files changed, 471 insertions, 9 deletions
diff --git a/board/brya/usbc_config.c b/board/brya/usbc_config.c index 7f54cde5a5..ac905a735b 100644 --- a/board/brya/usbc_config.c +++ b/board/brya/usbc_config.c @@ -39,6 +39,16 @@ #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#ifdef CONFIG_ZEPHYR +enum ioex_port { + IOEX_C0_NCT38XX = 0, + IOEX_C2_NCT38XX, + IOEX_ID_1_C0_NCT38XX, + IOEX_ID_1_C2_NCT38XX, + IOEX_PORT_COUNT +}; +#endif /* CONFIG_ZEPHYR */ + /* USBC TCPC configuration */ const struct tcpc_config_t tcpc_config[] = { [USBC_PORT_C0] = { @@ -162,6 +172,7 @@ const struct usb_mux usb_muxes[] = { }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); +#ifndef CONFIG_ZEPHYR /* BC1.2 charger detect configuration */ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { [USBC_PORT_C0] = { @@ -215,6 +226,7 @@ struct ioexpander_config_t ioex_config[] = { }, }; BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); +#endif /* !CONFIG_ZEPHYR */ #ifdef CONFIG_CHARGE_RAMP_SW @@ -266,14 +278,20 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) enum ioex_signal rst_signal; if (me->usb_port == USBC_PORT_C0) { +/* TODO: explore how to handle board id in zephyr*/ +#ifndef CONFIG_ZEPHYR if (get_board_id() == 1) rst_signal = IOEX_ID_1_USB_C0_RT_RST_ODL; else +#endif /* !CONFIG_ZEPHYR */ rst_signal = IOEX_USB_C0_RT_RST_ODL; } else if (me->usb_port == USBC_PORT_C2) { +/* TODO: explore how to handle board id in zephyr*/ +#ifndef CONFIG_ZEPHYR if (get_board_id() == 1) rst_signal = IOEX_ID_1_USB_C2_RT_RST_ODL; else +#endif /* !CONFIG_ZEPHYR */ rst_signal = IOEX_USB_C2_RT_RST_ODL; } else { return EC_ERROR_INVAL; @@ -323,8 +341,11 @@ void board_reset_pd_mcu(void) enum gpio_signal tcpc_rst; if (get_board_id() == 1) +/* TODO: explore how to handle board id in zephyr*/ +#ifndef CONFIG_ZEPHYR tcpc_rst = GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL; else +#endif /* !CONFIG_ZEPHYR */ tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL; /* @@ -380,14 +401,18 @@ static void board_tcpc_init(void) /* Enable TCPC interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); +#ifndef CONFIG_ZEPHYR /* Enable BC1.2 interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); +#endif /* !CONFIG_ZEPHYR */ if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); +#ifndef CONFIG_ZEPHYR gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); +#endif /* !CONFIG_ZEPHYR */ } } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); diff --git a/board/brya/usbc_config.h b/board/brya/usbc_config.h index 5d08a446fb..9e7652d9a0 100644 --- a/board/brya/usbc_config.h +++ b/board/brya/usbc_config.h @@ -8,7 +8,9 @@ #ifndef __CROS_EC_USBC_CONFIG_H #define __CROS_EC_USBC_CONFIG_H +#ifndef CONFIG_ZEPHYR #define CONFIG_USB_PD_PORT_MAX_COUNT 3 +#endif enum usbc_port { USBC_PORT_C0 = 0, diff --git a/zephyr/boards/arm/brya/brya.dts b/zephyr/boards/arm/brya/brya.dts index de72be7ab4..67a89aa90a 100644 --- a/zephyr/boards/arm/brya/brya.dts +++ b/zephyr/boards/arm/brya/brya.dts @@ -13,6 +13,17 @@ / { model = "Google Brya Baseboard"; + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-4 = &i2c4_1; + i2c-5 = &i2c5_0; + i2c-6 = &i2c6_1; + i2c-7 = &i2c7_0; + }; + chosen { zephyr,sram = &sram0; zephyr,console = &uart1; @@ -28,7 +39,7 @@ i2c-port = <&i2c0_0>; enum-name = "I2C_PORT_SENSOR"; }; - tcpc0_2 { + tcpc0_2: tcpc0_2 { i2c-port = <&i2c1_0>; enum-name = "I2C_PORT_USB_C0_C2_TCPC"; }; @@ -36,11 +47,11 @@ i2c-port = <&i2c4_1>; enum-name = "I2C_PORT_USB_C1_TCPC"; }; - ppc0_2 { + ppc0_2: ppc0_2 { i2c-port = <&i2c2_0>; enum-name = "I2C_PORT_USB_C0_C2_PPC"; }; - ppc1 { + ppc1: ppc1 { i2c-port = <&i2c6_1>; enum-name = "I2C_PORT_USB_C1_PPC"; }; @@ -60,6 +71,14 @@ i2c-port = <&i2c7_0>; enum-name = "I2C_PORT_CHARGER"; }; + c1_bc12: c1_bc12 { + i2c-port = <&i2c6_1>; + enum-name = "I2C_PORT_USB_C1_BC12"; + }; + c0_c2_bc12: c0_c2_bc12 { + i2c-port = <&i2c2_0>; + enum-name = "I2C_PORT_USB_C0_C2_BC12"; + }; mp2964 { i2c-port = <&i2c7_0>; enum-name = "I2C_PORT_MP2964"; diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 97301f9004..845855384d 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -24,6 +24,7 @@ properties: - GPIO_BOARD_VERSION3 - GPIO_CCD_MODE_ODL - GPIO_CHARGER_PROCHOT_ODL + - GPIO_CHARGER_VAP_OTG_EN - GPIO_CPU_C10_GATE_L - GPIO_CPU_PROCHOT - GPIO_DA9313_GPIO0 @@ -57,8 +58,20 @@ properties: - GPIO_EC_I2C7_EEPROM_PWR_SDA_R - GPIO_EC_I2C_BAT_SCL - GPIO_EC_I2C_BAT_SDA + - GPIO_EC_I2C_MISC_SCL_R + - GPIO_EC_I2C_MISC_SDA_R - GPIO_EC_I2C_SENSOR_SCL - GPIO_EC_I2C_SENSOR_SDA + - GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL + - GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA + - GPIO_EC_I2C_USB_C0_C2_RT_SCL + - GPIO_EC_I2C_USB_C0_C2_RT_SDA + - GPIO_EC_I2C_USB_C0_C2_TCPC_SCL + - GPIO_EC_I2C_USB_C0_C2_TCPC_SDA + - GPIO_EC_I2C_USB_C1_MIX_SCL + - GPIO_EC_I2C_USB_C1_MIX_SDA + - GPIO_EC_I2C_USB_C1_TCPC_SCL + - GPIO_EC_I2C_USB_C1_TCPC_SDA - GPIO_EC_I2C_USBC_PD_INT - GPIO_EC_IMU_INT_L - GPIO_EC_INT_L @@ -92,6 +105,7 @@ properties: - GPIO_EN_PP5000_FAN - GPIO_EN_PP5000_PEN_X - GPIO_EN_PP5000_USBA + - GPIO_EN_PP5000_USBA_R - GPIO_EN_PP5000_USB_A0_VBUS - GPIO_EN_PP5000_Z2 - GPIO_EN_PPVAR_VCCIN @@ -124,6 +138,7 @@ properties: - GPIO_I2C_F_SCL - GPIO_I2C_F_SDA - GPIO_ID_1_EC_BATT_PRES_ODL + - GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL - GPIO_IMVP9_VRRDY_OD - GPIO_KBD_KSO2 - GPIO_EC_KB_BL_EN_L @@ -198,14 +213,18 @@ properties: - GPIO_USB_C0_BC12_INT_L - GPIO_USB_C0_BC12_INT_ODL - GPIO_USB_C0_C1_FAULT_ODL + - GPIO_USB_C0_C2_TCPC_INT_ODL + - GPIO_USB_C0_C2_TCPC_RST_ODL - GPIO_USB_C0_DP_HPD - GPIO_USB_C0_FRS_EN + - GPIO_USB_C0_INT_ODL - GPIO_USB_C0_OC_ODL - GPIO_USB_C0_PD_INT_ODL - GPIO_USB_C0_PD_RST_L - GPIO_USB_C0_PPC_BC12_INT_ODL - GPIO_USB_C0_PPC_FRSINFO - GPIO_USB_C0_PPC_INT_ODL + - GPIO_USB_C0_RT_INT_ODL - GPIO_USB_C0_SWCTL_INT_ODL - GPIO_USB_C0_TCPC_INT_ODL - GPIO_USB_C0_TCPC_RST @@ -221,10 +240,16 @@ properties: - GPIO_USB_C1_PD_INT_ODL - GPIO_USB_C1_PD_RST_L - GPIO_USB_C1_PPC_INT_ODL + - GPIO_USB_C1_RST_ODL + - GPIO_USB_C1_RT_RST_R_ODL - GPIO_USB_C1_RT_RST_ODL - GPIO_USB_C1_SWCTL_INT_ODL - GPIO_USB_C1_TCPC_INT_ODL - GPIO_USB_C1_TCPC_RST_L + - GPIO_USB_C2_INT_ODL + - GPIO_USB_C2_BC12_INT_ODL + - GPIO_USB_C2_PPC_INT_ODL + - GPIO_USB_C2_RT_INT_ODL - GPIO_USB_HUB_FAULT_ODL - GPIO_USB_FAULT_ODL - GPIO_VCCIN_AUX_VID0 diff --git a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml index 8e6f65159c..1a0741141d 100644 --- a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml +++ b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml @@ -41,10 +41,12 @@ properties: - I2C_PORT_USB_1_MIX - I2C_PORT_USB_C0 - I2C_PORT_USB_C0_TCPC + - I2C_PORT_USB_C0_C2_BC12 - I2C_PORT_USB_C0_C2_MUX - I2C_PORT_USB_C0_C2_PPC - I2C_PORT_USB_C0_C2_TCPC - I2C_PORT_USB_C1 + - I2C_PORT_USB_C1_BC12 - I2C_PORT_USB_C1_PPC - I2C_PORT_USB_C1_TCPC - I2C_PORT_USB_MUX diff --git a/zephyr/projects/brya/brya/BUILD.py b/zephyr/projects/brya/brya/BUILD.py index 6f23fdc96d..bdfe4d469e 100644 --- a/zephyr/projects/brya/brya/BUILD.py +++ b/zephyr/projects/brya/brya/BUILD.py @@ -7,10 +7,12 @@ register_npcx_project( zephyr_board="brya", dts_overlays=[ "battery.dts", + "bb_retimer.dts", "cbi_eeprom.dts", "fan.dts", "gpio.dts", "motionsense.dts", "pwm.dts", + "usbc.dts", ], ) diff --git a/zephyr/projects/brya/brya/CMakeLists.txt b/zephyr/projects/brya/brya/CMakeLists.txt index 3afdac2af0..0cb61eb838 100644 --- a/zephyr/projects/brya/brya/CMakeLists.txt +++ b/zephyr/projects/brya/brya/CMakeLists.txt @@ -7,12 +7,20 @@ cmake_minimum_required(VERSION 3.13.1) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(brya) +set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/brya" CACHE PATH + "Path to the platform/ec board directory") set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/brya" CACHE PATH "Path to the platform/ec baseboard directory") -zephyr_include_directories(include - "${PLATFORM_EC_BASEBOARD}") +# Include board specific header files +zephyr_include_directories( + include + "${PLATFORM_EC}/driver/tcpm" + "${PLATFORM_EC_BASEBOARD}" + "${PLATFORM_EC_BOARD}") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY + "${PLATFORM_EC_BASEBOARD}/battery_presence.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM "${PLATFORM_EC_BASEBOARD}/cbi.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PWM_KBLIGHT @@ -21,3 +29,11 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY "${PLATFORM_EC_BASEBOARD}/battery_presence.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY "battery_present.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_POWER_DELIVERY + "${PLATFORM_EC_BASEBOARD}/usb_pd_policy.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "${PLATFORM_EC_BOARD}/usbc_config.c" + "${PLATFORM_EC_BOARD}/fw_config.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_MANAGER + "${PLATFORM_EC_BOARD}/charger.c" + "${PLATFORM_EC}/common/math_util.c") diff --git a/zephyr/projects/brya/brya/bb_retimer.dts b/zephyr/projects/brya/brya/bb_retimer.dts new file mode 100644 index 0000000000..22db1754d0 --- /dev/null +++ b/zephyr/projects/brya/brya/bb_retimer.dts @@ -0,0 +1,24 @@ +/* Copyright 2022 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +&i2c3_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + usb_c0_bb_retimer: jhl8040r@56 { + compatible = "intel,jhl8040r"; + reg = <0x56>; + label = "USB_C0_BB_RETIMER"; + int-gpios = <&usb_c0_rt_int_odl>; + reset-gpios = <&usb_c0_rt_rst_odl>; + }; + usb_c2_bb_retimer: jhl8040r@57 { + compatible = "intel,jhl8040r"; + reg = <0x57>; + label = "USB_C2_BB_RETIMER"; + int-gpios = <&usb_c2_rt_int_odl>; + reset-gpios = <&usb_c2_rt_rst_odl>; + }; +}; diff --git a/zephyr/projects/brya/brya/gpio.dts b/zephyr/projects/brya/brya/gpio.dts index 2236f29c72..1422e63b49 100644 --- a/zephyr/projects/brya/brya/gpio.dts +++ b/zephyr/projects/brya/brya/gpio.dts @@ -20,6 +20,10 @@ gpios = <&gpioa 1 GPIO_INPUT>; enum-name = "GPIO_WP_L"; }; + charger_vap_otg_en { + gpios = <&gpio7 3 GPIO_OUT_LOW>; + enum-name = "GPIO_CHARGER_VAP_OTG_EN"; + }; ec_batt_pres_odl { gpios = <&gpioa 3 GPIO_INPUT>; enum-name = "GPIO_BATT_PRES_ODL"; @@ -40,6 +44,62 @@ gpios = <&gpio8 6 GPIO_OUT_HIGH>; enum-name = "GPIO_EC_KB_BL_EN_L"; }; + ec_i2c_misc_scl_r { + gpios = <&gpiob 3 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_MISC_SCL_R"; + }; + ec_i2c_misc_sda_r { + gpios = <&gpiob 2 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_MISC_SDA_R"; + }; + ec_i2c_sensor_scl { + gpios = <&gpiob 5 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_SENSOR_SCL"; + }; + ec_i2c_sensor_sda { + gpios = <&gpiob 4 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_SENSOR_SDA"; + }; + ec_i2c_usb_c0_c2_ppc_bc_scl { + gpios = <&gpio9 2 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL"; + }; + ec_i2c_usb_c0_c2_ppc_bc_sda { + gpios = <&gpio9 1 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA"; + }; + ec_i2c_usb_c0_c2_rt_scl { + gpios = <&gpiod 1 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_RT_SCL"; + }; + ec_i2c_usb_c0_c2_rt_sda { + gpios = <&gpiod 0 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_RT_SDA"; + }; + ec_i2c_usb_c0_c2_tcpc_scl { + gpios = <&gpio9 0 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_TCPC_SCL"; + }; + ec_i2c_usb_c0_c2_tcpc_sda { + gpios = <&gpio8 7 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C0_C2_TCPC_SDA"; + }; + ec_i2c_usb_c1_mix_scl { + gpios = <&gpioe 4 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C1_MIX_SCL"; + }; + ec_i2c_usb_c1_mix_sda { + gpios = <&gpioe 3 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C1_MIX_SDA"; + }; + ec_i2c_usb_c1_tcpc_scl { + gpios = <&gpiof 3 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C1_TCPC_SCL"; + }; + ec_i2c_usb_c1_tcpc_sda { + gpios = <&gpiof 2 GPIO_INPUT>; + enum-name = "GPIO_EC_I2C_USB_C1_TCPC_SDA"; + }; ec_chg_led_y_c1 { gpios = <&gpioc 3 GPIO_OUT_LOW>; enum-name = "GPIO_EC_CHG_LED_Y_C1"; @@ -164,6 +224,76 @@ gpios = <&gpio9 7 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_VOLUME_UP_L"; }; + usb_c0_c2_tcpc_int_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_C2_TCPC_INT_ODL"; + }; + usb_c1_tcpc_int_odl { + gpios = <&gpioa 2 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + }; + usb_c0_ppc_int_odl { + gpios = <&gpio6 2 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + usb_c1_ppc_int_odl { + gpios = <&gpiof 5 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + }; + usb_c2_ppc_int_odl { + gpios = <&gpio7 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C2_PPC_INT_ODL"; + }; + gpio_usb_c0_bc12_int_odl: usb_c0_bc12_int_odl { + gpios = <&gpioc 6 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_BC12_INT_ODL"; + }; + gpio_usb_c1_bc12_int_odl: usb_c1_bc12_int_odl { + gpios = <&gpio5 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_BC12_INT_ODL"; + }; + gpio_usb_c2_bc12_int_odl: usb_c2_bc12_int_odl { + gpios = <&gpio8 3 GPIO_INPUT>; + enum-name = "GPIO_USB_C2_BC12_INT_ODL"; + }; + en_pp5000_usba_r { + gpios = <&gpiod 7 GPIO_OUT_LOW>; + enum-name = "GPIO_EN_PP5000_USBA_R"; + }; + usb_c1_rt_rst_r_odl { + gpios = <&gpio0 2 GPIO_ODR_LOW>; + enum-name = "GPIO_USB_C1_RT_RST_R_ODL"; + }; + usb_c1_rst_odl { + gpios = <&gpio9 6 GPIO_ODR_LOW>; + enum-name = "GPIO_USB_C1_RST_ODL"; + }; + usb_c0_c2_tcpc_rst_odl { + gpios = <&gpioa 7 GPIO_ODR_LOW>; + enum-name = "GPIO_USB_C0_C2_TCPC_RST_ODL"; + }; + id_1_usb_c0_c2_tcpc_rst_odl { + gpios = <&gpio3 4 GPIO_ODR_LOW>; + enum-name = "GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL"; + }; + usb_c0_int_odl { + gpios = <&gpiob 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_INT_ODL"; + }; + usb_c2_int_odl { + gpios = <&gpio4 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C2_INT_ODL"; + }; + usb_c0_rt_int_odl: usb_c0_rt_int_odl { + #gpio-cells = <0>; + gpios = <&gpiob 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_RT_INT_ODL"; + }; + usb_c2_rt_int_odl: usb_c2_rt_int_odl { + #gpio-cells = <0>; + gpios = <&gpio4 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C2_RT_INT_ODL"; + }; }; hibernate-wake-pins { @@ -174,4 +304,96 @@ &lid_open >; }; + + named-ioexes { + compatible = "named-ioexes"; + + usb_c0_oc_odl { + gpios = <&ioex_port1 4 GPIO_ODR_HIGH>; + enum-name = "IOEX_USB_C0_OC_ODL"; + label = "IOEX_USB_C0_OC_ODL"; + }; + usb_c0_frs_en { + gpios = <&ioex_port1 6 GPIO_OUT_LOW>; + enum-name = "IOEX_USB_C0_FRS_EN"; + label = "IOEX_USB_C0_FRS_EN"; + }; + usb_c0_rt_rst_odl: usb_c0_rt_rst_odl { + #gpio-cells = <0>; + gpios = <&ioex_port1 7 GPIO_ODR_HIGH>; + enum-name = "IOEX_USB_C0_RT_RST_ODL"; + label = "IOEX_USB_C0_RT_RST_ODL"; + }; + usb_c2_rt_rst_odl: usb_c2_rt_rst_odl { + #gpio-cells = <0>; + gpios = <&ioex_port2 2 GPIO_ODR_HIGH>; + enum-name = "IOEX_USB_C2_RT_RST_ODL"; + label = "IOEX_USB_C2_RT_RST_ODL"; + }; + usb_c1_oc_odl { + gpios = <&ioex_port2 3 GPIO_ODR_HIGH>; + enum-name = "IOEX_USB_C1_OC_ODL"; + label = "IOEX_USB_C1_OC_ODL"; + }; + usb_c2_oc_odl { + gpios = <&ioex_port2 4 GPIO_ODR_HIGH>; + enum-name = "IOEX_USB_C2_OC_ODL"; + label = "IOEX_USB_C2_OC_ODL"; + }; + usb_c2_frs_en { + gpios = <&ioex_port2 6 GPIO_OUT_LOW>; + enum-name = "IOEX_USB_C2_FRS_EN"; + label = "IOEX_USB_C2_FRS_EN"; + }; + }; + +}; + +&i2c1_0 { + status = "okay"; + + nct3808_0_P1:nct3808_0_P1@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT3808_0_P1"; + + ioex_port1:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3808_0_P1_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + nct3808_0_P2:nct3808_0_P2@74 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x74>; + label = "NCT3808_0_P2"; + + ioex_port2:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3808_0_P2_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + nct3808_alert_1 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>; + label = "NCT3808_ALERT_1"; + }; }; diff --git a/zephyr/projects/brya/brya/include/gpio_map.h b/zephyr/projects/brya/brya/include/gpio_map.h index 61b762f0d0..7e3dc36e4c 100644 --- a/zephyr/projects/brya/brya/include/gpio_map.h +++ b/zephyr/projects/brya/brya/include/gpio_map.h @@ -38,6 +38,18 @@ #define GMR_TABLET_MODE_INT(gpio, edge) #endif +#ifdef CONFIG_PLATFORM_EC_USBC +#define TCPC_ALERT_INT(gpio, edge) GPIO_INT(gpio, edge, tcpc_alert_event) +#define PPC_INT(gpio, edge) GPIO_INT(gpio, edge, ppc_interrupt) +#define BC12_INT(gpio, edge) GPIO_INT(gpio, edge, bc12_interrupt) +#define RETIMER_INT(gpio, edge) GPIO_INT(gpio, edge, retimer_interrupt) +#else +#define TCPC_ALERT_INT(gpio, edge) +#define PPC_INT(gpio, edge) +#define BC12_INT(gpio, edge) +#define RETIMER_INT(gpio, edge) +#endif /* CONFIG_PLATFORM_EC_USBC */ + /* * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. * @@ -66,6 +78,7 @@ #define GPIO_EC_BATT_PRES_ODL GPIO_BATT_PRES_ODL #define GPIO_ID_1_EC_KB_BL_EN GPIO_EC_BATT_PRES_ODL +#define GPIO_SEQ_EC_DSW_PWROK GPIO_PG_EC_DSW_PWROK #define EC_CROS_GPIO_INTERRUPTS \ GMR_TABLET_MODE_INT(GPIO_TABLET_MODE_L, GPIO_INT_EDGE_BOTH) \ @@ -85,5 +98,15 @@ POWER_SIGNAL_INT(GPIO_PG_EC_RSMRST_ODL, GPIO_INT_EDGE_BOTH) \ POWER_SIGNAL_INT(GPIO_PG_EC_ALL_SYS_PWRGD, GPIO_INT_EDGE_BOTH) \ TCS3400_INT(GPIO_EC_ALS_RGB_INT_L, GPIO_INT_EDGE_FALLING) \ - AP_PROCHOT_INT(GPIO_EC_PROCHOT_IN_L, GPIO_INT_EDGE_BOTH) + AP_PROCHOT_INT(GPIO_EC_PROCHOT_IN_L, GPIO_INT_EDGE_BOTH) \ + TCPC_ALERT_INT(GPIO_USB_C0_C2_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING)\ + TCPC_ALERT_INT(GPIO_USB_C1_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING) \ + PPC_INT(GPIO_USB_C0_PPC_INT_ODL, GPIO_INT_EDGE_FALLING) \ + PPC_INT(GPIO_USB_C1_PPC_INT_ODL, GPIO_INT_EDGE_FALLING) \ + PPC_INT(GPIO_USB_C2_PPC_INT_ODL, GPIO_INT_EDGE_FALLING) \ + BC12_INT(GPIO_USB_C0_BC12_INT_ODL, GPIO_INT_EDGE_FALLING) \ + BC12_INT(GPIO_USB_C1_BC12_INT_ODL, GPIO_INT_EDGE_FALLING) \ + BC12_INT(GPIO_USB_C2_BC12_INT_ODL, GPIO_INT_EDGE_FALLING) \ + RETIMER_INT(GPIO_USB_C0_RT_INT_ODL, GPIO_INT_EDGE_FALLING) \ + RETIMER_INT(GPIO_USB_C2_RT_INT_ODL, GPIO_INT_EDGE_FALLING) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/brya/brya/prj.conf b/zephyr/projects/brya/brya/prj.conf index 7dfe2d62ab..080e03e081 100644 --- a/zephyr/projects/brya/brya/prj.conf +++ b/zephyr/projects/brya/brya/prj.conf @@ -4,7 +4,6 @@ CONFIG_CROS_EC=y CONFIG_PLATFORM_EC=y -CONFIG_PLATFORM_EC_BRINGUP=y CONFIG_SHIMMED_TASKS=y CONFIG_PLATFORM_EC_POWER_BUTTON=y CONFIG_PLATFORM_EC_CBI_EEPROM=y @@ -118,8 +117,50 @@ CONFIG_PLATFORM_EC_BATTERY_HW_PRESENT_CUSTOM=y CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y # USB-C and charging -CONFIG_PLATFORM_EC_USBC=n -CONFIG_PLATFORM_EC_CHARGER=n +CONFIG_PLATFORM_EC_CHARGER_BQ25720=y +CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM=y +CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV=70 +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y +CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON=3 +CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC=1 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT=15000 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=15001 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 +CONFIG_PLATFORM_EC_CHARGE_RAMP_SW=y +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_USB_PID=0x504F +CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y +CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y +CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB=y +CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y +CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y +CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=2 +CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_UFP=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_PPC=y +CONFIG_PLATFORM_EC_USB_PD_REV30=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1715=n +CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422=n +CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y +CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT=3 +CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y +CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y +CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1 +CONFIG_PLATFORM_EC_CONSOLE_CMD_PPC_DUMP=n +CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=n +CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=y +CONFIG_PLATFORM_EC_USB_PD_INT_SHARED=y +CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED=y +CONFIG_PLATFORM_EC_USB_PD_PORT_2_SHARED=y CONFIG_SYSCON=y @@ -128,6 +169,11 @@ CONFIG_PWM=y CONFIG_PWM_SHELL=n CONFIG_PLATFORM_EC_PWM=y +#IOEX +CONFIG_PLATFORM_EC_IOEX=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_IOEX=y +CONFIG_GPIO_NCT38XX=y + # TODO(b/188605676): bring these features up CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/brya/brya/usbc.dts b/zephyr/projects/brya/brya/usbc.dts new file mode 100644 index 0000000000..a8ea2edbc3 --- /dev/null +++ b/zephyr/projects/brya/brya/usbc.dts @@ -0,0 +1,52 @@ +/* Copyright 2022 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + compatible = "named-usbc-ports"; + #address-cells = <1>; + #size-cells = <0>; + port0: usbc-port0@0 { + reg = <0>; + bc12 { + compatible = "pericom,pi3usb9201"; + status = "okay"; + irq = <&gpio_usb_c0_bc12_int_odl>; + port = <&c0_c2_bc12>; + i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + }; + tcpc { + compatible = "nuvoton,nct38xx"; + gpio-dev = <&nct3808_0_P1>; + }; + }; + + port1: usbc-port1@1 { + reg = <1>; + bc12 { + compatible = "pericom,pi3usb9201"; + status = "okay"; + irq = <&gpio_usb_c1_bc12_int_odl>; + port = <&c1_bc12>; + i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + }; + }; + + port2: usbc-port2@2 { + reg = <2>; + bc12 { + compatible = "pericom,pi3usb9201"; + status = "okay"; + irq = <&gpio_usb_c2_bc12_int_odl>; + port = <&c0_c2_bc12>; + i2c-addr-flags = "PI3USB9201_I2C_ADDR_1_FLAGS"; + }; + tcpc { + compatible = "nuvoton,nct38xx"; + gpio-dev = <&nct3808_0_P2>; + }; + }; + }; +}; diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index d6124ca7c2..06e130a8b1 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1302,8 +1302,12 @@ #undef CONFIG_USBC_RETIMER_INTEL_BB #ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB +#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR \ + DT_REG_ADDR(DT_NODELABEL(usb_c0_bb_retimer)) #define USBC_PORT_C1_BB_RETIMER_I2C_ADDR \ DT_REG_ADDR(DT_NODELABEL(usb_c1_bb_retimer)) +#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR \ + DT_REG_ADDR(DT_NODELABEL(usb_c2_bb_retimer)) #define CONFIG_USBC_RETIMER_INTEL_BB #endif |