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authorVic Yang <victoryang@chromium.org>2013-05-14 12:09:54 +0800
committerKatie Roberts-Hoffman <katierh@chromium.org>2013-05-22 16:21:21 -0700
commitc524bcde4dadc868480c76dbfbc63c4ee789c317 (patch)
tree9c425726f6b70050cd9f017d076e34586528f835
parent037c50af15ef8472ceb291432e4b38b672e9f118 (diff)
downloadchrome-ec-c524bcde4dadc868480c76dbfbc63c4ee789c317.tar.gz
Add console command to force enable console
When system is locked, the console is disabled. However, we need console for debugging and testing. This CL uses a bit from back-up register to indicate if the console should always be enabled. (This bit is currently used by fake WP, which is removed in this CL.) With this, we can set this bit with console command 'forceen 1' to ensure console is never disabled. To prevent device shipped in this state, the chip name is postfixed with '-unsafe' so that the device is not able to pass HWID check. BUG=chrome-os-partner:19293 TEST=Manual BRANCH=spring Change-Id: I88556e973ca542c1bdc27ba64988718291e01a26 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/51086 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit c8b7b430fe5e4aa3d5f27fbd160dfee31254e36d) Reviewed-on: https://gerrit.chromium.org/gerrit/56317 Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org> Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org> Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
-rw-r--r--board/spring/board.h1
-rw-r--r--chip/stm32/flash-stm32f100.c31
-rw-r--r--chip/stm32/system.c34
-rw-r--r--common/console.c24
-rw-r--r--include/system.h7
5 files changed, 48 insertions, 49 deletions
diff --git a/board/spring/board.h b/board/spring/board.h
index 8fbc579bf2..44256b4e21 100644
--- a/board/spring/board.h
+++ b/board/spring/board.h
@@ -13,6 +13,7 @@
/* Use USART1 as console serial port */
#define CONFIG_CONSOLE_UART 1
+#define CONFIG_CONSOLE_RESTRICTED_INPUT
/* Debug features */
#define CONFIG_ASSERT_HELP
diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f100.c
index 7932a85df4..45ce7e4bfc 100644
--- a/chip/stm32/flash-stm32f100.c
+++ b/chip/stm32/flash-stm32f100.c
@@ -81,10 +81,6 @@ struct flash_wp_state {
int entire_flash_locked;
};
-/* Functions defined in system.c to access backup registers */
-int system_set_fake_wp(int val);
-int system_get_fake_wp(void);
-
static int write_optb(int byte, uint8_t value);
static int wait_busy(void)
@@ -604,7 +600,7 @@ uint32_t flash_get_protect(void)
int i;
int not_protected[2] = {0};
- if (system_get_fake_wp() || !gpio_get_level(GPIO_WRITE_PROTECTn))
+ if (!gpio_get_level(GPIO_WRITE_PROTECTn))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
/* Read the current persist state from flash */
@@ -677,31 +673,6 @@ int flash_set_protect(uint32_t mask, uint32_t flags)
}
/*****************************************************************************/
-/* Console commands */
-
-static int command_set_fake_wp(int argc, char **argv)
-{
- int val;
- char *e;
-
- if (argc < 2)
- return EC_ERROR_PARAM_COUNT;
-
- val = strtoi(argv[1], &e, 0);
- if (*e)
- return EC_ERROR_PARAM1;
-
- system_set_fake_wp(val);
- ccprintf("Fake write protect = %d\n", val);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(fakewp, command_set_fake_wp,
- "<0 | 1>",
- "Set fake write protect pin",
- NULL);
-
-/*****************************************************************************/
/* Hooks */
static void flash_preserve_state(void)
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 4ee83ebaf4..ae46dbf800 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -14,10 +14,7 @@
#include "version.h"
#include "watchdog.h"
-/*
- * TODO: Fake WP is stored at most significant bit of saved reset flags to save
- * space. Remove it when we have real write protect pin
- */
+#define CONSOLE_BIT_MASK 0x8000
enum bkpdata_index {
BKPDATA_INDEX_SCRATCHPAD, /* General-purpose scratchpad */
@@ -65,15 +62,15 @@ static void check_reset_cause(void)
uint32_t raw_cause = STM32_RCC_CSR;
uint32_t pwr_status = STM32_PWR_CSR;
- uint32_t fake_wp = flags & 0x8000;
- flags &= ~0x8000;
+ uint32_t console_en = flags & CONSOLE_BIT_MASK;
+ flags &= ~CONSOLE_BIT_MASK;
/* Clear the hardware reset cause by setting the RMVF bit */
STM32_RCC_CSR |= 1 << 24;
/* Clear SBF in PWR_CSR */
STM32_PWR_CR |= 1 << 3;
/* Clear saved reset flags */
- bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0 | fake_wp);
+ bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0 | console_en);
if (raw_cause & 0x60000000) {
/*
@@ -155,8 +152,8 @@ void system_reset(int flags)
{
uint32_t save_flags = 0;
- uint32_t fake_wp =
- bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000;
+ uint32_t console_en = bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) &
+ CONSOLE_BIT_MASK;
/* Disable interrupts to avoid task swaps during reboot */
interrupt_disable();
@@ -178,7 +175,7 @@ void system_reset(int flags)
if (flags & SYSTEM_RESET_HARD)
save_flags |= RESET_FLAG_HARD;
- bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags | fake_wp);
+ bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags | console_en);
if (flags & SYSTEM_RESET_HARD) {
/* Ask the watchdog to trigger a hard reboot */
@@ -217,7 +214,10 @@ const char *system_get_chip_vendor(void)
const char *system_get_chip_name(void)
{
- return STRINGIFY(CHIP_VARIANT);
+ if (system_get_console_force_enabled())
+ return STRINGIFY(CHIP_VARIANT-unsafe);
+ else
+ return STRINGIFY(CHIP_VARIANT);
}
const char *system_get_chip_revision(void)
@@ -258,23 +258,21 @@ int system_set_vbnvcontext(const uint8_t *block)
return EC_SUCCESS;
}
-/* TODO: crosbug.com/p/12036 */
-int system_set_fake_wp(int val)
+int system_set_console_force_enabled(int val)
{
uint16_t flags = bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS);
if (val)
- flags |= 0x8000;
+ flags |= CONSOLE_BIT_MASK;
else
- flags &= ~0x8000;
+ flags &= ~CONSOLE_BIT_MASK;
return bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, flags);
}
-/* TODO: crosbug.com/p/12036 */
-int system_get_fake_wp(void)
+int system_get_console_force_enabled(void)
{
- if (bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000)
+ if (bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & CONSOLE_BIT_MASK)
return 1;
else
return 0;
diff --git a/common/console.c b/common/console.c
index e7b4564dcb..e59760237d 100644
--- a/common/console.c
+++ b/common/console.c
@@ -167,7 +167,7 @@ void console_task(void)
{
#ifdef CONFIG_CONSOLE_RESTRICTED_INPUT
/* the console is not available due to security restrictions */
- if (system_is_locked()) {
+ if (system_is_locked() && !system_get_console_force_enabled()) {
ccprintf("Console is DISABLED (WP is ON).\n");
while (1)
task_wait_event(-1);
@@ -246,3 +246,25 @@ DECLARE_CONSOLE_COMMAND(help, command_help,
"[ list | <name> ]",
"Print command help",
NULL);
+
+#ifdef CONFIG_CONSOLE_RESTRICTED_INPUT
+static int command_force_enabled(int argc, char **argv)
+{
+ int val;
+
+ if (argc < 2)
+ return EC_ERROR_PARAM_COUNT;
+
+ if (!parse_bool(argv[1], &val))
+ return EC_ERROR_PARAM1;
+
+ system_set_console_force_enabled(val);
+ ccprintf("Console force enabled = %s\n", val ? "on" : "off");
+
+ return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(forceen, command_force_enabled,
+ "<on | off>",
+ "Force enable console",
+ NULL);
+#endif
diff --git a/include/system.h b/include/system.h
index fb31e54268..82dda5fff3 100644
--- a/include/system.h
+++ b/include/system.h
@@ -260,4 +260,11 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds);
/* Minimum duration to get proper hibernation */
#define SYSTEM_HIB_MINIMUM_DURATION 0, 150000
+/**
+ * Get/Set console force enable status. This is only supported/used on platform
+ * with CONFIG_CONSOLE_RESTRICTED_INPUT defined.
+ */
+int system_get_console_force_enabled(void);
+int system_set_console_force_enabled(int enabled);
+
#endif /* __CROS_EC_SYSTEM_H */