rowan: Add initial support for rowan

Copied from elm with string updated.

BRANCH=master
BUG=chrome-os-partner:62673
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec

Change-Id: I424e9ea1cb1520766222eff3156da5f6edbcc2fd
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/427560
Commit-Ready: Patrick Berny <pberny@chromium.org>
Tested-by: Patrick Berny <pberny@chromium.org>
Reviewed-by: Patrick Berny <pberny@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>

8 files changed, 1609 insertions, 0 deletions

diff --git a/board/rowan/battery.c b/board/rowan/battery.c
new file mode 100644
index 0000000000..de9685a89d
--- /dev/null
+++ b/board/rowan/battery.c
@@ -0,0 +1,47 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "util.h"
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHIP_MODE_REG	0x3a
+#define SB_SHUTDOWN_DATA	0xC574
+
+static const struct battery_info info = {
+	.voltage_max = 13200,
+	.voltage_normal = 11550,
+	.voltage_min = 9100,
+	/* Pre-charge values. */
+	.precharge_current = 256, /* mA */
+
+	.start_charging_min_c = 0,
+	.start_charging_max_c = 50,
+	.charging_min_c = 0,
+	.charging_max_c = 60,
+	.discharging_min_c = 0,
+	.discharging_max_c = 60,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+	return &info;
+}
+
+int board_cut_off_battery(void)
+{
+	int rv;
+
+	/* Ship mode command must be sent twice to take effect */
+	rv = sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA);
+
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	return sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA);
+}
diff --git a/board/rowan/board.c b/board/rowan/board.c
new file mode 100644
index 0000000000..6808568702
--- /dev/null
+++ b/board/rowan/board.c
@@ -0,0 +1,587 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Oak board configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "atomic.h"
+#include "battery.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "charger.h"
+#include "chipset.h"
+#include "common.h"
+#include "console.h"
+#include "driver/accel_kionix.h"
+#include "driver/accel_kx022.h"
+#include "driver/tcpm/anx7688.h"
+#include "driver/tcpm/tcpci.h"
+#include "driver/temp_sensor/tmp432.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "i2c.h"
+#include "keyboard_raw.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "math_util.h"
+#include "motion_lid.h"
+#include "motion_sense.h"
+#include "pi3usb9281.h"
+#include "power.h"
+#include "power_button.h"
+#include "registers.h"
+#include "spi.h"
+#include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "temp_sensor.h"
+#include "temp_sensor_chip.h"
+#include "thermal.h"
+#include "timer.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usb_pd_tcpm.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+/* Dispaly port hardware can connect to port 0, 1 or neither. */
+#define PD_PORT_NONE -1
+
+void pd_mcu_interrupt(enum gpio_signal signal)
+{
+#ifdef HAS_TASK_PDCMD
+	/* Exchange status with PD MCU to determine interrupt cause */
+	host_command_pd_send_status(0);
+#endif
+}
+
+void deferred_reset_pd_mcu(void);
+DECLARE_DEFERRED(deferred_reset_pd_mcu);
+
+void usb_evt(enum gpio_signal signal)
+{
+	if (!gpio_get_level(GPIO_BC12_WAKE_L))
+		task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
+}
+
+#include "gpio_list.h"
+
+/* power signal list.  Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	{GPIO_SOC_POWER_GOOD, 1, "POWER_GOOD"},	/* Active high */
+	{GPIO_SUSPEND_L, 0, "SUSPEND#_ASSERTED"},	/* Active low */
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+	/*
+	 * PSYS_MONITOR(PA2): ADC_IN2, 1.44 uA/W on 6.05k Ohm
+	 * output in mW
+	 */
+	[ADC_PSYS] = {"PSYS", 379415, 4096, 0, STM32_AIN(2)},
+	/* AMON_BMON(PC0): ADC_IN10, output in uV */
+	[ADC_AMON_BMON] = {"AMON_BMON", 183333, 4096, 0, STM32_AIN(10)},
+	/* VDC_BOOSTIN_SENSE(PC1): ADC_IN11, output in mV */
+	[ADC_VBUS] = {"VBUS", 33000, 4096, 0, STM32_AIN(11)},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+int anx7688_passthru_allowed(const struct i2c_port_t *port, uint16_t address)
+{
+	/* Allow access to 0x2c (TCPC) */
+	if (address == 0x2c)
+		return 1;
+
+	CPRINTF("Passthru rejected on %x", address);
+
+	return 0;
+}
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+	{"battery", I2C_PORT_BATTERY, 100,  GPIO_I2C0_SCL, GPIO_I2C0_SDA},
+	{"pd",      I2C_PORT_PD_MCU,  1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA,
+		anx7688_passthru_allowed}
+};
+
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/* SPI devices */
+const struct spi_device_t spi_devices[] = {
+	{ CONFIG_SPI_ACCEL_PORT, 2, GPIO_SPI2_NSS },
+	{ CONFIG_SPI_ACCEL_PORT, 2, GPIO_SPI2_NSS_DB }
+};
+const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
+
+/* TCPC */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+	{I2C_PORT_TCPC, CONFIG_TCPC_I2C_BASE_ADDR, &anx7688_tcpm_drv},
+};
+
+struct pi3usb9281_config pi3usb9281_chips[] = {
+	{
+		.i2c_port = I2C_PORT_PERICOM,
+		.mux_lock = NULL,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) ==
+	     CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT);
+
+/*
+ * Temperature sensors data; must be in same order as enum temp_sensor_id.
+ * Sensor index and name must match those present in coreboot:
+ *     src/mainboard/google/${board}/acpi/dptf.asl
+ */
+const struct temp_sensor_t temp_sensors[] = {
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+	{"TMP432_Internal", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_LOCAL, 4},
+	{"TMP432_Sensor_1", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_REMOTE1, 4},
+	{"TMP432_Sensor_2", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
+		TMP432_IDX_REMOTE2, 4},
+#endif
+	{"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp,
+		0, 4},
+};
+BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
+	{
+		.port_addr = 0, /* port idx */
+		.driver    = &anx7688_usb_mux_driver,
+	},
+};
+
+/**
+ * Reset PD MCU
+ *   ANX7688 needs a reset pulse of 50ms after power enable.
+ */
+void deferred_reset_pd_mcu(void)
+{
+	uint8_t state = gpio_get_level(GPIO_USB_C0_PWR_EN_L) |
+			(gpio_get_level(GPIO_USB_C0_RST) << 1);
+
+	CPRINTS("%s %d", __func__, state);
+	switch (state) {
+	case 0:
+		/*
+		 * PWR_EN_L low, RST low
+		 * start reset sequence by turning off power enable
+		 * and wait for 1ms.
+		 */
+		gpio_set_level(GPIO_USB_C0_PWR_EN_L, 1);
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 1*MSEC);
+		break;
+	case 1:
+		/*
+		 * PWR_EN_L high, RST low
+		 * pull PD reset pin and wait for another 1ms
+		 */
+		gpio_set_level(GPIO_USB_C0_RST, 1);
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 1*MSEC);
+		/* on PD reset, trigger PD task to reset state */
+		task_set_event(TASK_ID_PD_C0, PD_EVENT_TCPC_RESET, 0);
+		break;
+	case 3:
+		/*
+		 * PWR_EN_L high, RST high
+		 * enable power and wait for 10ms then pull RESET_N
+		 */
+		gpio_set_level(GPIO_USB_C0_PWR_EN_L, 0);
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 10*MSEC);
+		break;
+	case 2:
+		/*
+		 * PWR_EN_L low, RST high
+		 * leave reset state
+		 */
+		gpio_set_level(GPIO_USB_C0_RST, 0);
+		break;
+	}
+}
+
+static void board_power_on_pd_mcu(void)
+{
+	/* check if power is already on */
+	if (!gpio_get_level(GPIO_USB_C0_PWR_EN_L))
+		return;
+
+	gpio_set_level(GPIO_USB_C0_EXTPWR_EN, 1);
+	hook_call_deferred(&deferred_reset_pd_mcu_data, 1*MSEC);
+}
+
+void board_reset_pd_mcu(void)
+{
+	/* enable port controller's cable detection before reset */
+	anx7688_enable_cable_detection(0);
+
+	/* wait for 10ms, then start port controller's reset sequence */
+	hook_call_deferred(&deferred_reset_pd_mcu_data, 10*MSEC);
+}
+
+int command_pd_reset(int argc, char **argv)
+{
+	board_reset_pd_mcu();
+	return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(resetpd, command_pd_reset,
+			"",
+			"Reset PD IC");
+
+/**
+ * There is a level shift for AC_OK & LID_OPEN signal between AP & EC,
+ * disable it (drive high) when AP is off, otherwise enable it (drive low).
+ */
+static void board_extpower_buffer_to_soc(void)
+{
+	/* Drive high when AP is off (G3), else drive low */
+	gpio_set_level(GPIO_LEVEL_SHIFT_EN_L,
+		       chipset_in_state(CHIPSET_STATE_HARD_OFF) ? 1 : 0);
+}
+
+/* Initialize board. */
+static void board_init(void)
+{
+	/* Enable Level shift of AC_OK & LID_OPEN signals */
+	board_extpower_buffer_to_soc();
+	/* Enable rev1 testing GPIOs */
+	gpio_set_level(GPIO_SYSTEM_POWER_H, 1);
+	/* Enable PD MCU interrupt */
+	gpio_enable_interrupt(GPIO_PD_MCU_INT);
+
+	/* Enable BC 1.2 */
+	gpio_enable_interrupt(GPIO_BC12_CABLE_INT);
+
+	/* Check if typeC is already connected, and do 7688 power on flow */
+	board_power_on_pd_mcu();
+
+	/* Update VBUS supplier */
+	usb_charger_vbus_change(0, !gpio_get_level(GPIO_USB_C0_VBUS_WAKE_L));
+
+	/* Remap SPI2 to DMA channels 6 and 7 */
+	REG32(STM32_DMA1_BASE + 0xa8) |= (1 << 20) | (1 << 21) |
+					 (1 << 24) | (1 << 25);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/**
+ * Set active charge port -- only one port can active at a time.
+ *
+ * @param charge_port    Charge port to enable.
+ *
+ * Return EC_SUCCESS if charge port is accepted and made active.
+ * EC_ERROR_* otherwise.
+ */
+int board_set_active_charge_port(int charge_port)
+{
+	/* charge port is a physical port */
+	int is_real_port = (charge_port >= 0 &&
+			    charge_port < CONFIG_USB_PD_PORT_COUNT);
+	/* check if we are source VBUS on the port */
+	int source = gpio_get_level(GPIO_USB_C0_5V_EN);
+	static int initialized;
+
+	/*
+	 * Reject charge port disable if our battery is critical and we
+	 * have yet to initialize a charge port - continue to charge using
+	 * charger ROM / POR settings.
+	 */
+	if (!initialized &&
+	    charge_port == CHARGE_PORT_NONE &&
+	    charge_get_percent() < 2)
+		return -1;
+
+	if (is_real_port && source) {
+		CPRINTF("Skip enable p%d", charge_port);
+		return EC_ERROR_INVAL;
+	}
+
+	CPRINTF("New chg p%d", charge_port);
+
+	if (charge_port == CHARGE_PORT_NONE) {
+		/* Disable charging port */
+		gpio_set_level(GPIO_USB_C0_CHARGE_L, 1);
+	} else {
+		/* Enable charging port */
+		gpio_set_level(GPIO_USB_C0_CHARGE_L, 0);
+	}
+
+	initialized = 1;
+	return EC_SUCCESS;
+}
+
+/**
+ * Set the charge limit based upon desired maximum.
+ *
+ * @param port          Port number.
+ * @param supplier      Charge supplier type.
+ * @param charge_ma     Desired charge limit (mA).
+ * @param charge_mv     Negotiated charge voltage (mV).
+ */
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+			    int max_ma, int charge_mv)
+{
+	/* Limit input current 95% ratio on rowan board for safety */
+	charge_ma = (charge_ma * 95) / 100;
+	charge_set_input_current_limit(MAX(charge_ma,
+				   CONFIG_CHARGER_INPUT_CURRENT), charge_mv);
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+/**
+ * Return whether ramping is allowed for given supplier
+ */
+int board_is_ramp_allowed(int supplier)
+{
+	/* Don't allow ramping in RO when write protected */
+	if (system_get_image_copy() != SYSTEM_IMAGE_RW
+	    && system_is_locked())
+		return 0;
+	else
+		return supplier == CHARGE_SUPPLIER_BC12_DCP ||
+		       supplier == CHARGE_SUPPLIER_BC12_SDP ||
+		       supplier == CHARGE_SUPPLIER_BC12_CDP ||
+		       supplier == CHARGE_SUPPLIER_PROPRIETARY;
+}
+
+/**
+ * Return the maximum allowed input current
+ */
+int board_get_ramp_current_limit(int supplier, int sup_curr)
+{
+	switch (supplier) {
+	case CHARGE_SUPPLIER_BC12_DCP:
+		return 2000;
+	case CHARGE_SUPPLIER_BC12_SDP:
+		return 1000;
+	case CHARGE_SUPPLIER_BC12_CDP:
+	case CHARGE_SUPPLIER_PROPRIETARY:
+		return sup_curr;
+	default:
+		return 500;
+	}
+}
+
+/**
+ * Set AP reset.
+ * AP_RESET_L (PC3, CPU_WARM_RESET_L) is connected to PMIC SYSRSTB
+ */
+void board_set_ap_reset(int asserted)
+{
+	/* Signal is active-low */
+	CPRINTS("ap warm reset(%d)", asserted);
+	gpio_set_level(GPIO_AP_RESET_L, !asserted);
+}
+
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+static void tmp432_set_power_deferred(void)
+{
+	/* Shut tmp432 down if not in S0 && no external power */
+	if (!extpower_is_present() && !chipset_in_state(CHIPSET_STATE_ON)) {
+		if (EC_SUCCESS != tmp432_set_power(TMP432_POWER_OFF))
+			CPRINTS("ERROR: Can't shutdown TMP432.");
+		return;
+	}
+
+	/*  else, turn it on. */
+	if (EC_SUCCESS != tmp432_set_power(TMP432_POWER_ON))
+		CPRINTS("ERROR: Can't turn on TMP432.");
+}
+DECLARE_DEFERRED(tmp432_set_power_deferred);
+#endif
+
+/**
+ * Hook of AC change. turn on/off tmp432 depends on AP & AC status.
+ */
+static void board_extpower(void)
+{
+	board_extpower_buffer_to_soc();
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+	hook_call_deferred(&tmp432_set_power_deferred_data, 0);
+#endif
+}
+DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S5 -> S3 transition, and before HOOK_CHIPSET_STARTUP */
+static void board_chipset_pre_init(void)
+{
+	/* Enable level shift of AC_OK when power on */
+	board_extpower_buffer_to_soc();
+
+	/* Enable SPI for KX022 */
+	gpio_config_module(MODULE_SPI_MASTER, 1);
+
+	/* Set all four SPI pins to high speed */
+	/* pins D0/D1/D3/D4 */
+	STM32_GPIO_OSPEEDR(GPIO_D) |= 0x000003cf;
+	/* pins F6 */
+	STM32_GPIO_OSPEEDR(GPIO_F) |= 0x00003000;
+
+	/* Enable clocks to SPI2 module */
+	STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
+
+	/* Reset SPI2 */
+	STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2;
+	STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2;
+
+	spi_enable(CONFIG_SPI_ACCEL_PORT, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, board_chipset_pre_init, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S5 transition */
+static void board_chipset_shutdown(void)
+{
+	/* Disable level shift to SoC when shutting down */
+	gpio_set_level(GPIO_LEVEL_SHIFT_EN_L, 1);
+
+	spi_enable(CONFIG_SPI_ACCEL_PORT, 0);
+
+	/* Disable clocks to SPI2 module */
+	STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2;
+
+	gpio_config_module(MODULE_SPI_MASTER, 0);
+
+	/*
+	 * Calling gpio_config_module sets disabled alternate function pins to
+	 * GPIO_INPUT.  But to prevent leakage we want to set GPIO_OUT_LOW
+	 */
+	gpio_set_flags_by_mask(GPIO_D, 0x1a, GPIO_OUT_LOW);
+	gpio_set_level(GPIO_SPI2_NSS, 0);
+	gpio_set_level(GPIO_SPI2_NSS_DB, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S0 transition */
+static void board_chipset_resume(void)
+{
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+	hook_call_deferred(&tmp432_set_power_deferred_data, 0);
+#endif
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S0 -> S3 transition */
+static void board_chipset_suspend(void)
+{
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+	hook_call_deferred(&tmp432_set_power_deferred_data, 0);
+#endif
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
+
+#ifdef HAS_TASK_MOTIONSENSE
+/* Motion sensors */
+/* Mutexes */
+static struct mutex g_kx022_mutex[2];
+
+/* Matrix to rotate accelerometer into standard reference frame */
+const matrix_3x3_t base_standard_ref = {
+	{ FLOAT_TO_FP(-1), 0,  0},
+	{ 0,  FLOAT_TO_FP(1),  0},
+	{ 0,  0, FLOAT_TO_FP(-1)}
+};
+
+const matrix_3x3_t lid_standard_ref = {
+	{ FLOAT_TO_FP(1),  0,  0},
+	{ 0, FLOAT_TO_FP(-1),  0},
+	{ 0,  0, FLOAT_TO_FP(-1)}
+};
+
+/* KX022 private data */
+struct kionix_accel_data g_kx022_data[2];
+
+struct motion_sensor_t motion_sensors[] = {
+	{.name = "Base Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_KX022,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &kionix_accel_drv,
+	 .mutex = &g_kx022_mutex[0],
+	 .drv_data = &g_kx022_data[0],
+	 .addr = 1, /* SPI, device ID 0 */
+	 .rot_standard_ref = &base_standard_ref,
+	 .default_range = 2, /* g, enough for laptop. */
+	 .config = {
+		/* AP: by default use EC settings */
+		[SENSOR_CONFIG_AP] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+		/* EC use accel for angle detection */
+		[SENSOR_CONFIG_EC_S0] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+		/* unused */
+		[SENSOR_CONFIG_EC_S3] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+		[SENSOR_CONFIG_EC_S5] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+	 },
+	},
+
+	{.name = "Lid Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_KX022,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &kionix_accel_drv,
+	 .mutex = &g_kx022_mutex[1],
+	 .drv_data = &g_kx022_data[1],
+	 .addr = 3, /* SPI, device ID 1 */
+	 .rot_standard_ref = &lid_standard_ref,
+	 .default_range = 2, /* g, enough for laptop. */
+	 .config = {
+		/* AP: by default use EC settings */
+		[SENSOR_CONFIG_AP] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+		/* EC use accel for angle detection */
+		[SENSOR_CONFIG_EC_S0] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+		/* unused */
+		[SENSOR_CONFIG_EC_S3] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+		[SENSOR_CONFIG_EC_S5] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+	 },
+	},
+};
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+
+void lid_angle_peripheral_enable(int enable)
+{
+	keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE);
+
+	/* enable/disable touchpad */
+	gpio_set_level(GPIO_EN_TP_INT_L, !enable);
+}
+#endif /* defined(HAS_TASK_MOTIONSENSE) */
+
+uint16_t tcpc_get_alert_status(void)
+{
+	return gpio_get_level(GPIO_PD_MCU_INT) ? PD_STATUS_TCPC_ALERT_0 : 0;
+}
+
diff --git a/board/rowan/board.h b/board/rowan/board.h
new file mode 100644
index 0000000000..387ca6c710
--- /dev/null
+++ b/board/rowan/board.h
@@ -0,0 +1,224 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* rowan board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/*
+ * Allow dangerous commands.
+ * TODO: Remove this config engineering velidation.
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+/* Accelero meter and gyro sensor */
+#define CONFIG_ACCEL_KX022
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+#define CONFIG_LID_ANGLE
+#define CONFIG_LID_ANGLE_SENSOR_BASE 0
+#define CONFIG_LID_ANGLE_SENSOR_LID 1
+#define CONFIG_LID_ANGLE_UPDATE
+
+#define CONFIG_ADC
+#undef  CONFIG_ADC_WATCHDOG
+
+/* AC adaptor, charger, battery */
+#define CONFIG_BATTERY_CUT_OFF
+#undef CONFIG_BATTERY_PRECHARGE_TIMEOUT
+#define CONFIG_BATTERY_PRECHARGE_TIMEOUT 300
+#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L
+#define CONFIG_BATTERY_SMART
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_INPUT_CURRENT 512
+#define CONFIG_CHARGE_RAMP_HW
+#define CONFIG_CHARGER_ISL9237
+#define CONFIG_CHARGER_MAX_INPUT_CURRENT 3000
+#define CONFIG_CHARGER_NARROW_VDC
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+#define CONFIG_CHARGER_V2
+#define CONFIG_CHIPSET_MEDIATEK
+#define CONFIG_CMD_TYPEC
+#define CONFIG_EXTPOWER_GPIO
+
+/* Increase tx buffer size, as we'd like to stream EC log to AP. */
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 8192
+
+/* Wakeup pin: EC_WAKE(PA0) - WKUP1 */
+#define CONFIG_FORCE_CONSOLE_RESUME
+#define CONFIG_HIBERNATE
+#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP1)
+
+/* Other configs */
+#define CONFIG_HOST_COMMAND_STATUS
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_KEYBOARD_PROTOCOL_MKBP
+#define CONFIG_LED_COMMON
+#define CONFIG_LID_SWITCH
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_MKBP_EVENT
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_COMMON
+#define CONFIG_USB_CHARGER
+#define CONFIG_SPI
+#define CONFIG_SPI_MASTER
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_VBOOT_HASH
+#undef  CONFIG_WATCHDOG_HELP
+#define CONFIG_SWITCH
+#define CONFIG_BOARD_VERSION
+#undef  CONFIG_UART_CONSOLE
+#define CONFIG_UART_CONSOLE 1
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_DPTF
+
+/* Type-C */
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_SS_MUX_DFP_ONLY
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_CUSTOM_VDM
+#define CONFIG_USB_PD_DUAL_ROLE
+
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_LOG_SIZE 512
+
+#define CONFIG_USB_PD_PORT_COUNT 1
+#define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_ANX7688
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_PD_VBUS_DETECT_TCPC
+#undef  CONFIG_TCPC_I2C_BASE_ADDR
+#define CONFIG_TCPC_I2C_BASE_ADDR 0x58
+#define CONFIG_USB_PD_ANX7688
+
+/* UART DMA */
+#undef CONFIG_UART_TX_DMA
+#undef CONFIG_UART_RX_DMA
+
+/* BC 1.2 charger */
+#define CONFIG_USB_SWITCH_PI3USB9281
+#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 1
+
+/* Optional features */
+#define CONFIG_CMD_CHARGER_ADC_AMON_BMON
+#define CONFIG_CMD_HOSTCMD
+/* Mark host command structs as aligned */
+#define CONFIG_HOSTCMD_ALIGNED
+/* By default, set hcdebug to off */
+#undef CONFIG_HOSTCMD_DEBUG_MODE
+#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
+#define CONFIG_CMD_I2C_PROTECT
+#define CONFIG_CMD_PD_CONTROL
+
+/* Drivers */
+#ifndef __ASSEMBLER__
+
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
+/* Keyboard output port list */
+#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C, GPIO_D
+
+/* 2 I2C master ports, connect to battery, charger, pd and USB switches */
+#define I2C_PORT_MASTER  0
+#define I2C_PORT_ACCEL   0
+#define I2C_PORT_BATTERY 0
+#define I2C_PORT_CHARGER 0
+#define I2C_PORT_PERICOM 0
+#define I2C_PORT_THERMAL 0
+#define I2C_PORT_PD_MCU  1
+#define I2C_PORT_USB_MUX 1
+#define I2C_PORT_TCPC    1
+
+/* Enable Accel over SPI */
+#define CONFIG_SPI_ACCEL_PORT    0  /* First SPI master port (SPI2) */
+
+/* Timer selection */
+#define TIM_CLOCK32 2
+#define TIM_WATCHDOG 4
+
+/* Define the MKBP events which are allowed to wakeup AP in S3. */
+#define CONFIG_MKBP_WAKEUP_MASK \
+		(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
+		 EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) |\
+		 EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\
+		 EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY) |\
+		 EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_FASTBOOT))
+
+#include "gpio_signal.h"
+
+enum power_signal {
+	MTK_POWER_GOOD = 0,
+	MTK_SUSPEND_ASSERTED,
+	/* Number of power signals */
+	POWER_SIGNAL_COUNT
+};
+
+enum pwm_channel {
+	PWM_CH_POWER_LED = 0,
+	/* Number of PWM channels */
+	PWM_CH_COUNT
+};
+
+enum adc_channel {
+	ADC_PSYS = 0,  /* PC1: STM32_AIN(2) */
+	ADC_AMON_BMON, /* PC0: STM32_AIN(10) */
+	ADC_VBUS,      /* PA2: STM32_AIN(11) */
+	ADC_CH_COUNT
+};
+
+enum temp_sensor_id {
+#ifdef CONFIG_TEMP_SENSOR_TMP432
+	/* TMP432 local and remote sensors */
+	TEMP_SENSOR_I2C_TMP432_LOCAL,
+	TEMP_SENSOR_I2C_TMP432_REMOTE1,
+	TEMP_SENSOR_I2C_TMP432_REMOTE2,
+#endif
+	/* Battery temperature sensor */
+	TEMP_SENSOR_BATTERY,
+
+	TEMP_SENSOR_COUNT
+};
+
+/* TODO: determine the following board specific type-C power constants */
+/*
+ * delay to turn on the power supply max is ~16ms.
+ * delay to turn off the power supply max is about ~180ms.
+ */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY  30000  /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
+
+/* delay to turn on/off vconn */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
+/* Define typical operating power and max power */
+#define PD_OPERATING_POWER_MW 15000
+#define PD_MAX_POWER_MW       45000
+#define PD_MAX_CURRENT_MA     CONFIG_CHARGER_MAX_INPUT_CURRENT
+#define PD_MAX_VOLTAGE_MV     20000
+
+/* The lower the input voltage, the higher the power efficiency. */
+#define PD_PREFER_LOW_VOLTAGE
+
+/* Reset PD MCU */
+void board_reset_pd_mcu(void);
+/* Set AP reset pin according to parameter */
+void board_set_ap_reset(int asserted);
+
+#endif  /* !__ASSEMBLER__ */
+
+#endif  /* __CROS_EC_BOARD_H */
diff --git a/board/rowan/build.mk b/board/rowan/build.mk
new file mode 100644
index 0000000000..172a88e843
--- /dev/null
+++ b/board/rowan/build.mk
@@ -0,0 +1,14 @@
+#-*- makefile -*-
+# Copyright 2016 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+
+# STmicro STM32F091VC
+CHIP := stm32
+CHIP_FAMILY := stm32f0
+CHIP_VARIANT:= stm32f09x
+
+board-y = board.o battery.o led.o
+board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/board/rowan/ec.tasklist b/board/rowan/ec.tasklist
new file mode 100644
index 0000000000..dd858ff9c1
--- /dev/null
+++ b/board/rowan/ec.tasklist
@@ -0,0 +1,30 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
+ * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
+ * where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(PDCMD, pd_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(MOTIONSENSE, motion_sense_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE)
diff --git a/board/rowan/gpio.inc b/board/rowan/gpio.inc
new file mode 100644
index 0000000000..e48290c4ab
--- /dev/null
+++ b/board/rowan/gpio.inc
@@ -0,0 +1,113 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+GPIO_INT(AC_PRESENT,     PIN(C, 6),  GPIO_INT_BOTH,    extpower_interrupt)
+GPIO_INT(LID_OPEN,       PIN(C, 13), GPIO_INT_BOTH,    lid_interrupt)          /* LID switch detection */
+GPIO_INT(SUSPEND_L,      PIN(C, 7),  GPIO_INT_BOTH,    power_signal_interrupt) /* AP suspend/resume state */
+GPIO_INT(SOC_POWER_GOOD, PIN(A, 3),  GPIO_INT_BOTH,    power_signal_interrupt)
+GPIO_INT(PD_MCU_INT,     PIN(E, 0),  GPIO_INT_RISING,  pd_mcu_interrupt)       /* Signal from PD MCU, external pull-up */
+GPIO_INT(BC12_CABLE_INT, PIN(E, 1),  GPIO_INT_FALLING | GPIO_PULL_UP, usb_evt)    /* interrupt from BC12 and CABLE_DET */
+GPIO_INT(POWER_BUTTON_L, PIN(B, 5),  GPIO_INT_BOTH | GPIO_PULL_UP,  power_button_interrupt)
+GPIO_INT(SPI1_NSS,       PIN(A, 4),  GPIO_INT_BOTH | GPIO_PULL_UP,  spi_event)              /* SPI Chip Select */
+
+/* Keyboard inputs */
+#define GPIO_KB_INPUT  (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
+#define GPIO_KB_OUTPUT GPIO_ODR_HIGH
+
+GPIO_INT(KB_IN00, PIN(C, 8),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN01, PIN(C, 9),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN02, PIN(C, 10), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN03, PIN(C, 11), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN04, PIN(C, 12), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN05, PIN(C, 14), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN06, PIN(C, 15), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN07, PIN(D, 2),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+
+GPIO(KB_OUT00,          PIN(B, 0),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT01,          PIN(B, 8),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT02,          PIN(B, 12), GPIO_OUT_LOW)   /* KSO2 is inverted */
+GPIO(KB_OUT03,          PIN(B, 2),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT04,          PIN(A, 8),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT05,          PIN(D, 14), GPIO_KB_OUTPUT)
+GPIO(KB_OUT06,          PIN(D, 13), GPIO_KB_OUTPUT)
+GPIO(KB_OUT07,          PIN(D, 15), GPIO_KB_OUTPUT)
+GPIO(KB_OUT08,          PIN(C, 2),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT09,          PIN(B, 1),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT10,          PIN(C, 5),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT11,          PIN(C, 4),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT12,          PIN(D, 5),  GPIO_KB_OUTPUT)
+
+
+/* Inputs without interrupt handlers */
+GPIO(5V_POWER_GOOD,      PIN(A, 1), GPIO_INPUT)
+GPIO(EC_WAKE,            PIN(A, 0), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(WP_L,               PIN(B, 4), GPIO_INPUT)      /* Write protect input */
+GPIO(BAT_PRESENT_L,      PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(USB_C0_VBUS_WAKE_L, PIN(D, 12), GPIO_INPUT)
+GPIO(EC_INT_L,           PIN(B, 9),  GPIO_ODR_HIGH)
+
+/* Board version */
+GPIO(BOARD_VERSION1, PIN(E, 10), GPIO_INPUT) /* Board ID 0 */
+GPIO(BOARD_VERSION2, PIN(E,  9), GPIO_INPUT) /* Board ID 1 */
+GPIO(BOARD_VERSION3, PIN(E, 12), GPIO_INPUT) /* Board ID 2 */
+GPIO(BOARD_VERSION4, PIN(E, 11), GPIO_INPUT) /* Board ID 3 */
+
+/* Outputs */
+GPIO(BAT_LED0,          PIN(A, 11), GPIO_OUT_LOW)   /* LED_BLUE */
+GPIO(BAT_LED1,          PIN(B, 11), GPIO_OUT_LOW)   /* LED_ORANGE   */
+GPIO(PWR_LED0,          PIN(E,  8), GPIO_OUT_LOW)   /* LED_BLUE */
+GPIO(PWR_LED1,          PIN(D,  6), GPIO_OUT_LOW)   /* LED_ORANGE   */
+
+GPIO(EC_BL_OVERRIDE,    PIN(F, 1),  GPIO_OUT_LOW)
+GPIO(ENTERING_RW,       PIN(F, 0),  GPIO_OUT_LOW)
+
+GPIO(AP_RESET_L,        PIN(C, 3),  GPIO_ODR_HIGH) /* Connect to the PMU_SYSRSTB */
+GPIO(BC12_WAKE_L,       PIN(D, 7),  GPIO_INPUT)
+GPIO(USB_C0_CABLE_DET_L,PIN(E, 7),  GPIO_INPUT | GPIO_PULL_UP)
+
+GPIO(SYSTEM_POWER_H,    PIN(B, 10), GPIO_OUT_LOW)
+GPIO(PMIC_PWRON_H,      PIN(A, 12), GPIO_OUT_LOW)
+GPIO(PMIC_WARM_RESET_H, PIN(B, 3),  GPIO_OUT_LOW)
+GPIO(LEVEL_SHIFT_EN_L,  PIN(F, 10), GPIO_OUT_LOW)    /* LID/AC level shift */
+
+GPIO(USB_C0_5V_EN,      PIN(D, 8),  GPIO_OUT_LOW)    /* USBC port 0 5V */
+GPIO(USB_C0_CHARGE_L,   PIN(D, 9),  GPIO_OUT_LOW)    /* USBC port 0 charge */
+GPIO(USB_C0_RST,        PIN(D, 10), GPIO_ODR_HIGH)    /* ANX7688 reset */
+GPIO(USB_C0_PWR_EN_L,   PIN(B, 15), GPIO_ODR_HIGH)    /* ANX7688 power enable */
+GPIO(USB_C0_EXTPWR_EN,  PIN(F, 2),  GPIO_OUT_LOW)   /* ANX7688 3.3V ext power enable */
+GPIO(USB_DP_HPD,        PIN(F, 3),  GPIO_INPUT)
+GPIO(EN_TP_INT_L,       PIN(E, 14), GPIO_OUT_LOW)    /* touchpad interrupt enable */
+
+/* Analog pins */
+GPIO(VDC_BOOSTIN_SENSE, PIN(C, 1), GPIO_ANALOG) /* ADC_IN11 */
+GPIO(PSYS_MONITOR,      PIN(A, 2), GPIO_ANALOG) /* ADC_IN2  */
+GPIO(AMON_BMON,         PIN(C, 0), GPIO_ANALOG) /* ADC_IN10 */
+
+/*
+ * I2C pins should be configured as inputs until I2C module is
+ * initialized. This will avoid driving the lines unintentionally.
+ */
+GPIO(I2C0_SCL, PIN(B, 6),  GPIO_INPUT) /* EC I2C */
+GPIO(I2C0_SDA, PIN(B, 7),  GPIO_INPUT)
+GPIO(I2C1_SCL, PIN(B, 13), GPIO_INPUT) /* PD I2C */
+GPIO(I2C1_SDA, PIN(B, 14), GPIO_INPUT)
+
+/* SPI MASTER. For SPI sensor */
+GPIO(SPI2_NSS,    PIN(D, 0),  GPIO_OUT_HIGH) /* mainboard */
+GPIO(SPI2_NSS_DB, PIN(F, 6),  GPIO_OUT_HIGH) /* daughterboard */
+
+/* sensor power control */
+GPIO(SENSOR_PWR_EN_L, PIN(D, 11), GPIO_OUT_LOW)
+
+ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART,       0) /* USART1: PA9/PA10 */
+ALTERNATE(PIN_MASK(B, 0x00c0), 1, MODULE_I2C,        0) /* I2C MASTER:PB6/7 */
+ALTERNATE(PIN_MASK(B, 0x6000), 5, MODULE_I2C,        0) /* I2C MASTER:PB13/14 */
+ALTERNATE(PIN_MASK(A, 0x00f0), 0, MODULE_SPI,        0) /* SPI SLAVE:PA4/5/6/7 */
+ALTERNATE(PIN_MASK(D, 0x001A), 1, MODULE_SPI_MASTER, 0) /* SPI MASTER:PD1/3/4 */
diff --git a/board/rowan/led.c b/board/rowan/led.c
new file mode 100644
index 0000000000..117f20b730
--- /dev/null
+++ b/board/rowan/led.c
@@ -0,0 +1,199 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery LED and Power LED control for Rowan Board.
+ */
+
+#include "battery.h"
+#include "charge_state.h"
+#include "chipset.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "led_common.h"
+#include "util.h"
+#include "system.h"
+
+#define CRITICAL_LOW_BATTERY_PERMILLAGE 71
+#define LOW_BATTERY_PERMILLAGE 137
+#define FULL_BATTERY_PERMILLAGE 937
+
+const enum ec_led_id supported_led_ids[] = {
+	EC_LED_ID_BATTERY_LED,
+	EC_LED_ID_POWER_LED
+};
+
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+enum led_color {
+	BAT_LED_BLUE = 0,
+	BAT_LED_ORANGE,
+	PWR_LED_BLUE,
+	PWR_LED_ORANGE,
+	LED_COLOR_COUNT		/* Number of colors, not a color itself */
+};
+
+static int bat_led_set(enum led_color color, int on)
+{
+	switch (color) {
+	case BAT_LED_BLUE:
+		gpio_set_level(GPIO_BAT_LED0, on); /* BAT_LED_BLUE */
+		break;
+	case BAT_LED_ORANGE:
+		gpio_set_level(GPIO_BAT_LED1, on); /* BAT_LED_ORANGE */
+		break;
+	case PWR_LED_BLUE:
+		gpio_set_level(GPIO_PWR_LED0, on); /* PWR_LED_BLUE */
+		break;
+	case PWR_LED_ORANGE:
+		gpio_set_level(GPIO_PWR_LED1, on); /* PWR_LED_ORANGE */
+		break;
+	default:
+		return EC_ERROR_UNKNOWN;
+	}
+	return EC_SUCCESS;
+}
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+	/* Ignoring led_id as both leds support the same colors */
+	brightness_range[EC_LED_COLOR_BLUE] = 1;
+	brightness_range[EC_LED_COLOR_AMBER] = 1;
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+	if (EC_LED_ID_BATTERY_LED == led_id) {
+		if (brightness[EC_LED_COLOR_BLUE] != 0) {
+			bat_led_set(BAT_LED_BLUE, 1);
+			bat_led_set(BAT_LED_ORANGE, 0);
+		} else if (brightness[EC_LED_COLOR_AMBER] != 0) {
+			bat_led_set(BAT_LED_BLUE, 0);
+			bat_led_set(BAT_LED_ORANGE, 1);
+		} else {
+			bat_led_set(BAT_LED_BLUE, 0);
+			bat_led_set(BAT_LED_ORANGE, 0);
+		}
+		return EC_SUCCESS;
+	} else if (EC_LED_ID_POWER_LED == led_id) {
+		if (brightness[EC_LED_COLOR_BLUE] != 0) {
+			bat_led_set(PWR_LED_BLUE, 1);
+			bat_led_set(PWR_LED_ORANGE, 0);
+		} else if (brightness[EC_LED_COLOR_AMBER] != 0) {
+			bat_led_set(PWR_LED_BLUE, 0);
+			bat_led_set(PWR_LED_ORANGE, 1);
+		} else {
+			bat_led_set(PWR_LED_BLUE, 0);
+			bat_led_set(PWR_LED_ORANGE, 0);
+		}
+		return EC_SUCCESS;
+	} else {
+		return EC_ERROR_UNKNOWN;
+	}
+}
+
+static unsigned blink_second;
+
+static void rowan_led_set_power(void)
+{
+	/*
+	 * PWR LED behavior:
+	 * Power on: Blue ON
+	 * Suspend: Orange in breeze mode ( 1 sec on/ 3 sec off)
+	 * Power off: OFF
+	 */
+	if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
+		bat_led_set(PWR_LED_BLUE, 0);
+		bat_led_set(PWR_LED_ORANGE, 0);
+	} else if (chipset_in_state(CHIPSET_STATE_ON)) {
+		bat_led_set(PWR_LED_BLUE, 1);
+		bat_led_set(PWR_LED_ORANGE, 0);
+	} else if (chipset_in_state(CHIPSET_STATE_SUSPEND)) {
+		bat_led_set(PWR_LED_BLUE, 0);
+		bat_led_set(PWR_LED_ORANGE,
+			    (blink_second & 3) ? 0 : 1);
+	}
+}
+
+static void rowan_led_set_battery(void)
+{
+	/*
+	 * BAT LED behavior:
+	 * - Fully charged / normal idle: Blue ON
+	 * - Charging: Orange ON
+	 * - Battery discharging capacity<10%, Orange blink(1:3)
+	 *				 < 3%, Orange blink(1:1)
+	 * - Battery error: Orange blink(1:1)
+	 * - Factory force idle: Blue 2 sec, Orange 2 sec
+	 */
+	uint32_t charge_flags = charge_get_flags();
+	int remaining_capacity;
+	int full_charge_capacity;
+	int permillage;
+
+	/* Make the percentage approximate to UI shown */
+	remaining_capacity = *(int *)host_get_memmap(EC_MEMMAP_BATT_CAP);
+	full_charge_capacity = *(int *)host_get_memmap(EC_MEMMAP_BATT_LFCC);
+	permillage = !full_charge_capacity ? 0 :
+		(1000 * remaining_capacity) / full_charge_capacity;
+
+	switch (charge_get_state()) {
+	case PWR_STATE_CHARGE:
+		if (permillage < FULL_BATTERY_PERMILLAGE) {
+			bat_led_set(BAT_LED_BLUE, 0);
+			bat_led_set(BAT_LED_ORANGE, 1);
+		} else {
+			bat_led_set(BAT_LED_BLUE, 1);
+			bat_led_set(BAT_LED_ORANGE, 0);
+		}
+		break;
+	case PWR_STATE_CHARGE_NEAR_FULL:
+		bat_led_set(BAT_LED_BLUE, 1);
+		bat_led_set(BAT_LED_ORANGE, 0);
+		break;
+	case PWR_STATE_DISCHARGE:
+		bat_led_set(BAT_LED_BLUE, 0);
+		if (!chipset_in_state(CHIPSET_STATE_ANY_OFF) &&
+		    permillage <= CRITICAL_LOW_BATTERY_PERMILLAGE)
+			bat_led_set(BAT_LED_ORANGE,
+				    (blink_second & 1) ? 0 : 1);
+		else if (!chipset_in_state(CHIPSET_STATE_ANY_OFF) &&
+			 permillage <= LOW_BATTERY_PERMILLAGE)
+			bat_led_set(BAT_LED_ORANGE,
+				    (blink_second & 3) ? 0 : 1);
+		else
+			bat_led_set(BAT_LED_ORANGE, 0);
+		break;
+	case PWR_STATE_ERROR:
+		bat_led_set(BAT_LED_BLUE, 0);
+		bat_led_set(BAT_LED_ORANGE, (blink_second & 1) ? 0 : 1);
+		break;
+	case PWR_STATE_IDLE: /* Ext. power connected in IDLE. */
+		if (charge_flags & CHARGE_FLAG_FORCE_IDLE) {
+			bat_led_set(BAT_LED_BLUE, (blink_second & 2) ? 0 : 1);
+			bat_led_set(BAT_LED_ORANGE, (blink_second & 2) ? 1 : 0);
+		} else {
+			bat_led_set(BAT_LED_BLUE, 1);
+			bat_led_set(BAT_LED_ORANGE, 0);
+		}
+		break;
+	default:
+		/* Other states don't alter LED behavior */
+		break;
+	}
+}
+
+/**
+ * Called by hook task every 1 sec
+ */
+static void led_second(void)
+{
+	blink_second++;
+
+	if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
+		rowan_led_set_power();
+	if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED))
+		rowan_led_set_battery();
+}
+DECLARE_HOOK(HOOK_SECOND, led_second, HOOK_PRIO_DEFAULT);
diff --git a/board/rowan/usb_pd_policy.c b/board/rowan/usb_pd_policy.c
new file mode 100644
index 0000000000..b03d52e71e
--- /dev/null
+++ b/board/rowan/usb_pd_policy.c
@@ -0,0 +1,395 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "atomic.h"
+#include "charge_manager.h"
+#include "common.h"
+#include "console.h"
+#include "driver/tcpm/anx7688.h"
+#include "driver/tcpm/tcpci.h"
+#include "driver/tcpm/tcpm.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "registers.h"
+#include "system.h"
+#include "task.h"
+#include "timer.h"
+#include "util.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+			 PDO_FIXED_COMM_CAP)
+
+/* TODO: fill in correct source and sink capabilities */
+const uint32_t pd_src_pdo[] = {
+		PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+
+const uint32_t pd_snk_pdo[] = {
+		PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+		PDO_BATT(4750, 21000, 15000),
+		PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_is_valid_input_voltage(int mv)
+{
+	return 1;
+}
+
+void pd_transition_voltage(int idx)
+{
+	/* No-operation: we are always 5V */
+}
+
+int pd_set_power_supply_ready(int port)
+{
+	/* Disable charging */
+	gpio_set_level(GPIO_USB_C0_CHARGE_L, 1);
+	/* Provide VBUS */
+	gpio_set_level(GPIO_USB_C0_5V_EN, 1);
+
+	anx7688_set_power_supply_ready(port);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS;
+}
+
+void pd_power_supply_reset(int port)
+{
+	/* Disable VBUS */
+	gpio_set_level(GPIO_USB_C0_5V_EN, 0);
+
+	anx7688_power_supply_reset(port);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+void pd_set_input_current_limit(int port, uint32_t max_ma,
+				uint32_t supply_voltage)
+{
+	struct charge_port_info charge;
+
+	charge.current = max_ma;
+	charge.voltage = supply_voltage;
+	charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge);
+}
+
+void typec_set_input_current_limit(int port, uint32_t max_ma,
+				   uint32_t supply_voltage)
+{
+	struct charge_port_info charge;
+
+	charge.current = max_ma;
+	charge.voltage = supply_voltage;
+	charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge);
+}
+
+int pd_board_checks(void)
+{
+	return EC_SUCCESS;
+}
+
+int pd_check_power_swap(int port)
+{
+	/*
+	 * Allow power swap as long as we are acting as a dual role device,
+	 * otherwise assume our role is fixed (not in S0 or console command
+	 * to fix our role).
+	 */
+	return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+	/* Allow data swap if we are a UFP, otherwise don't allow */
+	return (data_role == PD_ROLE_UFP) ? 1 : 0;
+}
+
+int pd_check_vconn_swap(int port)
+{
+	/* in G3, do not allow vconn swap since 5V power source is off */
+	return gpio_get_level(GPIO_5V_POWER_GOOD);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+	/* Do nothing */
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+	/*
+	 * If partner is dual-role power and dualrole toggling is on, consider
+	 * if a power swap is necessary.
+	 */
+	if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+	    pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
+		/*
+		 * If we are a sink and partner is not externally powered, then
+		 * swap to become a source. If we are source and partner is
+		 * externally powered, swap to become a sink.
+		 */
+		int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+		if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+		    (partner_extpower && pr_role == PD_ROLE_SOURCE))
+			pd_request_power_swap(port);
+	}
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+	/* If UFP, try to switch to DFP */
+	if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP)
+		pd_request_data_swap(port);
+}
+
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+	.identity = NULL,
+	.svids = NULL,
+	.modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+		  uint32_t **rpayload)
+{
+	int cmd = PD_VDO_CMD(payload[0]);
+	uint16_t dev_id = 0;
+	int is_rw, is_latest;
+
+	/* make sure we have some payload */
+	if (cnt == 0)
+		return 0;
+
+	switch (cmd) {
+	case VDO_CMD_VERSION:
+		/* guarantee last byte of payload is null character */
+		*(payload + cnt - 1) = 0;
+		CPRINTF("version: %s\n", (char *)(payload+1));
+		break;
+	case VDO_CMD_READ_INFO:
+	case VDO_CMD_SEND_INFO:
+		/* copy hash */
+		if (cnt == 7) {
+			dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+			is_rw = VDO_INFO_IS_RW(payload[6]);
+
+			is_latest = pd_dev_store_rw_hash(port,
+							 dev_id,
+							 payload + 1,
+							 is_rw ?
+							 SYSTEM_IMAGE_RW :
+							 SYSTEM_IMAGE_RO);
+
+			/*
+			 * Send update host event unless our RW hash is
+			 * already known to be the latest update RW.
+			 */
+			if (!is_rw || !is_latest)
+				pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+			CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+				HW_DEV_ID_MAJ(dev_id),
+				HW_DEV_ID_MIN(dev_id),
+				VDO_INFO_SW_DBG_VER(payload[6]),
+				is_rw);
+		} else if (cnt == 6) {
+			/* really old devices don't have last byte */
+			pd_dev_store_rw_hash(port, dev_id, payload + 1,
+					     SYSTEM_IMAGE_UNKNOWN);
+		}
+		break;
+	case VDO_CMD_CURRENT:
+		CPRINTF("Current: %dmA\n", payload[1]);
+		break;
+	case VDO_CMD_FLIP:
+		usb_mux_flip(port);
+		break;
+#ifdef CONFIG_USB_PD_LOGGING
+	case VDO_CMD_GET_LOG:
+		pd_log_recv_vdm(port, cnt, payload);
+		break;
+#endif /* CONFIG_USB_PD_LOGGING */
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
+/* DP Status VDM as returned by UFP */
+static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+	const char *dp_str, *usb_str;
+	enum typec_mux typec_mux_setting;
+
+	/* make DP interface safe until configure */
+	dp_flags[port] = 0;
+	dp_status[port] = 0;
+
+	/*
+	 * Check current status, due to the mux may be switched to SS
+	 * and SS device was attached before (for example: Type-C dock).
+	 * To avoid broken the SS connection,
+	 * keep the current setting if SS connection is enabled already.
+	 */
+	typec_mux_setting = (usb_mux_get(port, &dp_str, &usb_str) && usb_str) ?
+			    TYPEC_MUX_USB : TYPEC_MUX_NONE;
+	usb_mux_set(port, typec_mux_setting,
+		    USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+	/* Only enter mode if device is DFP_D capable */
+	if (mode_caps & MODE_DP_SNK) {
+		svdm_safe_dp_mode(port);
+		return 0;
+	}
+
+	return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_STATUS | VDO_OPOS(opos));
+	payload[1] = VDO_DP_STATUS(0, /* HPD IRQ  ... not applicable */
+				   0, /* HPD level ... not applicable */
+				   0, /* exit DP? ... no */
+				   0, /* usb mode? ... no */
+				   0, /* multi-function ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+				   0, /* power low? ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+	return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+	int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
+	int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+	if (!pin_mode)
+		return 0;
+
+	usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
+		    USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_CONFIG | VDO_OPOS(opos));
+	payload[1] = VDO_DP_CFG(pin_mode,      /* pin mode */
+				1,             /* DPv1.3 signaling */
+				2);            /* UFP connected */
+	return 2;
+};
+
+static void svdm_dp_post_config(int port)
+{
+	dp_flags[port] |= DP_FLAGS_DP_ON;
+	if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
+		return;
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+	int cur_lvl;
+	int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+	int ack = 1;
+
+	anx7688_update_hpd(port, lvl, irq);
+
+	dp_status[port] = payload[1];
+	cur_lvl = gpio_get_level(GPIO_USB_DP_HPD);
+
+	/* Its initial DP status message prior to config */
+	if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
+		if (lvl)
+			dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
+		return ack;
+	}
+
+	if (!(irq & cur_lvl) && irq & !cur_lvl) {
+		CPRINTF("ERR:HPD:IRQ&LOW\n");
+		ack = 0; /* nak */
+	}
+	/* ack */
+	return ack;
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+	svdm_safe_dp_mode(port);
+	anx7688_hpd_disable(port);
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+	/* Always enter GFU mode */
+	return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+	/*
+	 * This is called after enter mode is successful, send unstructured
+	 * VDM to read info.
+	 */
+	pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+	return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+	{
+		.svid = USB_SID_DISPLAYPORT,
+		.enter = &svdm_enter_dp_mode,
+		.status = &svdm_dp_status,
+		.config = &svdm_dp_config,
+		.post_config = &svdm_dp_post_config,
+		.attention = &svdm_dp_attention,
+		.exit = &svdm_exit_dp_mode,
+	},
+	{
+		.svid = USB_VID_GOOGLE,
+		.enter = &svdm_enter_gfu_mode,
+		.status = &svdm_gfu_status,
+		.config = &svdm_gfu_config,
+		.attention = &svdm_gfu_attention,
+		.exit = &svdm_exit_gfu_mode,
+	}
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */