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authorKaka Ni <nigang@huaqin.corp-partner.google.com>2019-01-29 21:00:32 +0800
committerchrome-bot <chrome-bot@chromium.org>2019-02-01 06:20:58 -0800
commite17cd2a21f2b2762597cb6346bd359f784c9b43b (patch)
tree3c3f88e329fbdc683f9efe58b9d546a2b1e79111
parente11ae2cfca63a900e7efff07abc112b57dce4eb2 (diff)
downloadchrome-ec-e17cd2a21f2b2762597cb6346bd359f784c9b43b.tar.gz
flapjack/gpio: Modify GPIO configuration for Board Id 3
Modify GPIO and ADC confiturations for flapjack board_id 3 (P0B & P0C). CQ-DEPEND=CL:1445956 BUG=b:123498558 BRANCH=none TEST=BOOTBLOCK=... make BOARD=flapjack -j flash_ec; and see AP boots. Change-Id: Iac353c1a4ea92bd028003b6c11647965528ac30a Signed-off-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1438957 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r--board/flapjack/board.c5
-rw-r--r--board/flapjack/board.h10
-rw-r--r--board/flapjack/gpio.inc32
3 files changed, 8 insertions, 39 deletions
diff --git a/board/flapjack/board.c b/board/flapjack/board.c
index dd6e3d9337..3c8c334659 100644
--- a/board/flapjack/board.c
+++ b/board/flapjack/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -68,12 +68,9 @@ static void gauge_interrupt(enum gpio_signal signal)
/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
const struct adc_t adc_channels[] = {
[ADC_BOARD_ID] = {"BOARD_ID", 3300, 4096, 0, STM32_AIN(10)},
-#if BOARD_REV >= 2
[ADC_EC_SKU_ID] = {"EC_SKU_ID", 3300, 4096, 0, STM32_AIN(8)},
[ADC_BATT_ID] = {"BATT_ID", 3300, 4096, 0, STM32_AIN(7)},
[ADC_USBC_THERM] = {"USBC_THERM", 3300, 4096, 0, STM32_AIN(14)},
- [ADC_POGO_ADC_INT_L] = {"POGO_ADC_INT_L", 3300, 4096, 0, STM32_AIN(6)},
-#endif
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
diff --git a/board/flapjack/board.h b/board/flapjack/board.h
index c4d099de51..b6ff8556ed 100644
--- a/board/flapjack/board.h
+++ b/board/flapjack/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -9,11 +9,6 @@
#define __CROS_EC_BOARD_H
/* board revision */
-#define BOARD_REV 1
-
-#if BOARD_REV < 1 || BOARD_REV > 2
-#error "Board revision out of range"
-#endif
/* Optional modules */
#define CONFIG_ADC
@@ -202,12 +197,9 @@
enum adc_channel {
/* Real ADC channels begin here */
ADC_BOARD_ID = 0,
-#if BOARD_REV >= 2
ADC_EC_SKU_ID,
ADC_BATT_ID,
- ADC_POGO_ADC_INT_L,
ADC_USBC_THERM,
-#endif
ADC_CH_COUNT
};
diff --git a/board/flapjack/gpio.inc b/board/flapjack/gpio.inc
index b252e9d90d..4846e0c44c 100644
--- a/board/flapjack/gpio.inc
+++ b/board/flapjack/gpio.inc
@@ -45,19 +45,9 @@ GPIO_INT(GAUGE_INT_ODL, PIN(C, 9), GPIO_INT_FALLING | GPIO_PULL_UP,
gauge_interrupt)
/* Interrupts not implemented yet */
-#if BOARD_REV < 2
-GPIO(ALS_INT_ODL, PIN(A, 6), GPIO_INPUT)
-#elif BOARD_REV >= 2
-/* TODO(b:122993147): It's also an analog input. */
-GPIO(POGO_ADC_INT_L, PIN(A, 6), GPIO_INPUT)
-#endif
+GPIO(P9221_INT_ODL, PIN(A, 6), GPIO_INPUT)
/* Voltage rails control pins */
-#if BOARD_REV < 2
-GPIO(PP3300_S0_EN, PIN(B, 6), GPIO_OUT_LOW)
-GPIO(PP1800_S3_EN, PIN(C, 7), GPIO_OUT_LOW)
-GPIO(PP3300_S3_EN, PIN(D, 2), GPIO_OUT_LOW)
-#endif
/* Reset pins */
GPIO(AP_SYS_RST_L, PIN(C, 11), GPIO_OUT_LOW)
@@ -78,18 +68,13 @@ GPIO(I2C2_SDA, PIN(A, 12), GPIO_INPUT)
/* Analog pins */
GPIO(BATT_ID, PIN(A, 7), GPIO_ANALOG)
GPIO(BOARD_ID, PIN(C, 0), GPIO_ANALOG)
-#if BOARD_REV >= 2
GPIO(EC_SKU_ID, PIN(B, 0), GPIO_ANALOG)
GPIO(USBC_THERM, PIN(C, 4), GPIO_ANALOG)
-#endif
/* Other input pins */
GPIO(WP_L, PIN(C, 8), GPIO_INPUT) /* EC_FLASH_WP_ODL */
GPIO(BOOT0, PIN(F, 11), GPIO_INPUT)
GPIO(CCD_MODE_ODL, PIN(A, 1), GPIO_INPUT)
-#if BOARD_REV >= 2
-GPIO(POGO_VBUS_PRESENT, PIN(A, 14), GPIO_INPUT)
-#endif
/* Other output pins */
GPIO(ENTERING_RW, PIN(C, 6), GPIO_ODR_HIGH) /* EC_ENTERING_RW_ODL */
@@ -99,16 +84,11 @@ GPIO(USB_C0_DP_POLARITY, PIN(C, 14), GPIO_OUT_LOW)
GPIO(USB_C0_HPD_OD, PIN(F, 1), GPIO_ODR_LOW)
GPIO(BOOTBLOCK_EN_L, PIN(C, 1), GPIO_ODR_HIGH)
GPIO(USB_C0_DP_OE_L, PIN(A, 5), GPIO_OUT_HIGH)
-#if BOARD_REV < 2
-GPIO(USB_C0_DISCHARGE, PIN(B, 0), GPIO_OUT_LOW)
-GPIO(BOOTBLOCK_MUX_OE, PIN(C, 4), GPIO_ODR_HIGH)
-GPIO(USB_ID, PIN(A, 13), GPIO_ODR_HIGH)
-#elif BOARD_REV >= 2
-GPIO(EN_PP3300_POGO, PIN(A, 13), GPIO_OUT_LOW)
-GPIO(EN_POGO_CHARGE_L, PIN(B, 6), GPIO_OUT_LOW)
-GPIO(EN_USBC_CHARGE_L, PIN(C, 7), GPIO_OUT_LOW)
-GPIO(EN_PP5000_USBC, PIN(D, 2), GPIO_OUT_LOW)
-#endif
+GPIO(EC_SWDIO, PIN(A, 13), GPIO_ODR_HIGH)
+GPIO(EC_SWCLK, PIN(A, 14), GPIO_ODR_HIGH)
+GPIO(EN_PP5000_USBC, PIN(D, 2), GPIO_OUT_LOW)
+GPIO(BPP_EPP_SEL, PIN(B, 6), GPIO_OUT_LOW)
+GPIO(NCP3902_EN_L, PIN(C, 7), GPIO_OUT_LOW)
/* USART1: PA9/PA10 */