TCPMv1: Don't turn off pd module clock if rx enabled

  Plug in type-c adapter in G3 power state. Because the
SLEEP_MASK_USB_PD won't be set before we receive the SRC_Cap
from SRC in SNK_Discovery state, but at waiting SRC_Cap this
period time we will enter deep sleep mode and turns pd module
clock off. This will cause TCPC miss the SRC_Cap message from
SRC, then our PD_T_SINK_WAIT_CAP timer timeout and tx hard reset.

  So I add a configuration: SLEEP_MASK_USB_PD is set only by
it83xx driver, so that SLEEP_MASK_USB_PD value won't be overwritten
by set_state() function in usb_pd_prtocol.c. If one of the port TCPC
Rx is enabled, chip will not go to deep sleep, but chip can go to doze
mode that pd module clock won't be turned off only mcu core clock off.
if all ports are nothing plug-in, the chip can go to deep sleep.

BUG=none
BRANCH=none
TEST=TCPC doesn't miss any message from partner:
     -in SNK_DISCOVERY and power G3 state on board ampton.
     -in SRC_DISCOVERY and power S0 state on board it8xxx2_evb.

Change-Id: I9639523e2ca180809f0f74f24321d06e7b3a04c2
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1990935
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>

4 files changed, 34 insertions, 5 deletions

diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c
index 28827d11eb..00acf8864e 100644
--- a/chip/it83xx/clock.c
+++ b/chip/it83xx/clock.c
@@ -407,13 +407,22 @@ static void clock_htimer_enable(void)
 
 static int clock_allow_low_power_idle(void)
 {
+	/*
+	 * Avoiding using low frequency clock run the same count as awaken in
+	 * sleep mode, so don't go to sleep mode before timer reload count.
+	 */
 	if (!(IT83XX_ETWD_ETXCTRL(EVENT_EXT_TIMER) & BIT(0)))
 		return 0;
 
+	/* If timer interrupt status is set, don't go to sleep mode. */
 	if (*et_ctrl_regs[EVENT_EXT_TIMER].isr &
 		et_ctrl_regs[EVENT_EXT_TIMER].mask)
 		return 0;
 
+	/*
+	 * If timer is less than 250us to expire, then we don't go to sleep
+	 * mode.
+	 */
 #ifdef IT83XX_EXT_OBSERVATION_REG_READ_TWO_TIMES
 	if (EVENT_TIMER_COUNT_TO_US(ext_observation_reg_read(EVENT_EXT_TIMER)) <
 #else
@@ -422,11 +431,17 @@ static int clock_allow_low_power_idle(void)
 		SLEEP_SET_HTIMER_DELAY_USEC)
 		return 0;
 
+	/*
+	 * We calculate 32bit free clock overflow counts for 64bit value,
+	 * if clock almost reach overflow, we don't go to sleep mode for
+	 * avoiding miss overflow count.
+	 */
 	sleep_mode_t0 = get_time();
 	if ((sleep_mode_t0.le.lo > (0xffffffff - SLEEP_FTIMER_SKIP_USEC)) ||
 		(sleep_mode_t0.le.lo < SLEEP_FTIMER_SKIP_USEC))
 		return 0;
 
+	/* If we are waked up by console, then keep awake at least 5s. */
 	if (sleep_mode_t0.val < console_expire_time.val)
 		return 0;
 
diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c
index a592ffaec3..39154f3fe0 100644
--- a/common/usb_pd_protocol.c
+++ b/common/usb_pd_protocol.c
@@ -730,7 +730,7 @@ static inline int is_try_src(int port)
 static inline void set_state(int port, enum pd_states next_state)
 {
 	enum pd_states last_state = pd[port].task_state;
-#ifdef CONFIG_LOW_POWER_IDLE
+#if defined(CONFIG_LOW_POWER_IDLE) && !defined(CONFIG_USB_PD_TCPC_ON_CHIP)
 	int i;
 #endif
 	int not_auto_toggling = 1;
@@ -897,7 +897,7 @@ static inline void set_state(int port, enum pd_states next_state)
 	}
 #endif
 
-#ifdef CONFIG_LOW_POWER_IDLE
+#if defined(CONFIG_LOW_POWER_IDLE) && !defined(CONFIG_USB_PD_TCPC_ON_CHIP)
 	/* If a PD device is attached then disable deep sleep */
 	for (i = 0; i < board_get_usb_pd_port_count(); i++) {
 		if (pd_capable(i))
diff --git a/driver/tcpm/it83xx.c b/driver/tcpm/it83xx.c
index 3cad1ef4a7..22a0b0075d 100644
--- a/driver/tcpm/it83xx.c
+++ b/driver/tcpm/it83xx.c
@@ -571,10 +571,11 @@ static int it83xx_tcpm_set_rx_enable(int port, int enable)
 		USBPD_DISABLE_BMC_PHY(port);
 	}
 
-	/* If any PD port is connected, then disable deep sleep */
-	for (i = 0; i < board_get_usb_pd_port_count(); ++i)
-		if (IT83XX_USBPD_GCR(i) | USBPD_REG_MASK_BMC_PHY)
+	/* If any PD port Rx is enabled, then disable deep sleep */
+	for (i = 0; i < board_get_usb_pd_port_count(); ++i) {
+		if (IT83XX_USBPD_GCR(i) & USBPD_REG_MASK_BMC_PHY)
 			break;
+	}
 
 	if (i == board_get_usb_pd_port_count())
 		enable_sleep(SLEEP_MASK_USB_PD);
diff --git a/include/config.h b/include/config.h
index 0d578451cb..3fdc8de174 100644
--- a/include/config.h
+++ b/include/config.h
@@ -3846,6 +3846,9 @@
 /* Enable TCPC to enter low power mode */
 #undef CONFIG_USB_PD_TCPC_LOW_POWER
 
+/* Define EC and TCPC modules are in one integrated chip */
+#undef CONFIG_USB_PD_TCPC_ON_CHIP
+
 /* Enable the encoding of msg SOP* in bits 31-28 of 32-bit msg header type */
 #undef CONFIG_USB_PD_DECODE_SOP
 
@@ -4777,6 +4780,16 @@
 
 /*****************************************************************************/
 /*
+ * Define CONFIG_USB_PD_TCPC_ON_CHIP if we use ITE83XX series TCPM driver
+ * on the board.
+ */
+#if defined(CONFIG_USB_PD_TCPM_ITE83XX) ||  \
+	defined(CONFIG_USB_PD_TCPM_ITE8XXX2)
+#define CONFIG_USB_PD_TCPC_ON_CHIP
+#endif
+
+/*****************************************************************************/
+/*
  * Define CONFIG_CHARGER_NARROW_VDC for chargers that use a Narrow VDC power
  * architecture.
  */