diff options
author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2022-04-15 12:46:00 -0700 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-04-26 18:01:27 +0000 |
commit | fbafae5b529ff829958f40807ebe00aaa072fa66 (patch) | |
tree | c232836408bd44e08164f7bfc9d733835e134f0f | |
parent | 54c00a016b8c679613899898476dc981f079ef7e (diff) | |
download | chrome-ec-fbafae5b529ff829958f40807ebe00aaa072fa66.tar.gz |
zephyr: mtlrvp: Enable IT8801 Keyboard & IOEX
Enabled IT8801 Keyboard & IO Expander on MTLRVP.
Due to the keyboard layout difference between alternate OSes we would
have to add BOM stuffing options on the MTLRVP. To reduce these BOM
BOM stuffings and also support the GPIOs going to H1, IT8801 discrete
keyboard with GPIOs is added as an Add In Card solution on RVP.
BUG=b:230008245
BRANCH=none
TEST=Able to verify Keyboard and GPIOs using
ksstate and gpioget commands
Change-Id: If5cdcd2c60ead15824a33cb15c40386f9ba93545
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3587975
Reviewed-by: RAJESH KUMAR <rajesh3.kumar@intel.com>
Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-by: Yuval Peress <peress@google.com>
-rw-r--r-- | zephyr/projects/intelrvp/BUILD.py | 5 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/ioex.dts | 33 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts | 24 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts | 5 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts | 10 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/prj.conf | 6 | ||||
-rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c | 7 |
7 files changed, 87 insertions, 3 deletions
diff --git a/zephyr/projects/intelrvp/BUILD.py b/zephyr/projects/intelrvp/BUILD.py index 22b61c1638..7f9844c1bf 100644 --- a/zephyr/projects/intelrvp/BUILD.py +++ b/zephyr/projects/intelrvp/BUILD.py @@ -59,11 +59,12 @@ register_intelrvp_project( project_name="mtlrvpp_npcx", chip="npcx9", extra_dts_overlays=[ - here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts", + here / "adlrvp/adlrvp_npcx/cbi_eeprom.dts", here / "mtlrvp/mtlrvpp_npcx/fan.dts", here / "mtlrvp/mtlrvpp_npcx/gpio.dts", here / "mtlrvp/mtlrvpp_npcx/interrupts.dts", - here / "adlrvp/adlrvp_npcx/cbi_eeprom.dts", + here / "mtlrvp/ioex.dts", + here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts", here / "adlrvp/adlrvp_npcx/temp_sensor.dts", ], extra_kconfig_files=[here / "mtlrvp/mtlrvpp_npcx/prj.conf"], diff --git a/zephyr/projects/intelrvp/mtlrvp/ioex.dts b/zephyr/projects/intelrvp/mtlrvp/ioex.dts new file mode 100644 index 0000000000..bf79b12570 --- /dev/null +++ b/zephyr/projects/intelrvp/mtlrvp/ioex.dts @@ -0,0 +1,33 @@ +/* Copyright 2022 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* IOEX_KBD_GPIO IT8801 */ + ioex-kbd-gpio { + compatible = "cros,ioex-chip"; + i2c-port = <&battery>; + i2c-addr = <0x39>; + drv = "it8801_ioexpander_drv"; + flags = <0x00>; + #address-cells = <1>; + #size-cells = <0>; + + ioex_it8801_port0: it8801_port@0 { + compatible = "cros,ioex-port"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + + ioex_it8801_port1: it8801_port@1 { + compatible = "cros,ioex-port"; + reg = <1>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + }; +}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts index ec9a0d83ac..cc2e5f674f 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts @@ -13,6 +13,7 @@ ioex_kbd_intr_n: ioex-kbd-intr-n { gpios = <&gpio0 0 GPIO_INPUT>; + enum-name = "GPIO_KB_DISCRETE_INT"; }; all_sys_pwrgd: all-sys-pwrgd { gpios = <&gpio7 0 GPIO_INPUT>; @@ -258,6 +259,29 @@ tp-gpiof4 { gpios = <&gpiof 4 GPIO_INPUT>; }; + + /* KBD IOEX configuration */ + srtc-rst { + gpios = <&ioex_it8801_port0 3 GPIO_OUTPUT_LOW>; + }; + ec-h1-packet-mode { + gpios = <&ioex_it8801_port0 4 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + rtc-rst { + gpios = <&ioex_it8801_port0 6 GPIO_OUTPUT_LOW>; + }; + ec-entering-rw { + gpios = <&ioex_it8801_port0 7 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + }; + ioex-sys-rst-odl-ec { + gpios = <&ioex_it8801_port1 0 GPIO_INPUT>; + }; + ioex-slate-mode-indication { + gpios = <&ioex_it8801_port1 2 GPIO_INPUT>; + }; + /* USB C IOEX configuration */ usb-c0-hbr-ls-en { gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts index e9e5587343..234acb3447 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts @@ -36,5 +36,10 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "power_signal_interrupt"; }; + int_ioex_kbd_intr_n: ioex_kbd_intr_n { + irq-pin = <&ioex_kbd_intr_n>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "io_expander_it8801_interrupt"; + }; }; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts index 9c271c9509..bda90274ef 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts @@ -28,6 +28,10 @@ i2c-port = <&i2c7_0>; enum-name = "I2C_PORT_EEPROM"; }; + keyboard { + i2c-port = <&i2c7_0>; + enum-name = "I2C_PORT_KB_DISCRETE"; + }; typec_aic1: typec-aic1{ i2c-port = <&i2c0_0>; enum-name = "I2C_PORT_TYPEC_AIC_1"; @@ -98,6 +102,12 @@ board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; }; + + kb_discrete: ite-it8801@39 { + compatible = "ite,it8801"; + reg = <0x39>; + label = "KEYBOARD_DISCRETE"; + }; }; &i2c_ctrl7 { diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf index 54a81a9f58..507665e6f1 100644 --- a/zephyr/projects/intelrvp/mtlrvp/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/prj.conf @@ -27,6 +27,11 @@ CONFIG_PLATFORM_EC_CHARGER=n CONFIG_PLATFORM_EC_IOEX=y CONFIG_GPIO_PCA95XX=y CONFIG_GPIO_NCT38XX=y +CONFIG_PLATFORM_EC_IOEX_IT8801=y + +#Keyboard from I/O expander +CONFIG_PLATFORM_EC_KEYBOARD_DISCRETE=y +CONFIG_CROS_KB_RAW_NPCX=n # Temperature sensors CONFIG_PLATFORM_EC_TEMP_SENSOR=y @@ -38,6 +43,5 @@ CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y # TODO: Enable these in follow on CLs -CONFIG_PLATFORM_EC_KEYBOARD=n CONFIG_PLATFORM_EC_VBOOT_HASH=n CONFIG_PLATFORM_EC_VBOOT_EFS2=n diff --git a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c index a9ffb43da2..0839f453b5 100644 --- a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c +++ b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c @@ -9,12 +9,19 @@ #include "i2c.h" #include "intelrvp.h" #include "intel_rvp_board_id.h" +#include "keyboard_raw.h" #include "power/meteorlake.h" #define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ## args) #define CPRINTS(format, args...) cprints(CC_COMMAND, format, ## args) /******************************************************************************/ +/* KSO mapping for discrete keyboard */ +__override const uint8_t it8801_kso_mapping[] = { + 0, 1, 20, 3, 4, 5, 6, 11, 12, 13, 14, 15, 16, +}; +BUILD_ASSERT(ARRAY_SIZE(it8801_kso_mapping) == KEYBOARD_COLS_MAX); + /* PWROK signal configuration */ /* * On MTLRVP, SYS_PWROK_EC is an output controlled by EC and uses ALL_SYS_PWRGD |