diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 14:54:35 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-28 08:46:51 +0000 |
commit | ff651438fe7356e88eb6613f70b4b1eb6d08cf41 (patch) | |
tree | 16cb18be9a96395d00cd836d781bd919af4fe303 | |
parent | ae2ee606391d8984b87bfb19bcb41221926f2e6e (diff) | |
download | chrome-ec-ff651438fe7356e88eb6613f70b4b1eb6d08cf41.tar.gz |
driver/tcpm/fusb302.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I81cbb9e27e9e2b6c747fd807726010b07be1d820
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730090
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
-rw-r--r-- | driver/tcpm/fusb302.c | 107 |
1 files changed, 50 insertions, 57 deletions
diff --git a/driver/tcpm/fusb302.c b/driver/tcpm/fusb302.c index 8357359012..4c4a035469 100644 --- a/driver/tcpm/fusb302.c +++ b/driver/tcpm/fusb302.c @@ -25,8 +25,8 @@ #error "Unsupported config options of fusb302 PD driver" #endif -#define PACKET_IS_GOOD_CRC(head) (PD_HEADER_TYPE(head) == PD_CTRL_GOOD_CRC && \ - PD_HEADER_CNT(head) == 0) +#define PACKET_IS_GOOD_CRC(head) \ + (PD_HEADER_TYPE(head) == PD_CTRL_GOOD_CRC && PD_HEADER_CNT(head) == 0) static struct fusb302_chip_state { int cc_polarity; @@ -77,7 +77,7 @@ static void fusb302_auto_goodcrc_enable(int port, int enable) { int reg; - tcpc_read(port, TCPC_REG_SWITCHES1, ®); + tcpc_read(port, TCPC_REG_SWITCHES1, ®); if (enable) reg |= TCPC_REG_SWITCHES1_AUTO_GCRC; @@ -158,8 +158,8 @@ static int measure_cc_pin_source(int port, int cc_measure) /* Read status register */ tcpc_read(port, TCPC_REG_STATUS0, ®); - cc_lvl = (reg & TCPC_REG_STATUS0_COMP) ? TYPEC_CC_VOLT_RD - : TYPEC_CC_VOLT_RA; + cc_lvl = (reg & TCPC_REG_STATUS0_COMP) ? TYPEC_CC_VOLT_RD : + TYPEC_CC_VOLT_RA; } /* Restore SWITCHES0 register to its value prior */ @@ -172,8 +172,8 @@ static int measure_cc_pin_source(int port, int cc_measure) /* Determine cc pin state for source when in manual detect mode */ static void detect_cc_pin_source_manual(int port, - enum tcpc_cc_voltage_status *cc1_lvl, - enum tcpc_cc_voltage_status *cc2_lvl) + enum tcpc_cc_voltage_status *cc1_lvl, + enum tcpc_cc_voltage_status *cc2_lvl) { int cc1_measure = TCPC_REG_SWITCHES0_MEAS_CC1; int cc2_measure = TCPC_REG_SWITCHES0_MEAS_CC2; @@ -189,12 +189,11 @@ static void detect_cc_pin_source_manual(int port, *cc1_lvl = measure_cc_pin_source(port, cc1_measure); *cc2_lvl = measure_cc_pin_source(port, cc2_measure); } - } /* Determine cc pin state for sink */ static void detect_cc_pin_sink(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2) + enum tcpc_cc_voltage_status *cc2) { int reg; int orig_meas_cc1; @@ -220,7 +219,6 @@ static void detect_cc_pin_sink(int port, enum tcpc_cc_voltage_status *cc1, else orig_meas_cc2 = 0; - /* Disable CC2 measurement switch, enable CC1 measurement switch */ reg &= ~TCPC_REG_SWITCHES0_MEAS_CC2; reg |= TCPC_REG_SWITCHES0_MEAS_CC1; @@ -296,7 +294,7 @@ static int get_num_bytes(uint16_t header) } static int fusb302_send_message(int port, uint16_t header, const uint32_t *data, - uint8_t *buf, int buf_pos) + uint8_t *buf, int buf_pos) { int rv; int reg; @@ -472,7 +470,7 @@ static int fusb302_tcpm_release(int port) } static int fusb302_tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2) + enum tcpc_cc_voltage_status *cc2) { if (state[port].pulling_up) { /* Source mode? */ @@ -504,12 +502,12 @@ static int fusb302_tcpm_set_cc(int port, int pull) TCPC_REG_SWITCHES0_VCONN_CC2); reg |= TCPC_REG_SWITCHES0_CC1_PU_EN | - TCPC_REG_SWITCHES0_CC2_PU_EN; + TCPC_REG_SWITCHES0_CC2_PU_EN; if (state[port].vconn_enabled) reg |= state[port].cc_polarity ? - TCPC_REG_SWITCHES0_VCONN_CC1 : - TCPC_REG_SWITCHES0_VCONN_CC2; + TCPC_REG_SWITCHES0_VCONN_CC1 : + TCPC_REG_SWITCHES0_VCONN_CC2; tcpc_write(port, TCPC_REG_SWITCHES0, reg); @@ -609,7 +607,7 @@ static int fusb302_tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity) } __maybe_unused static int fusb302_tcpm_decode_sop_prime_enable(int port, - bool enable) + bool enable) { int reg; @@ -617,11 +615,9 @@ __maybe_unused static int fusb302_tcpm_decode_sop_prime_enable(int port, return EC_ERROR_UNKNOWN; if (enable) - reg |= (TCPC_REG_CONTROL1_ENSOP1 | - TCPC_REG_CONTROL1_ENSOP2); + reg |= (TCPC_REG_CONTROL1_ENSOP1 | TCPC_REG_CONTROL1_ENSOP2); else - reg &= ~(TCPC_REG_CONTROL1_ENSOP1 | - TCPC_REG_CONTROL1_ENSOP2); + reg &= ~(TCPC_REG_CONTROL1_ENSOP1 | TCPC_REG_CONTROL1_ENSOP2); return tcpc_write(port, TCPC_REG_CONTROL1, reg); } @@ -648,12 +644,11 @@ static int fusb302_tcpm_set_vconn(int port, int enable) if (IS_ENABLED(CONFIG_USB_PD_DECODE_SOP)) { if (state[port].rx_enable) { if (fusb302_tcpm_decode_sop_prime_enable(port, - true)) + true)) return EC_ERROR_UNKNOWN; } } } else { - tcpc_read(port, TCPC_REG_SWITCHES0, ®); /* clear VCONN switch bits */ @@ -665,7 +660,7 @@ static int fusb302_tcpm_set_vconn(int port, int enable) if (IS_ENABLED(CONFIG_USB_PD_DECODE_SOP)) { if (state[port].rx_enable) { if (fusb302_tcpm_decode_sop_prime_enable(port, - false)) + false)) return EC_ERROR_UNKNOWN; } } @@ -731,7 +726,6 @@ static int fusb302_tcpm_set_rx_enable(int port, int enable) /* flush rx fifo in case messages have been coming our way */ fusb302_flush_rx_fifo(port); - } else { tcpc_write(port, TCPC_REG_SWITCHES0, reg); @@ -814,7 +808,8 @@ static int fusb302_tcpm_get_message_raw(int port, uint32_t *payload, int *head) * No START, but do issue a STOP at the end. * add 4 to len to read CRC out */ - rv |= tcpc_xfer_unlocked(port, 0, 0, buf, len+4, I2C_XFER_STOP); + rv |= tcpc_xfer_unlocked(port, 0, 0, buf, len + 4, + I2C_XFER_STOP); tcpc_lock(port, 0); } while (!rv && PACKET_IS_GOOD_CRC(*head) && @@ -988,9 +983,8 @@ void fusb302_tcpc_alert(int port) if (interrupt & TCPC_REG_INTERRUPT_VBUSOK) { /* VBUS crossed threshold */ #ifdef CONFIG_USB_CHARGER - usb_charger_vbus_change(port, - fusb302_tcpm_check_vbus_level(port, - VBUS_PRESENT)); + usb_charger_vbus_change(port, fusb302_tcpm_check_vbus_level( + port, VBUS_PRESENT)); #else if (!fusb302_tcpm_check_vbus_level(port, VBUS_PRESENT)) pd_vbus_low(port); @@ -1040,7 +1034,6 @@ void fusb302_tcpc_alert(int port) fusb302_flush_rx_fifo(port); } } - } /* For BIST receiving */ @@ -1064,16 +1057,16 @@ static int fusb302_set_toggle_mode(int port, int mode) int reg, rv; rv = i2c_read8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - TCPC_REG_CONTROL2, ®); + tcpc_config[port].i2c_info.addr_flags, TCPC_REG_CONTROL2, + ®); if (rv) return rv; reg &= ~TCPC_REG_CONTROL2_MODE_MASK; reg |= mode << TCPC_REG_CONTROL2_MODE_POS; return i2c_write8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - TCPC_REG_CONTROL2, reg); + tcpc_config[port].i2c_info.addr_flags, + TCPC_REG_CONTROL2, reg); } static int fusb302_tcpm_enter_low_power_mode(int port) @@ -1087,8 +1080,8 @@ static int fusb302_tcpm_enter_low_power_mode(int port) * - start toggling */ rv = i2c_write8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - TCPC_REG_POWER, TCPC_REG_POWER_PWR_LOW); + tcpc_config[port].i2c_info.addr_flags, TCPC_REG_POWER, + TCPC_REG_POWER_PWR_LOW); if (rv) return rv; @@ -1101,8 +1094,8 @@ static int fusb302_tcpm_enter_low_power_mode(int port) break; case PD_DRP_FREEZE: mode = pd_get_power_role(port) == PD_ROLE_SINK ? - TCPC_REG_CONTROL2_MODE_UFP : - TCPC_REG_CONTROL2_MODE_DFP; + TCPC_REG_CONTROL2_MODE_UFP : + TCPC_REG_CONTROL2_MODE_DFP; break; case PD_DRP_FORCE_SINK: mode = TCPC_REG_CONTROL2_MODE_UFP; @@ -1118,14 +1111,14 @@ static int fusb302_tcpm_enter_low_power_mode(int port) usleep(250); rv = i2c_read8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - TCPC_REG_CONTROL2, ®); + tcpc_config[port].i2c_info.addr_flags, TCPC_REG_CONTROL2, + ®); if (rv) return rv; reg |= TCPC_REG_CONTROL2_TOGGLE; return i2c_write8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - TCPC_REG_CONTROL2, reg); + tcpc_config[port].i2c_info.addr_flags, + TCPC_REG_CONTROL2, reg); } #endif @@ -1143,7 +1136,7 @@ static int fusb302_compare_mdac(int port, int mdac) tcpc_read(port, TCPC_REG_MEASURE, &orig_reg); /* set reg_measure bit 0~5 to mdac, and bit6 to 1(measure vbus) */ tcpc_write(port, TCPC_REG_MEASURE, - (mdac & TCPC_REG_MEASURE_MDAC_MASK) | TCPC_REG_MEASURE_VBUS); + (mdac & TCPC_REG_MEASURE_MDAC_MASK) | TCPC_REG_MEASURE_VBUS); /* Wait on measurement */ usleep(350); @@ -1181,25 +1174,25 @@ int tcpc_get_vbus_voltage(int port) } const struct tcpm_drv fusb302_tcpm_drv = { - .init = &fusb302_tcpm_init, - .release = &fusb302_tcpm_release, - .get_cc = &fusb302_tcpm_get_cc, + .init = &fusb302_tcpm_init, + .release = &fusb302_tcpm_release, + .get_cc = &fusb302_tcpm_get_cc, #ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC - .check_vbus_level = &fusb302_tcpm_check_vbus_level, + .check_vbus_level = &fusb302_tcpm_check_vbus_level, #endif - .select_rp_value = &fusb302_tcpm_select_rp_value, - .set_cc = &fusb302_tcpm_set_cc, - .set_polarity = &fusb302_tcpm_set_polarity, + .select_rp_value = &fusb302_tcpm_select_rp_value, + .set_cc = &fusb302_tcpm_set_cc, + .set_polarity = &fusb302_tcpm_set_polarity, #ifdef CONFIG_USB_PD_DECODE_SOP - .sop_prime_enable = &fusb302_tcpm_decode_sop_prime_enable, + .sop_prime_enable = &fusb302_tcpm_decode_sop_prime_enable, #endif - .set_vconn = &fusb302_tcpm_set_vconn, - .set_msg_header = &fusb302_tcpm_set_msg_header, - .set_rx_enable = &fusb302_tcpm_set_rx_enable, - .get_message_raw = &fusb302_tcpm_get_message_raw, - .transmit = &fusb302_tcpm_transmit, - .tcpc_alert = &fusb302_tcpc_alert, + .set_vconn = &fusb302_tcpm_set_vconn, + .set_msg_header = &fusb302_tcpm_set_msg_header, + .set_rx_enable = &fusb302_tcpm_set_rx_enable, + .get_message_raw = &fusb302_tcpm_get_message_raw, + .transmit = &fusb302_tcpm_transmit, + .tcpc_alert = &fusb302_tcpc_alert, #ifdef CONFIG_USB_PD_TCPC_LOW_POWER - .enter_low_power_mode = &fusb302_tcpm_enter_low_power_mode, + .enter_low_power_mode = &fusb302_tcpm_enter_low_power_mode, #endif }; |