diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2021-11-04 12:11:58 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-05 04:22:34 +0000 |
commit | 252457d4b21f46889eebad61d4c0a65331919cec (patch) | |
tree | 01856c4d31d710b20e85a74c8d7b5836e35c3b98 /baseboard/cherry | |
parent | 08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff) | |
download | chrome-ec-stabilize-14469.9.B-ish.tar.gz |
ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'baseboard/cherry')
-rw-r--r-- | baseboard/cherry/baseboard.c | 597 | ||||
-rw-r--r-- | baseboard/cherry/baseboard.h | 242 | ||||
-rw-r--r-- | baseboard/cherry/build.mk | 10 | ||||
-rw-r--r-- | baseboard/cherry/usb_pd_policy.c | 260 |
4 files changed, 0 insertions, 1109 deletions
diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c deleted file mode 100644 index daf5e218d2..0000000000 --- a/baseboard/cherry/baseboard.c +++ /dev/null @@ -1,597 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cherry baseboard-specific configuration */ - -#include "adc.h" -#include "button.h" -#include "charge_manager.h" -#include "charger.h" -#include "charge_state.h" -#include "charge_state_v2.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "driver/accelgyro_icm42607.h" -#include "driver/bc12/mt6360.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/charger/isl923x.h" -#include "driver/ppc/rt1718s.h" -#include "driver/ppc/syv682x.h" -#include "driver/retimer/ps8802.h" -#include "driver/tcpm/it83xx_pd.h" -#include "driver/tcpm/rt1718s.h" -#include "driver/temp_sensor/thermistor.h" -#include "driver/usb_mux/anx3443.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power_button.h" -#include "power.h" -#include "pwm_chip.h" -#include "pwm.h" -#include "regulator.h" -#include "spi.h" -#include "switch.h" -#include "tablet_mode.h" -#include "task.h" -#include "temp_sensor.h" -#include "timer.h" -#include "uart.h" -#include "usb_charge.h" -#include "usbc_ppc.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" - -static void bc12_interrupt(enum gpio_signal signal); -static void ppc_interrupt(enum gpio_signal signal); -static void usb_a0_interrupt(enum gpio_signal signal); - -#include "gpio_list.h" - -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) - -/* Wake-up pins for hibernate */ -enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, - GPIO_LID_OPEN, - GPIO_POWER_BUTTON_L, -}; -int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL923X_ADDR_FLAGS, - .drv = &isl923x_drv, - }, -}; - -/* Override default setting, called after charger_chips_init */ -static void baseboard_charger_init(void) -{ - /* b/198707662#comment9 */ - int reg = (4096 / ISL9238_INPUT_VOLTAGE_REF_STEP) - << ISL9238_INPUT_VOLTAGE_REF_SHIFT; - - i2c_write16(I2C_PORT_CHARGER, ISL923X_ADDR_FLAGS, - ISL9238_REG_INPUT_VOLTAGE, reg); -} -DECLARE_HOOK(HOOK_INIT, baseboard_charger_init, HOOK_PRIO_DEFAULT + 2); - -__override void board_hibernate_late(void) -{ - /* - * Turn off PP5000_A. Required for devices without Z-state. - * Don't care for devices with Z-state. - */ - gpio_set_level(GPIO_EN_PP5000_A, 0); - isl9238c_hibernate(CHARGER_SOLO); - gpio_set_level(GPIO_EN_SLP_Z, 1); - - /* should not reach here */ - __builtin_unreachable(); -} - -static void board_tcpc_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_INT_ODL); -} -/* Must be done after I2C */ -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -void rt1718s_tcpc_interrupt(enum gpio_signal signal) -{ - schedule_deferred_pd_interrupt(1); -} - -/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ -const struct adc_t adc_channels[] = { - /* Convert to mV (3000mV/1024). */ - {"VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, - {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, - {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, - /* AMON/BMON gain = 17.97 */ - {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, - CHIP_ADC_CH3}, - {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, - {"TEMP_SENSOR_CHG", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH7}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -const struct temp_sensor_t temp_sensors[] = { - [TEMP_SENSOR_CHARGER] = { - .name = "Charger", - .type = TEMP_SENSOR_TYPE_BOARD, - .read = get_temp_3v3_30k9_47k_4050b, - .idx = ADC_TEMP_SENSOR_CHARGER, - }, -}; - -/* PPC */ -struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .i2c_port = I2C_PORT_PPC0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - .frs_en = GPIO_USB_C0_FRS_EN, - }, - { - .i2c_port = I2C_PORT_PPC1, - .i2c_addr_flags = RT1718S_I2C_ADDR_FLAGS, - .drv = &rt1718s_ppc_drv, - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* BC12 */ -const struct mt6360_config_t mt6360_config = { - .i2c_port = 0, - .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, -}; - -__maybe_unused const struct pi3usb9201_config_t - pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [0] = { - .i2c_port = I2C_PORT_USB0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - } - /* [1]: unused */ -}; - -struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { -#ifdef CONFIG_BC12_DETECT_PI3USB9201 - { .drv = &pi3usb9201_drv }, -#elif defined(CONFIG_BC12_DETECT_MT6360) - { .drv = &mt6360_drv }, -#else -#error must pick one of PI3USB9201 or MT6360 for port 0 -#endif - { .drv = &rt1718s_bc12_drv }, -}; - -static void bc12_interrupt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); -} - -static void ppc_interrupt(enum gpio_signal signal) -{ - syv682x_interrupt(0); -} - -/* PWM */ - -/* - * PWM channels. Must be in the exactly same order as in enum pwm_channel. - * There total three 16 bits clock prescaler registers for all pwm channels, - * so use the same frequency and prescaler register setting is required if - * number of pwm channel greater than three. - */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1] = { - .channel = 0, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4, - }, - [PWM_CH_LED2] = { - .channel = 1, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4, - }, - [PWM_CH_LED3] = { - .channel = 2, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4, - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - .freq_hz = 10000, /* SYV226 supports 10~100kHz */ - .pcfsr_sel = PWM_PRESCALER_C6, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/* Called on AP S3 -> S0 transition */ -static void board_chipset_resume(void) -{ - gpio_set_level(GPIO_EC_BL_EN_OD, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); - -/* Called on AP S0 -> S3 transition */ -static void board_chipset_suspend(void) -{ - gpio_set_level(GPIO_EC_BL_EN_OD, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); - -/* USB-A */ -const int usb_port_enable[] = { - GPIO_EN_PP5000_USB_A0_VBUS_X, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); - -__maybe_unused void usb_a0_interrupt(enum gpio_signal signal) -{ - enum usb_charge_mode mode = gpio_get_level(signal) ? - USB_CHARGE_MODE_ENABLED : USB_CHARGE_MODE_DISABLED; - - for (int i = 0; i < USB_PORT_COUNT; i++) - usb_charge_set_mode(i, mode, USB_ALLOW_SUSPEND_CHARGE); -} - -/* USB Mux */ - -const struct usb_mux usbc0_virtual_mux = { - .usb_port = 0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usbc1_virtual_mux = { - .usb_port = 1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -static int board_ps8802_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - /* Make sure the PS8802 is awake */ - RETURN_ERROR(ps8802_i2c_wake(me)); - - /* USB specific config */ - if (mux_state & USB_PD_MUX_USB_ENABLED) { - /* Boost the USB gain */ - RETURN_ERROR(ps8802_i2c_field_update16(me, - PS8802_REG_PAGE2, - PS8802_REG2_USB_SSEQ_LEVEL, - PS8802_USBEQ_LEVEL_UP_MASK, - PS8802_USBEQ_LEVEL_UP_19DB)); - } - - /* DP specific config */ - if (mux_state & USB_PD_MUX_DP_ENABLED) { - /* Boost the DP gain */ - RETURN_ERROR(ps8802_i2c_field_update8(me, - PS8802_REG_PAGE2, - PS8802_REG2_DPEQ_LEVEL, - PS8802_DPEQ_LEVEL_UP_MASK, - PS8802_DPEQ_LEVEL_UP_19DB)); - } - - return EC_SUCCESS; -} - -static int board_anx3443_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - gpio_set_level(GPIO_USB_C1_DP_IN_HPD, - mux_state & USB_PD_MUX_DP_ENABLED); - return EC_SUCCESS; -} - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX0, - .i2c_addr_flags = PS8802_I2C_ADDR_FLAGS, - .driver = &ps8802_usb_mux_driver, - .next_mux = &usbc0_virtual_mux, - .board_set = &board_ps8802_mux_set, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX1, - .i2c_addr_flags = ANX3443_I2C_ADDR0_FLAGS, - .driver = &anx3443_usb_mux_driver, - .next_mux = &usbc1_virtual_mux, - .board_set = &board_anx3443_mux_set, - }, -}; - -/* - * I2C channels (A, B, and C) are using the same timing registers (00h~07h) - * at default. - * In order to set frequency independently for each channels, - * We use timing registers 09h~0Bh, and the supported frequency will be: - * 50KHz, 100KHz, 400KHz, or 1MHz. - * I2C channels (D, E and F) can be set different frequency on different ports. - * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and - * the individual prescale register. - * The frequency of SMBus module is 24MHz on default. - * The allowed range of I2C(D/E/F) frequency is as following setting. - * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) - * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) - * Channel D has multi-function and can be used as UART interface. - * Channel F is reserved for EC debug. - */ - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 1000, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -int board_allow_i2c_passthru(int port) -{ - return (port == I2C_PORT_VIRTUAL_BATTERY); -} - -/* TCPC */ -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it8xxx2_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, - { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB1, - .addr_flags = RT1718S_I2C_ADDR_FLAGS, - }, - .drv = &rt1718s_tcpm_drv, - }, -}; - -__override int board_rt1718s_init(int port) -{ - /* set GPIO 1~3 as push pull, as output, output low. */ - rt1718s_gpio_set_flags(port, RT1718S_GPIO1, GPIO_OUT_LOW); - rt1718s_gpio_set_flags(port, RT1718S_GPIO2, GPIO_OUT_LOW); - rt1718s_gpio_set_flags(port, RT1718S_GPIO3, GPIO_OUT_LOW); - - /* gpio 1/2 output high when receiving frx signal */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); - - /* Turn on SBU switch */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_RT2_SBU_CTRL_01, - RT1718S_RT2_SBU_CTRL_01_SBU_VIEN | - RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN | - RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN, - 0xFF)); - /* Trigger GPIO 1/2 change when FRS signal received */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2)); - /* Set FRS signal detect time to 46.875us */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1, - RT1718S_FRS_CTRL1_FRSWAPRX_MASK, - 0xFF)); - - return EC_SUCCESS; -} - -const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) -{ - const static struct cc_para_t cc_parameter = { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }; - - if (port == USBPD_PORT_A) - return &cc_parameter; - return NULL; -} - -uint16_t tcpc_get_alert_status(void) -{ - /* - * C0 TCPC is embedded in the EC and processes interrupts in the - * chip code (it83xx/intc.c) - */ - if (!gpio_get_level(GPIO_USB_C1_INT_ODL)) - return PD_STATUS_TCPC_ALERT_1; - return 0; -} - -void board_reset_pd_mcu(void) -{ - /* - * C0: The internal TCPC on ITE EC does not have a reset signal, - * but it will get reset when the EC gets reset. - */ - /* C1: Add code if TCPC chips need a reset */ -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ - /* - * We ignore the cc_pin and PPC vconn because polarity and PPC vconn - * should already be set correctly in the PPC driver via the pd - * state machine. - */ -} - -int board_set_active_charge_port(int port) -{ - int i; - bool is_valid_port = (port == 0 || port == 1); - - if (!is_valid_port && port != CHARGE_PORT_NONE) - return EC_ERROR_INVAL; - - if (port == CHARGE_PORT_NONE) { - CPRINTS("Disabling all charger ports"); - - /* Disable all ports. */ - for (i = 0; i < ppc_cnt; i++) { - /* - * Do not return early if one fails otherwise we can - * get into a boot loop assertion failure. - */ - if (ppc_vbus_sink_enable(i, 0)) - CPRINTS("Disabling C%d as sink failed.", i); - } - rt1718s_gpio_set_level(1, GPIO_EN_USB_C1_VBUS_L, 1); - - return EC_SUCCESS; - } - - /* Check if the port is sourcing VBUS. */ - if (ppc_is_sourcing_vbus(port)) { - CPRINTS("Skip enable C%d", port); - return EC_ERROR_INVAL; - } - - CPRINTS("New charge port: C%d", port); - - /* - * Turn off the other ports' sink path FETs, before enabling the - * requested charge port. - */ - for (i = 0; i < ppc_cnt; i++) { - if (i == port) - continue; - - if (ppc_vbus_sink_enable(i, 0)) - CPRINTS("C%d: sink path disable failed.", i); - } - - /* Enable requested charge port. */ - if (ppc_vbus_sink_enable(port, 1)) { - CPRINTS("C%d: sink path enable failed.", port); - return EC_ERROR_UNKNOWN; - } - - rt1718s_gpio_set_level(1, GPIO_EN_USB_C1_VBUS_L, !(port == 1)); - - return EC_SUCCESS; -} - -int ppc_get_alert_status(int port) -{ - if (port == 0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - - /* TODO: add rt1718s */ - return 0; -} -/* SD Card */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *num_voltages, uint16_t *voltages_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_info(id, name, num_voltages, - voltages_mv); -} - -int board_regulator_enable(uint32_t index, uint8_t enable) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_enable(id, enable); -} - -int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_is_enabled(id, enabled); -} - -int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, - uint32_t max_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_set_voltage(id, min_mv, max_mv); -} - -int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_voltage(id, voltage_mv); -} - -static void baseboard_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); -#ifndef BOARD_CHERRY - gpio_enable_interrupt(GPIO_AP_XHCI_INIT_DONE); -#endif -} -DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT - 1); - -__override int board_pd_set_frs_enable(int port, int enable) -{ - if (port == 1) - /* - * Use set_flags (implemented by a single i2c write) instead - * of set_level (= i2c_update) to save one read operation in - * FRS path. - */ - rt1718s_gpio_set_flags(port, GPIO_EN_USB_C1_FRS, - enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); - return EC_SUCCESS; -} - -__override int board_get_vbus_voltage(int port) -{ - int voltage = 0; - - switch (port) { - case 0: - voltage = adc_read_channel(ADC_VBUS); - break; - case 1: - rt1718s_get_adc(port, RT1718S_ADC_VBUS1, &voltage); - break; - default: - return 0; - } - - return voltage; -} diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h deleted file mode 100644 index 8dc1dbfb91..0000000000 --- a/baseboard/cherry/baseboard.h +++ /dev/null @@ -1,242 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cherry board configuration */ - -#ifndef __CROS_EC_BASEBOARD_H -#define __CROS_EC_BASEBOARD_H - -/* IT81202-bx config */ -/* - * NOTE: we need to make correct VCC voltage selection here if EC's VCC isn't - * connect to 1.8v on other versions. - */ -#define CONFIG_IT83XX_VCC_1P8V - -/* - * On power-on, H1 releases the EC from reset but then quickly asserts and - * releases the reset a second time. This means the EC sees 2 resets: - * (1) power-on reset, (2) reset-pin reset. This config will - * allow the second reset to be treated as a power-on. - */ -#define CONFIG_BOARD_RESET_AFTER_POWER_ON -#define CONFIG_CHIPSET_MT8192 -#define CONFIG_EXTPOWER_GPIO -#define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC -#define CONFIG_POWER_SLEEP_FAILURE_DETECTION -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE - -/* Chipset */ -#define CONFIG_CMD_AP_RESET_LOG -#define CONFIG_CMD_POWERINDEBUG -#define CONFIG_HOST_COMMAND_STATUS -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LOW_POWER_S0 -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_COMMON -#define CONFIG_PWM -#define CONFIG_PWM_KBLIGHT -#define CONFIG_VBOOT_HASH -#define CONFIG_VOLUME_BUTTONS -#define CONFIG_WP_ACTIVE_HIGH - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_FUEL_GAUGE -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL -#define CONFIG_BATTERY_SMART - -/* BC12 */ -#ifdef BOARD_CHERRY -#define CONFIG_BC12_DETECT_PI3USB9201 -#endif -#define CONFIG_BC12_DETECT_MT6360 -#undef CONFIG_BC12_SINGLE_DRIVER -#define CONFIG_USB_CHARGER - -/* CBI */ -#define CONFIG_BOARD_VERSION_CBI -#define CONFIG_CBI_EEPROM -#define CONFIG_CMD_CBI -#define I2C_PORT_EEPROM IT83XX_I2C_CH_A -#define I2C_ADDR_EEPROM_FLAGS 0x50 - -/* Charger */ -#define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ -#define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER -#define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_ISL9238C -#define CONFIG_CHARGER_MAINTAIN_VBAT -/* Not used in boot flow, set to 0 to suppress system_can_boot_ap warning */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 0 -#define CONFIG_CHARGER_OTG -#define CONFIG_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS_READ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON - -/* Keyboard */ -#define CONFIG_CMD_KEYBOARD -#define CONFIG_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* I2C */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_I2C_PASSTHRU_RESTRICTED -#define CONFIG_I2C_VIRTUAL_BATTERY -#define I2C_PORT_CHARGER IT83XX_I2C_CH_A -#define I2C_PORT_BATTERY IT83XX_I2C_CH_A -#define I2C_PORT_ACCEL IT83XX_I2C_CH_B -#define I2C_PORT_PPC0 IT83XX_I2C_CH_C -#define I2C_PORT_PPC1 IT83XX_I2C_CH_E -#define I2C_PORT_USB0 IT83XX_I2C_CH_C -#define I2C_PORT_USB1 IT83XX_I2C_CH_E -#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C -#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E -#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY -#define CONFIG_SMBUS_PEC - -/* LED */ -#define CONFIG_LED_COMMON - -/* PD / USB-C / PPC */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define CONFIG_CMD_PPC_DUMP -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_IT83XX_TUNE_CC_PHY -#define CONFIG_USBC_PPC -#define CONFIG_USBC_PPC_DEDICATED_INT -#define CONFIG_USBC_PPC_POLARITY -#define CONFIG_USBC_PPC_RT1718S -#define CONFIG_USBC_PPC_SYV682X -#define CONFIG_USBC_PPC_VCONN -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_USB_DRP_ACC_TRYSRC -#define CONFIG_USBC_RETIMER_PS8802 /* C0 */ -#define CONFIG_USB_MUX_ANX3443 /* C1 */ -#define CONFIG_USB_MUX_VIRTUAL -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_DECODE_SOP -#define CONFIG_USB_PD_DISCHARGE -#define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_DPS -#define CONFIG_USB_PD_DP_HPD_GPIO -#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_FRS_PPC -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 1 -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_PPC -#define CONFIG_USB_PD_REV30 -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP -#define CONFIG_USB_PD_TCPM_RT1718S -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TCPMV2 -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_VBUS_MEASURE_BY_BOARD -#define CONFIG_USB_PID 0x5054 -#define CONFIG_USB_POWER_DELIVERY - -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* USB-A */ -#define CONFIG_USB_PORT_POWER_DUMB -#define CONFIG_USB_PORT_POWER_DUMB_CUSTOM_HOOK -#define USB_PORT_COUNT USBA_PORT_COUNT - -/* UART */ -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* Sensor */ -#define CONFIG_CMD_ACCEL_INFO -#define CONFIG_CMD_ACCELS - -#define CONFIG_ACCEL_FIFO -#define CONFIG_ACCEL_FIFO_SIZE 256 -#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) -#define CONFIG_ACCEL_INTERRUPTS - -/* SPI / Host Command */ -#define CONFIG_SPI - -/* MKBP */ -#define CONFIG_MKBP_EVENT - -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* Voltage regulator control */ -#define CONFIG_HOSTCMD_REGULATOR - -/* Define the host events which are allowed to wakeup AP in S3. */ -#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" -#include "power/mt8192.h" - -enum adc_channel { - ADC_VBUS, /* ADC 0 */ - ADC_BOARD_ID, /* ADC 1 */ - ADC_SKU_ID, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_CHARGER_PMON, /* ADC 6 */ - ADC_TEMP_SENSOR_CHARGER, /* ADC 7 */ - - /* Number of ADC channels */ - ADC_CH_COUNT, -}; - -enum temp_sensor_id { - TEMP_SENSOR_CHARGER, - TEMP_SENSOR_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_LED3, - PWM_CH_KBLIGHT, - PWM_CH_COUNT, -}; - -void board_reset_pd_mcu(void); -void rt1718s_tcpc_interrupt(enum gpio_signal signal); - -/* RT1718S gpio to pin name mapping */ -#define GPIO_EN_USB_C1_VBUS_L RT1718S_GPIO1 -#define GPIO_EN_USB_C1_5V_OUT RT1718S_GPIO2 -#define GPIO_EN_USB_C1_FRS RT1718S_GPIO3 - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/cherry/build.mk b/baseboard/cherry/build.mk deleted file mode 100644 index ae82c1ca68..0000000000 --- a/baseboard/cherry/build.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Baseboard specific files build -# - -baseboard-y=baseboard.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/cherry/usb_pd_policy.c b/baseboard/cherry/usb_pd_policy.c deleted file mode 100644 index 0c7f4dcee5..0000000000 --- a/baseboard/cherry/usb_pd_policy.c +++ /dev/null @@ -1,260 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#include "adc.h" -#include "atomic.h" -#include "charge_manager.h" -#include "chipset.h" -#include "driver/tcpm/rt1718s.h" -#include "driver/tcpm/tcpci.h" -#include "timer.h" -#include "usb_dp_alt_mode.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usbc_ppc.h" - -#if CONFIG_USB_PD_3A_PORTS != 1 -#error Cherry reference must have at least one 3.0 A port -#endif - -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) - -/* The port that the aux channel is on. */ -static enum { - AUX_PORT_NONE = -1, - AUX_PORT_C0 = 0, - AUX_PORT_C1HDMI = 1, -} aux_port = AUX_PORT_NONE; - -int svdm_get_hpd_gpio(int port) -{ - /* HPD is low active, inverse the result */ - return !gpio_get_level(GPIO_EC_AP_DP_HPD_ODL); -} - -void svdm_set_hpd_gpio(int port, int en) -{ - /* - * HPD is low active, inverse the en - * TODO: C0&C1 shares the same HPD, implement FCFS policy. - */ - gpio_set_level(GPIO_EC_AP_DP_HPD_ODL, !en); -} - -static void aux_switch_port(int port) -{ - if (port != AUX_PORT_NONE) - gpio_set_level_verbose(CC_USBPD, GPIO_DP_PATH_SEL, !port); - aux_port = port; -} - -static void aux_display_disconnected(int port) -{ - /* Gets the other port. C0 -> C1, C1 -> C0. */ - int other_port = !port; - - /* If the current port is not the aux port, nothing needs to be done. */ - if (aux_port != port) - return; - - /* If the other port is connected to a external display, switch aux. */ - if (dp_status[other_port] & DP_FLAGS_DP_ON) - aux_switch_port(other_port); - else - aux_switch_port(AUX_PORT_NONE); -} - -__override int svdm_dp_attention(int port, uint32_t *payload) -{ - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - int cur_lvl = svdm_get_hpd_gpio(port); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - mux_state_t mux_state; - - dp_status[port] = payload[1]; - - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) - /* - * Wake up the AP. IRQ or level high indicates a DP sink is now - * present. - */ - if (IS_ENABLED(CONFIG_MKBP_EVENT)) - pd_notify_dp_alt_mode_entry(port); - - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - if (irq && !lvl) { - /* - * IRQ can only be generated when the level is high, because - * the IRQ is signaled by a short low pulse from the high level. - */ - CPRINTF("ERR:HPD:IRQ&LOW\n"); - return 0; /* nak */ - } - - if (irq && cur_lvl) { - uint64_t now = get_time().val; - /* wait for the minimum spacing between IRQ_HPD if needed */ - if (now < svdm_hpd_deadline[port]) - usleep(svdm_hpd_deadline[port] - now); - - /* generate IRQ_HPD pulse */ - svdm_set_hpd_gpio(port, 0); - /* - * b/171172053#comment14: since the HPD_DSTREAM_DEBOUNCE_IRQ is - * very short (500us), we can use udelay instead of usleep for - * more stable pulse period. - */ - udelay(HPD_DSTREAM_DEBOUNCE_IRQ); - svdm_set_hpd_gpio(port, 1); - } else { - svdm_set_hpd_gpio(port, lvl); - } - - /* - * Cherry can only output to 1 display port at a time. - * This implements FCFS policy by changing the aux channel. If a - * display is connected to the either port (says A), and the port A - * will be served until the display is disconnected from port A. - * It won't output to the other display which connects to port B. - */ - if (lvl && aux_port == AUX_PORT_NONE) - /* - * A display is connected, and no display was plugged on either - * port. - */ - aux_switch_port(port); - else if (!lvl) - aux_display_disconnected(port); - - - /* set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - - mux_state = (lvl ? USB_PD_MUX_HPD_LVL : USB_PD_MUX_HPD_LVL_DEASSERTED) | - (irq ? USB_PD_MUX_HPD_IRQ : USB_PD_MUX_HPD_IRQ_DEASSERTED); - usb_mux_hpd_update(port, mux_state); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, lvl); -#endif - - /* ack */ - return 1; -} - -__override void svdm_exit_dp_mode(int port) -{ -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - svdm_set_hpd_gpio(port, 0); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); - - aux_display_disconnected(port); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, 0); -#endif -} - -int pd_snk_is_vbus_provided(int port) -{ - static atomic_t vbus_prev[CONFIG_USB_PD_PORT_MAX_COUNT]; - int vbus; - - /* - * Use ppc_is_vbus_present for all ports on Cherry, and - * port 1 on other devices. - */ - if (IS_ENABLED(BOARD_CHERRY) || port == 1) - return ppc_is_vbus_present(port); - - /* b/181203590: use ADC for port 0 (syv682x) */ - vbus = (adc_read_channel(ADC_VBUS) >= PD_V_SINK_DISCONNECT_MAX); - -#ifdef CONFIG_USB_CHARGER - /* - * There's no PPC to inform VBUS change for usb_charger, so inform - * the usb_charger now. - */ - if (!!(vbus_prev[port] != vbus)) - usb_charger_vbus_change(port, vbus); - - if (vbus) - atomic_or(&vbus_prev[port], 1); - else - atomic_clear(&vbus_prev[port]); -#endif - return vbus; -} - -void pd_power_supply_reset(int port) -{ - int prev_en; - - prev_en = ppc_is_sourcing_vbus(port); - - /* Disable VBUS. */ - ppc_vbus_source_enable(port, 0); - - /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) - pd_set_vbus_discharge(port, 1); - - if (port == 1) - rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_5V_OUT, 0); - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_check_vconn_swap(int port) -{ - /* Allow Vconn swap if AP is on. */ - return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON); -} - -int pd_set_power_supply_ready(int port) -{ - int rv; - - /* Disable charging. */ - rv = ppc_vbus_sink_enable(port, 0); - if (rv) - return rv; - - pd_set_vbus_discharge(port, 0); - - /* Provide Vbus. */ - rv = ppc_vbus_source_enable(port, 1); - if (rv) - return rv; - - if (port == 1) - rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_5V_OUT, 1); - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; -} - -int board_vbus_source_enabled(int port) -{ - return ppc_is_sourcing_vbus(port); -} |