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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /baseboard/intelrvp/npcx_ec.h
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14588.123.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'baseboard/intelrvp/npcx_ec.h')
-rw-r--r--baseboard/intelrvp/npcx_ec.h38
1 files changed, 0 insertions, 38 deletions
diff --git a/baseboard/intelrvp/npcx_ec.h b/baseboard/intelrvp/npcx_ec.h
deleted file mode 100644
index 52bcb2dae6..0000000000
--- a/baseboard/intelrvp/npcx_ec.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Intel BASEBOARD-RVP NPCX EC specific configuration */
-
-#ifndef __CROS_EC_NPCX_EC_H
-#define __CROS_EC_NPCX_EC_H
-
-#if !defined(__ASSEMBLER__)
-
-enum mft_channel {
- MFT_CH_0 = 0,
- /* Number of MFT channels */
- MFT_CH_COUNT,
-};
-
-#endif /* __ASSEMBLER__ */
-
-/* ADC channels */
-#define ADC_MAX_MVOLT ADC_MAX_VOLT
-#define ADC_TEMP_SNS_AMBIENT_CHANNEL NPCX_ADC_CH3
-#define ADC_TEMP_SNS_DDR_CHANNEL NPCX_ADC_CH4
-#define ADC_TEMP_SNS_SKIN_CHANNEL NPCX_ADC_CH2
-#define ADC_TEMP_SNS_VR_CHANNEL NPCX_ADC_CH1
-
-/* KSO2 is inverted */
-#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV
-
-/* Fan */
-#define CONFIG_PWM
-#define PWN_FAN_CHANNEL 3
-
-/* GPIO64/65 are used as UART pins. */
-#define NPCX_UART_MODULE2 1
-
-#endif /* __CROS_EC_NPCX_EC_H */