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| author | Denis Brockus <dbrockus@chromium.org> | 2019-06-25 12:44:16 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-07-19 21:11:02 +0000 |
| commit | d1a18f82ed831d4e640336ff5571f5fa64bc7b36 (patch) | |
| tree | c46aeb6136de1c27c66e3d5f662e9620161bef7b /baseboard/octopus/baseboard.h | |
| parent | 1f14229fa7e499dfcee07d17add187598ff0a46c (diff) | |
| download | chrome-ec-d1a18f82ed831d4e640336ff5571f5fa64bc7b36.tar.gz | |
Use 7bit I2C/SPI slave addresses in EC
Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'baseboard/octopus/baseboard.h')
| -rw-r--r-- | baseboard/octopus/baseboard.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index a062b021ce..05494819ff 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -47,7 +47,7 @@ #define I2C_PORT_EEPROM NPCX_I2C_PORT3_0 #define I2C_PORT_CHARGER NPCX_I2C_PORT4_1 #define I2C_PORT_SENSOR NPCX_I2C_PORT7_0 - #define I2C_ADDR_EEPROM 0xA0 + #define I2C_ADDR_EEPROM__7bf 0x50 /* Enable PSL hibernate mode. */ #define CONFIG_HIBERNATE_PSL @@ -69,7 +69,7 @@ #define I2C_PORT_USBC1 IT83XX_I2C_CH_E #define I2C_PORT_USB_MUX I2C_PORT_USBC0 /* For MUX driver */ #define I2C_PORT_EEPROM IT83XX_I2C_CH_F - #define I2C_ADDR_EEPROM 0xA0 + #define I2C_ADDR_EEPROM__7bf 0x50 /* EC variant determines USB-C variant */ #define VARIANT_OCTOPUS_USBC_ITE_EC_TCPCS |