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authorJett Rink <jettrink@chromium.org>2018-12-06 11:24:18 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-12-10 21:47:50 -0800
commit0e68e127de2ea26ebe254654e73290df5350772e (patch)
tree7f5f1bba808f6d500935c7b698ac18067cb6506e /baseboard/octopus
parentf645b4591de099c245dd8e69bdc785134fdfdb7a (diff)
downloadchrome-ec-0e68e127de2ea26ebe254654e73290df5350772e.tar.gz
octopus: remove unused TCPC re-driver power code
We had a hardware revision that used GPIO03 from the PS8751 as the enable signal for the TypeA USB re-driver power regulator. This prove to not work especially when the TCPC came back from low power mode. The hardware change has been reverted and now we are removing the firmware support for this change. BRANCH=octopus BUG=b:111406013,b:117656946 TEST=builds. Version 2.24 (released 10/30) of sub-board schematics mark the stuffing options to have the TCPC control the power as DNS. Version 2.2 was never officially released that had the faulty hardware circuit. Only a single spin of sub-boards had this circuit and they have been reworked. Change-Id: Ib7f5a369af26a83fb71ef7e27f52086a4aed9c0c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1366295 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Tom Sliva <tsliva@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'baseboard/octopus')
-rw-r--r--baseboard/octopus/variant_usbc_standalone_tcpcs.c78
1 files changed, 0 insertions, 78 deletions
diff --git a/baseboard/octopus/variant_usbc_standalone_tcpcs.c b/baseboard/octopus/variant_usbc_standalone_tcpcs.c
index 09cac5f575..d2da4595bb 100644
--- a/baseboard/octopus/variant_usbc_standalone_tcpcs.c
+++ b/baseboard/octopus/variant_usbc_standalone_tcpcs.c
@@ -198,81 +198,3 @@ void board_reset_pd_mcu(void)
CPRINTS("Skipping C1 TCPC reset because no battery");
}
}
-
-#define PS8751_DEBUG_ADDR 0x12
-#define PS8751_GPIO_ENABLE 0x44
-#define PS8751_GPIO_LVL 0x45
-#define PS8751_GPIO3_VAL (1 << 3)
-
-static void set_ps8751_gpio3(int enable)
-{
- int rv, reg;
-
- /*
- * Ensure that we don't put the TCPC back to sleep while we are
- * accessing debug registers.
- */
- pd_prevent_low_power_mode(USB_PD_PORT_TCPC_1, 1);
-
- /* Enable debug page access */
- rv = tcpc_write(USB_PD_PORT_TCPC_1, PS8XXX_REG_I2C_DEBUGGING_ENABLE,
- 0x30);
- if (rv)
- goto error;
-
- /* Enable GPIO3 (bit3) output by setting to bit3 to 1 */
- rv = i2c_read8(I2C_PORT_TCPC1, PS8751_DEBUG_ADDR, PS8751_GPIO_ENABLE,
- &reg);
- if (rv)
- goto error;
-
- if (!(reg & PS8751_GPIO3_VAL)) {
- reg |= PS8751_GPIO3_VAL;
-
- rv = i2c_write8(I2C_PORT_TCPC1, PS8751_DEBUG_ADDR,
- PS8751_GPIO_ENABLE, reg);
- if (rv)
- goto error;
- }
-
- /* Set level for GPIO3, which controls the re-driver power */
- rv = i2c_read8(I2C_PORT_TCPC1, PS8751_DEBUG_ADDR, PS8751_GPIO_LVL,
- &reg);
- if (rv)
- goto error;
-
- if (!!(reg & PS8751_GPIO3_VAL) != !!enable) {
- if (enable)
- reg |= PS8751_GPIO3_VAL;
- else
- reg &= ~PS8751_GPIO3_VAL;
-
- rv = i2c_write8(I2C_PORT_TCPC1, PS8751_DEBUG_ADDR,
- PS8751_GPIO_LVL, reg);
- }
-error:
- if (rv)
- CPRINTS("C1: Could not set re-driver power to %d", enable);
-
- /* Disable debug page access and allow LPM again*/
- tcpc_write(USB_PD_PORT_TCPC_1, PS8XXX_REG_I2C_DEBUGGING_ENABLE, 0x31);
- pd_prevent_low_power_mode(USB_PD_PORT_TCPC_1, 0);
-}
-
-/*
- * Most boards do not stuff the re-driver. We always toggle GPIO3 on the PS8751
- * since it is benign if the re-driver isn't there.
- */
-static void board_enable_a1_redriver(void)
-{
- set_ps8751_gpio3(1);
-}
-DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_enable_a1_redriver, HOOK_PRIO_DEFAULT);
-
-
-static void board_disable_a1_redriver(void)
-{
- set_ps8751_gpio3(0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_disable_a1_redriver,
- HOOK_PRIO_DEFAULT);