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author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2021-09-29 18:12:20 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-10-21 00:34:32 +0000 |
commit | 5a3cc7ebf1fb3cd6c6b2a259952c0898404f4e7f (patch) | |
tree | 00a927bca9ec521cc53a18580fc76701a9369046 /board/adlrvpp_ite | |
parent | 74e6e0bc2fa41a192b9f485d7c8c683e6e6a5949 (diff) | |
download | chrome-ec-5a3cc7ebf1fb3cd6c6b2a259952c0898404f4e7f.tar.gz |
ADL_RVP: Enable pre-task I2C transactions
ADL-RVP needs to access IOEX based GPIOs pre-task to configure the
SBU lines to CCD or AUX hence enabled pre-task I2C transactions.
BUG=none
BRANCH=none
TEST=Able to configure config SBU lines for CCD pre-task
Change-Id: I1512dc4c1837e769f39e1dd595ae2ba1b4cbdf17
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3194986
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Poornima Tom <poornima.tom@intel.com>
Commit-Queue: caveh jalali <caveh@chromium.org>
Tested-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'board/adlrvpp_ite')
-rw-r--r-- | board/adlrvpp_ite/board.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/board/adlrvpp_ite/board.c b/board/adlrvpp_ite/board.c index 835cdcb986..3baec4aeaf 100644 --- a/board/adlrvpp_ite/board.c +++ b/board/adlrvpp_ite/board.c @@ -9,6 +9,7 @@ #include "fusb302.h" #include "gpio.h" #include "i2c.h" +#include "i2c_bitbang.h" #include "it83xx_pd.h" #include "lid_switch.h" #include "pca9675.h" @@ -76,6 +77,27 @@ const struct i2c_port_t i2c_ports[] = { BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +const struct i2c_port_t i2c_bitbang_ports[] = { + [I2C_BITBANG_CHAN_BRD_ID] = { + .name = "bitbang_brd_id", + .port = IT83XX_I2C_CH_B, + .kbps = 100, + .scl = GPIO_SMB_BS_CLK, + .sda = GPIO_SMB_BS_DATA, + .drv = &bitbang_drv, + }, + [I2C_BITBANG_CHAN_IOEX_0] = { + .name = "bitbang_ioex_0", + .port = IT83XX_I2C_CH_C, + .kbps = 100, + .scl = GPIO_USBC_TCPC_I2C_CLK_P0, + .sda = GPIO_USBC_TCPC_I2C_DATA_P0, + .drv = &bitbang_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(i2c_bitbang_ports) == I2C_BITBANG_CHAN_COUNT); +const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); + /* USB-C TCPC Configuration */ const struct tcpc_config_t tcpc_config[] = { [TYPE_C_PORT_0] = { |