ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

12 files changed, 0 insertions, 1441 deletions

diff --git a/board/chronicler/battery.c b/board/chronicler/battery.c
deleted file mode 100644
index 82347953ba..0000000000
--- a/board/chronicler/battery.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Battery pack vendor provided charging profile
- */
-
-#include "battery_fuel_gauge.h"
-#include "common.h"
-#include "util.h"
-
-/*
- * Battery info for all Chronicler battery types. Note that the fields
- * start_charging_min/max and charging_min/max are not used for the charger.
- * The effective temperature limits are given by discharging_min/max_c.
- *
- * Fuel Gauge (FG) parameters which are used for determining if the battery
- * is connected, the appropriate ship mode (battery cutoff) command, and the
- * charge/discharge FETs status.
- *
- * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery
- * register. For some batteries, the charge/discharge FET bits are set when
- * charging/discharging is active, in other types, these bits set mean that
- * charging/discharging is disabled. Therefore, in addition to the mask for
- * these bits, a disconnect value must be specified. Note that for TI fuel
- * gauge, the charge/discharge FET status is found in Operation Status (0x54),
- * but a read of Manufacturer Access (0x00) will return the lower 16 bits of
- * Operation status which contains the FET status bits.
- *
- * The assumption for battery types supported is that the charge/discharge FET
- * status can be read with a sb_read() command and therefore, only the register
- * address, mask, and disconnect value need to be provided.
- */
-const struct board_batt_params board_battery_info[] = {
-	/* Fujitsu CP813907-01 Battery Information */
-	[BATTERY_FUJITSU_CP813907] = {
-		.fuel_gauge = {
-			.manuf_name = "Fujitsu",
-			.device_name = "CP813907-01",
-			.ship_mode = {
-				.reg_addr = 0x00,
-				.reg_data = { 0x10, 0x10 },
-			},
-			.fet = {
-				.reg_addr = 0x00,
-				.reg_mask = 0x2000,
-				.disconnect_val = 0x2000,
-			}
-		},
-		.batt_info = {
-			.voltage_max		= 13200, /* mV */
-			.voltage_normal		= 11550, /* mV */
-			.voltage_min		= 9000,  /* mV */
-			.precharge_current	= 128,	 /* mA */
-			.start_charging_min_c	= 0,
-			.start_charging_max_c	= 45,
-			.charging_min_c		= 0,
-			.charging_max_c		= 55,
-			.discharging_min_c	= -20,
-			.discharging_max_c	= 60,
-		},
-	},
-
-	/* NVT CP813907-01 Battery Information */
-	/*
-	 *  NVT CP813907-01 Battery only use to support early
-	 *  stage battery, all battery for PVT will update
-	 *  manufacturer name to Fujitsu. See b/190685811.
-	 */
-	[BATTERY_NVT_CP813907] = {
-		.fuel_gauge = {
-			.manuf_name = "NVT",
-			.device_name = "CP813907-01",
-			.ship_mode = {
-				.reg_addr = 0x00,
-				.reg_data = { 0x10, 0x10 },
-			},
-			.fet = {
-				.reg_addr = 0x00,
-				.reg_mask = 0x2000,
-				.disconnect_val = 0x2000,
-			}
-		},
-		.batt_info = {
-			.voltage_max		= 13200, /* mV */
-			.voltage_normal		= 11550, /* mV */
-			.voltage_min		= 9000,  /* mV */
-			.precharge_current	= 128,	 /* mA */
-			.start_charging_min_c	= 0,
-			.start_charging_max_c	= 45,
-			.charging_min_c		= 0,
-			.charging_max_c		= 55,
-			.discharging_min_c	= -20,
-			.discharging_max_c	= 60,
-		},
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
-
-const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_FUJITSU_CP813907;
diff --git a/board/chronicler/board.c b/board/chronicler/board.c
deleted file mode 100644
index c86ad462e1..0000000000
--- a/board/chronicler/board.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Chronicler board-specific configuration */
-#include "button.h"
-#include "common.h"
-#include "accelgyro.h"
-#include "cbi_ec_fw_config.h"
-#include "driver/sync.h"
-#include "driver/tcpm/ps8xxx.h"
-#include "extpower.h"
-#include "fan.h"
-#include "fan_chip.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "keyboard_8042.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "pwm.h"
-#include "pwm_chip.h"
-#include "switch.h"
-#include "system.h"
-#include "task.h"
-#include "throttle_ap.h"
-#include "uart.h"
-#include "usb_pd.h"
-#include "usb_pd_tbt.h"
-#include "usb_pd_tcpm.h"
-#include "util.h"
-
-#include "gpio_list.h" /* Must come after other header files. */
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/******************************************************************************/
-/* Physical fans. These are logically separate from pwm_channels. */
-
-const struct fan_conf fan_conf_0 = {
-	.flags = FAN_USE_RPM_MODE,
-	.ch = MFT_CH_0,	/* Use MFT id to control fan */
-	.pgood_gpio = -1,
-	.enable_gpio = GPIO_EN_PP5000_FAN,
-};
-
-const struct fan_rpm fan_rpm_0 = {
-	.rpm_min   = 3000,
-	.rpm_start = 5000,
-	.rpm_max   = 5100,
-};
-
-const struct fan_t fans[FAN_CH_COUNT] = {
-	[FAN_CH_0] = {
-		.conf = &fan_conf_0,
-		.rpm = &fan_rpm_0,
-	},
-};
-
-/******************************************************************************/
-/* EC thermal management configuration */
-
-/*
- * Tiger Lake specifies 100 C as maximum TDP temperature.  THRMTRIP# occurs at
- * 130 C.  However, sensor is located next to DDR, so we need to use the lower
- * DDR temperature limit (80 C)
- */
-const static struct ec_thermal_config thermal_config_without_fan = {
-	.temp_host = {
-		[EC_TEMP_THRESH_HIGH] = C_TO_K(77),
-		[EC_TEMP_THRESH_HALT] = C_TO_K(80),
-	},
-	.temp_host_release = {
-		[EC_TEMP_THRESH_HIGH] = C_TO_K(65),
-	},
-};
-
-const static struct ec_thermal_config thermal_config_with_fan = {
-	.temp_host = {
-		[EC_TEMP_THRESH_HIGH] = C_TO_K(77),
-		[EC_TEMP_THRESH_HALT] = C_TO_K(80),
-	},
-	.temp_host_release = {
-		[EC_TEMP_THRESH_HIGH] = C_TO_K(65),
-	},
-	/* For real temperature fan_table (0 ~ 99C) */
-	.temp_fan_off = C_TO_K(0),
-	.temp_fan_max = C_TO_K(99),
-};
-
-struct ec_thermal_config thermal_params[] = {
-	[TEMP_SENSOR_1_CHARGER]			= thermal_config_with_fan,
-	[TEMP_SENSOR_2_PP3300_REGULATOR]	= thermal_config_without_fan,
-	[TEMP_SENSOR_3_DDR_SOC]			= thermal_config_without_fan,
-	[TEMP_SENSOR_4_FAN]			= thermal_config_without_fan,
-};
-BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
-
-struct fan_step {
-	int on;
-	int off;
-	int rpm;
-};
-
-/* Fan control table */
-static const struct fan_step fan_table0[] = {
-	{.on = 30, .off =  0, .rpm = 3150 },		/* Fan level 0 */
-	{.on = 47, .off = 43, .rpm = 3500 },		/* Fan level 1 */
-	{.on = 50, .off = 47, .rpm = 3750 },		/* Fan level 2 */
-	{.on = 53, .off = 50, .rpm = 4200 },		/* Fan level 3 */
-	{.on = 56, .off = 53, .rpm = 4500 },		/* Fan level 4 */
-	{.on = 59, .off = 56, .rpm = 5000 },		/* Fan level 5 */
-};
-
-/* All fan tables must have the same number of levels */
-#define NUM_FAN_LEVELS ARRAY_SIZE(fan_table0)
-
-static const struct fan_step *fan_table = fan_table0;
-
-#define FAN_AVERAGE_TIME_SEC 5
-
-int fan_percent_to_rpm(int fan, int pct)
-{
-	static int current_level;
-	static int previous_level = NUM_FAN_LEVELS;
-	static int cnt, avg_pct, previous_pct;
-	int i;
-
-	/* Average several times to smooth fan rotating speed. */
-	avg_pct += pct;
-
-	if (++cnt != FAN_AVERAGE_TIME_SEC)
-		return fan_table[previous_level].rpm;
-
-	avg_pct = (int) avg_pct / FAN_AVERAGE_TIME_SEC;
-
-	/*
-	 * Compare the pct and previous pct, we have the three paths :
-	 *  1. decreasing path. (check the off point)
-	 *  2. increasing path. (check the on point)
-	 *  3. invariant path. (return the current RPM)
-	 */
-	if (avg_pct < previous_pct) {
-		for (i = current_level; i >= 0; i--) {
-			if (avg_pct <= fan_table[i].off)
-				current_level = i - 1;
-			else
-				break;
-		}
-	} else if (avg_pct > previous_pct) {
-		for (i = current_level + 1; i < NUM_FAN_LEVELS; i++) {
-			if (avg_pct >= fan_table[i].on)
-				current_level = i;
-			else
-				break;
-		}
-	}
-
-	if (current_level < 0)
-		current_level = 0;
-
-	if (current_level != previous_level)
-		cprints(CC_THERMAL, "Setting fan RPM to %d",
-			fan_table[current_level].rpm);
-
-	previous_pct = avg_pct;
-	previous_level = current_level;
-
-	cnt = 0;
-	avg_pct = 0;
-
-	return fan_table[current_level].rpm;
-}
-
-/******************************************************************************/
-/* MFT channels. These are logically separate from pwm_channels. */
-const struct mft_t mft_channels[] = {
-	[MFT_CH_0] = {
-		.module = NPCX_MFT_MODULE_1,
-		.clk_src = TCKC_LFCLK,
-		.pwm_id = PWM_CH_FAN,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);
-
-/******************************************************************************/
-/* I2C port map configuration */
-const struct i2c_port_t i2c_ports[] = {
-	{
-		.name = "usb_c0",
-		.port = I2C_PORT_USB_C0,
-		.kbps = 1000,
-		.scl = GPIO_EC_I2C1_USB_C0_SCL,
-		.sda = GPIO_EC_I2C1_USB_C0_SDA,
-	},
-	{
-		.name = "usb_c1",
-		.port = I2C_PORT_USB_C1,
-		.kbps = 1000,
-		.scl = GPIO_EC_I2C2_USB_C1_SCL,
-		.sda = GPIO_EC_I2C2_USB_C1_SDA,
-	},
-	{
-		.name = "usb_1_mix",
-		.port = I2C_PORT_USB_1_MIX,
-		.kbps = 100,
-		.scl = GPIO_EC_I2C3_USB_1_MIX_SCL,
-		.sda = GPIO_EC_I2C3_USB_1_MIX_SDA,
-	},
-	{
-		.name = "power",
-		.port = I2C_PORT_POWER,
-		.kbps = 100,
-		.scl = GPIO_EC_I2C5_BATTERY_SCL,
-		.sda = GPIO_EC_I2C5_BATTERY_SDA,
-	},
-	{
-		.name = "eeprom",
-		.port = I2C_PORT_EEPROM,
-		.kbps = 400,
-		.scl = GPIO_EC_I2C7_EEPROM_PWR_SCL_R,
-		.sda = GPIO_EC_I2C7_EEPROM_PWR_SDA_R,
-	},
-};
-const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-
-/******************************************************************************/
-/* PWM configuration */
-const struct pwm_t pwm_channels[] = {
-	[PWM_CH_FAN] = {
-		.channel = 5,
-		.flags = PWM_CONFIG_OPEN_DRAIN,
-		.freq = 25000
-	},
-	[PWM_CH_KBLIGHT] = {
-		.channel = 3,
-		.flags = 0,
-		/*
-		 * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent
-		 * flicker. Higher frequencies consume similar average power to
-		 * lower PWM frequencies, but higher frequencies record a much
-		 * lower maximum power.
-		 */
-		.freq = 2400,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
-
-/******************************************************************************/
-/* keyboard config */
-static const struct ec_response_keybd_config main_kb = {
-	.num_top_row_keys = 10,
-	.action_keys = {
-		TK_BACK,		/* T1 */
-		/*
-		 *  Chronicler keyboard swaps T2 and T3 in the keyboard
-		 *  matrix,So swap the actions key lookup to match.
-		 *  The physical keyboard still orders the top row as
-		 *  Back, Refresh, Fullscreen, etc.
-		 */
-		TK_FULLSCREEN,		/* T3 */
-		TK_REFRESH,		/* T2 */
-		TK_OVERVIEW,		/* T4 */
-		TK_SNAPSHOT,		/* T5 */
-		TK_BRIGHTNESS_DOWN,	/* T6 */
-		TK_BRIGHTNESS_UP,	/* T7 */
-		TK_VOL_MUTE,		/* T8 */
-		TK_VOL_DOWN,		/* T9 */
-		TK_VOL_UP,		/* T10 */
-	},
-	.capabilities = KEYBD_CAP_SCRNLOCK_KEY,
-};
-
-__override const struct ec_response_keybd_config
-*board_vivaldi_keybd_config(void)
-{
-	return &main_kb;
-}
-
-/******************************************************************************/
-/* keyboard factory test */
-#ifdef CONFIG_KEYBOARD_FACTORY_TEST
-/*
- * Map keyboard connector pins to EC GPIO pins for factory test.
- * Pins mapped to {-1, -1} are skipped.
- * The connector has 24 pins total, and there is no pin 0.
- */
-
-const int keyboard_factory_scan_pins[][2] = {
-		{-1, -1}, {0, 5}, {1, 1}, {1, 0}, {0, 6},
-		{0, 7}, {1, 4}, {1, 3}, {1, 6}, {1, 7},
-		{3, 1}, {2, 0}, {1, 5}, {2, 6}, {2, 7},
-		{2, 1}, {2, 4}, {2, 5}, {1, 2}, {2, 3},
-		{2, 2}, {3, 0}, {-1, -1}, {-1, -1}, {-1, -1},
-};
-
-const int keyboard_factory_scan_pins_used =
-			ARRAY_SIZE(keyboard_factory_scan_pins);
-#endif
diff --git a/board/chronicler/board.h b/board/chronicler/board.h
deleted file mode 100644
index 243669035a..0000000000
--- a/board/chronicler/board.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Chronicler board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-/* Baseboard features */
-#include "baseboard.h"
-
-/*
- * The RAM and flash size combination on the NPCX797FC dose not leave
- * any unused flash space that can be used to store the .init_rom section.
- */
-#undef CONFIG_CHIP_INIT_ROM_REGION
-
-/* Optional features */
-
-#define CONFIG_VBOOT_EFS2
-
-#define CONFIG_POWER_BUTTON
-
-#undef CONFIG_UART_TX_BUF_SIZE
-#define CONFIG_UART_TX_BUF_SIZE 4096
-
-/* Chipset features */
-#define CONFIG_POWER_PP5000_CONTROL
-
-/* Sensors */
-#undef CONFIG_TABLET_MODE
-#undef CONFIG_GMR_TABLET_MODE
-#undef CONFIG_ACCEL_FIFO
-#undef CONFIG_ACCEL_FIFO_SIZE
-
-/* USB Type C and USB PD defines */
-#define CONFIG_USB_PD_PORT_MAX_COUNT			2
-
-/* TODO: b/144165680 - measure and check these values on Volteer */
-#define PD_POWER_SUPPLY_TURN_ON_DELAY	30000 /* us */
-#define PD_POWER_SUPPLY_TURN_OFF_DELAY	30000 /* us */
-/*
- * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C
- * cables only support up to 60W.
- */
-#define PD_OPERATING_POWER_MW	15000
-#define PD_MAX_POWER_MW		60000
-#define PD_MAX_CURRENT_MA	3000
-#define PD_MAX_VOLTAGE_MV	20000
-
-/* USB Type A Features */
-#define USB_PORT_COUNT			1
-#define CONFIG_USB_PORT_POWER_DUMB
-
-/* USBC PPC*/
-#define CONFIG_USBC_PPC_SN5S330		/* USBC port C0 */
-#define CONFIG_USBC_PPC_SYV682X		/* USBC port C1 */
-#define CONFIG_USB_PD_FRS_PPC
-#undef CONFIG_USB_PD_TCPC_RUNTIME_CONFIG
-#undef CONFIG_USB_PD_TCPM_TUSB422
-#undef CONFIG_USB_MUX_RUNTIME_CONFIG
-
-/* BC 1.2 */
-
-/* Volume Button feature */
-#undef CONFIG_VOLUME_BUTTONS
-
-/* Fan features */
-#define CONFIG_FAN_RPM_CUSTOM
-
-/* charger defines */
-#define CONFIG_CHARGER_SENSE_RESISTOR		10
-#define CONFIG_CHARGER_SENSE_RESISTOR_AC	10
-
-/* Retimer */
-#undef CONFIG_USBC_RETIMER_INTEL_BB
-#undef CONFIG_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG
-
-/* Keyboard feature */
-#define CONFIG_KEYBOARD_FACTORY_TEST
-
-/*
- * Macros for GPIO signals used in common code that don't match the
- * schematic names. Signal names in gpio.inc match the schematic and are
- * then redefined here to so it's more clear which signal is being used for
- * which purpose.
- */
-#define GPIO_AC_PRESENT			GPIO_ACOK_OD
-#define GPIO_EC_INT_L			GPIO_EC_PCH_INT_ODL
-#define GPIO_EN_PP5000			GPIO_EN_PP5000_A
-#define GPIO_ENTERING_RW		GPIO_EC_ENTERING_RW
-#define GPIO_LID_OPEN			GPIO_EC_LID_OPEN
-#define GPIO_KBD_KSO2			GPIO_EC_KSO_02_INV
-#define GPIO_PACKET_MODE_EN		GPIO_EC_H1_PACKET_MODE
-#define GPIO_PCH_WAKE_L			GPIO_EC_PCH_WAKE_ODL
-#define GPIO_PCH_PWRBTN_L		GPIO_EC_PCH_PWR_BTN_ODL
-#define GPIO_PCH_RSMRST_L		GPIO_EC_PCH_RSMRST_ODL
-#define GPIO_PCH_RTCRST			GPIO_EC_PCH_RTCRST
-#define GPIO_PCH_SLP_S0_L		GPIO_SLP_S0_L
-#define GPIO_PCH_SLP_S3_L		GPIO_SLP_S3_L
-#define GPIO_PCH_DSW_PWROK		GPIO_EC_PCH_DSW_PWROK
-#define GPIO_POWER_BUTTON_L		GPIO_H1_EC_PWR_BTN_ODL
-#define GPIO_RSMRST_L_PGOOD		GPIO_PG_EC_RSMRST_ODL
-#define GPIO_CPU_PROCHOT		GPIO_EC_PROCHOT_ODL
-#define GPIO_SYS_RESET_L		GPIO_SYS_RST_ODL
-#define GPIO_WP_L			GPIO_EC_WP_L
-#define GPIO_USB_C1_BC12_INT_ODL	GPIO_USB_C1_MIX_INT_ODL
-
-/* I2C Bus Configuration */
-#define CONFIG_I2C
-#define I2C_PORT_USB_C0		NPCX_I2C_PORT1_0
-#define I2C_PORT_USB_C1		NPCX_I2C_PORT2_0
-#define I2C_PORT_USB_1_MIX	NPCX_I2C_PORT3_0
-#define I2C_PORT_POWER		NPCX_I2C_PORT5_0
-#define I2C_PORT_EEPROM		NPCX_I2C_PORT7_0
-
-#define I2C_PORT_BATTERY	I2C_PORT_POWER
-#define I2C_PORT_CHARGER	I2C_PORT_EEPROM
-
-#define I2C_ADDR_EEPROM_FLAGS	0x50
-#define CONFIG_I2C_CONTROLLER
-
-#define CONFIG_DEBUG_ASSERT_BRIEF
-
-/* Disable volume button command in EC console */
-#undef  CONFIG_CMD_BUTTON
-
-/* Disable volume button in ectool */
-#undef CONFIG_HOSTCMD_BUTTON
-
-#ifndef __ASSEMBLER__
-
-#include "gpio_signal.h"
-#include "registers.h"
-
-#include "usbc_config.h"
-
-enum battery_type {
-	BATTERY_FUJITSU_CP813907,
-	BATTERY_NVT_CP813907,
-	BATTERY_TYPE_COUNT
-};
-
-enum pwm_channel {
-	PWM_CH_FAN,
-	PWM_CH_KBLIGHT,
-	PWM_CH_COUNT
-};
-
-void board_reset_pd_mcu(void);
-
-#endif /* !__ASSEMBLER__ */
-
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/chronicler/build.mk b/board/chronicler/build.mk
deleted file mode 100644
index c0daa31eaa..0000000000
--- a/board/chronicler/build.mk
+++ /dev/null
@@ -1,19 +0,0 @@
-# -*- makefile -*-
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-#
-
-CHIP:=npcx
-CHIP_FAMILY:=npcx7
-CHIP_VARIANT:=npcx7m7fc
-BASEBOARD:=volteer
-
-board-y=board.o
-board-y+=battery.o
-board-y+=cbi.o
-board-y+=led.o
-board-y+=keyboard.o
-board-y+=usbc_config.o
diff --git a/board/chronicler/cbi.c b/board/chronicler/cbi.c
deleted file mode 100644
index 210207eeac..0000000000
--- a/board/chronicler/cbi.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Features common to ECOS and Zephyr */
-#include "common.h"
-#include "cbi.h"
-#include "cbi_ec_fw_config.h"
-#include "keyboard_raw.h"
-#include "usbc_config.h"
-
-/******************************************************************************/
-/*
- * FW_CONFIG defaults for Chronicler if the CBI data is not initialized.
- */
-union volteer_cbi_fw_config fw_config_defaults = {
-	.usb_db = DB_USB3_ACTIVE,
-};
-
-__override void board_cbi_init(void)
-{
-	if ((!IS_ENABLED(TEST_BUILD) && !ec_cfg_has_numeric_pad()) ||
-	    get_board_id() <= 2)
-		keyboard_raw_set_cols(KEYBOARD_COLS_NO_KEYPAD);
-}
diff --git a/board/chronicler/ec.tasklist b/board/chronicler/ec.tasklist
deleted file mode 100644
index c7a977f0ff..0000000000
--- a/board/chronicler/ec.tasklist
+++ /dev/null
@@ -1,25 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * See CONFIG_TASK_LIST in config.h for details.
- */
-
-#define CONFIG_TASK_LIST \
-	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \
-	TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \
-	TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \
-	TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
-	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
-	TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \
-	TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE)
diff --git a/board/chronicler/gpio.inc b/board/chronicler/gpio.inc
deleted file mode 100644
index dc00e3eddf..0000000000
--- a/board/chronicler/gpio.inc
+++ /dev/null
@@ -1,179 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first. */
-
-/* Wake Source interrupts */
-GPIO_INT(EC_LID_OPEN,          PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)
-GPIO_INT(EC_WP_L,              PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
-GPIO_INT(H1_EC_PWR_BTN_ODL,    PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt)
-GPIO_INT(ACOK_OD,              PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
-
-/* Power sequencing interrupts */
-GPIO_INT(SLP_S0_L,             PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
-#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3
-GPIO_INT(SLP_S3_L,             PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
-#endif
-GPIO_INT(SLP_SUS_L,            PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PG_EC_RSMRST_ODL,     PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PG_EC_DSW_PWROK,      PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PG_EC_ALL_SYS_PWRGD,  PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
-
-/* USB-C interrupts */
-GPIO_INT(USB_C0_TCPC_INT_ODL,	PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event)
-GPIO_INT(USB_C1_TCPC_INT_ODL,	PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event)
-
-GPIO_INT(USB_C0_PPC_INT_ODL,	PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt)
-GPIO_INT(USB_C1_PPC_INT_ODL,	PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt)
-
-GPIO_INT(USB_C0_BC12_INT_ODL,	PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt)
-GPIO_INT(USB_C1_MIX_INT_ODL,	PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt)
-
-/* HDMI interrupts */
-
-/* Power Sequencing Signals */
-GPIO(EN_PP3300_A,              PIN(A, 3), GPIO_OUT_LOW)
-GPIO(EN_PP5000_A,              PIN(A, 4), GPIO_OUT_LOW)
-GPIO(EN_PPVAR_VCCIN,           PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */
-GPIO(EC_PCH_DSW_PWROK,         PIN(C, 0), GPIO_OUT_LOW)
-
-/* Other wake sources */
-/*
- * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an
- * interrupt handler because it is automatically handled by the PSL.
- *
- * We need to lock the setting so this gpio can't be reconfigured to overdrive
- * the real reset signal. (This is the PSL input pin not the real reset pin).
- */
-GPIO(EC_RST_ODL,		PIN(0, 2), GPIO_INT_BOTH |
-					   GPIO_HIB_WAKE_HIGH |
-					   GPIO_LOCKED)
-
-/* AP/PCH Signals */
-GPIO(EC_PCH_SYS_PWROK,         PIN(3, 7), GPIO_OUT_LOW)
-GPIO(EC_PCH_RSMRST_ODL,        PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */
-GPIO(EC_PCH_PWR_BTN_ODL,       PIN(C, 1), GPIO_ODR_HIGH)
-GPIO(EC_PCH_RTCRST,            PIN(7, 6), GPIO_OUT_LOW)
-GPIO(EC_PCH_WAKE_ODL,          PIN(7, 4), GPIO_ODR_HIGH)
-GPIO(EC_ENTERING_RW,           PIN(E, 3), GPIO_OUT_LOW)
-GPIO(EC_PROCHOT_ODL,           PIN(6, 3), GPIO_ODR_HIGH)
-GPIO_INT(EC_PROCHOT_IN_L,      PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt)
-GPIO(SYS_RST_ODL,              PIN(C, 5), GPIO_ODR_HIGH)
-
-GPIO(EC_PCH_INT_ODL,           PIN(B, 0), GPIO_ODR_HIGH)
-
-/* USB and USBC Signals */
-GPIO(EN_PP5000_USBA,		PIN(C, 6), GPIO_OUT_LOW)	/* Enable USB-A charging - all ports */
-GPIO(USB_A_LOW_PWR_OD,		PIN(6, 6), GPIO_ODR_LOW)	/* Don't limit USB-A charging by default - all ports */
-GPIO(USB_C1_RT_RST_ODL,		PIN(8, 3), GPIO_ODR_LOW)
-GPIO(USB_C0_OC_ODL,		PIN(B, 1), GPIO_ODR_HIGH)
-GPIO(USB_C1_OC_ODL,		PIN(5, 0), GPIO_ODR_HIGH)
-/* There is currently no need to service this interrupt. */
-GPIO(USB_C1_RT_INT_ODL,		PIN(F, 3), GPIO_INPUT)
-GPIO(USB_C1_FRS_EN, 		PIN(9, 4), GPIO_OUT_LOW)
-
-/* Don't have a load switch for retimer */
-UNIMPLEMENTED(USB_C1_LS_EN)
-
-/* Misc Signals */
-GPIO(EC_H1_PACKET_MODE,		PIN(7, 5), GPIO_OUT_LOW)	/* H1 Packet Mode */
-/*
- * Despite their names, M2_SSD_PLN and M2_SSD_PLA are active-low, and M2_SSD_PLN
- * is open-drain.
- * TODO(b/138954381): Change these names when they change on the schematic.
- */
-GPIO(M2_SSD_PLN,		PIN(A, 0), GPIO_ODR_HIGH)	/* SSD power-loss notification */
-GPIO(M2_SSD_PLA,		PIN(7, 0), GPIO_INPUT)		/* SSD power-loss acknowledgment */
-GPIO(CCD_MODE_ODL,		PIN(E, 5), GPIO_INPUT)		/* Case Closed Debug Mode */
-GPIO(EC_SLP_S0IX,		PIN(7, 2), GPIO_INPUT | GPIO_PULL_UP)
-
-/* LED */
-GPIO(C0_CHARGE_LED_AMBER_L,	PIN(C, 3), GPIO_OUT_HIGH)	/* Amber C0 port */
-GPIO(C0_CHARGE_LED_WHITE_L,	PIN(C, 4), GPIO_OUT_HIGH)	/* White C0 port */
-GPIO(C1_CHARGE_LED_AMBER_L,	PIN(6, 0), GPIO_OUT_HIGH)	/* Amber C1 port */
-GPIO(C1_CHARGE_LED_WHITE_L,	PIN(C, 2), GPIO_OUT_HIGH)	/* White C1 port */
-
-/* Unused signals */
-GPIO(CHARGER_INT_L,		PIN(7, 3), GPIO_INPUT)		/* Interrupt not used from ISL9241, on board pull-up */
-GPIO(EC_GP_SEL0_ODL,		PIN(B, 6), GPIO_OUT_LOW) 	/* Cannot be configured as input, drive output low, don't rely on the default setting of PxDOUT register */
-GPIO(CPU_C10_GATE_L, 		PIN(6, 7), GPIO_INPUT)		/* Unused power sequence signal from AP. Has an on-board pull-down. */
-GPIO(EN_PP5000_USB_AG,		PIN(A, 7), GPIO_INPUT | GPIO_PULL_UP) /* Unconnected power sequencing signal */
-GPIO(UNUSED_GPIO41,		PIN(4, 1), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIOF2,		PIN(F, 2), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO96,		PIN(9, 6), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO34,		PIN(3, 4), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO56,		PIN(5, 6), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIOD4,		PIN(D, 4), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO95,		PIN(9, 5), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO81,		PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO93,		PIN(9, 3), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIO97,		PIN(9, 7), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(UNUSED_GPIOB5,		PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V)	/* Unused I2C port, Set input only */
-GPIO(UNUSED_GPIOB4,		PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V)	/* Unused I2C port, Set input only */
-/* Only connected to test points */
-GPIO(EC_KB_BL_EN,		PIN(8, 6), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(EC_ESPI_ALERT_L,		PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP)
-
-/*
- * eDP backlight - both PCH and EC have enable pins that must be high
- * for the backlight to turn on. Default state is high, and can be turned
- * off during sleep states.
- */
-GPIO(EC_EDP_BL_EN,             PIN(D, 3), GPIO_OUT_HIGH)
-
-/* I2C pins - Alternate function below configures I2C module on these pins */
-GPIO(EC_I2C1_USB_C0_SCL,       PIN(9, 0), GPIO_INPUT)
-GPIO(EC_I2C1_USB_C0_SDA,       PIN(8, 7), GPIO_INPUT)
-GPIO(EC_I2C2_USB_C1_SCL,       PIN(9, 2), GPIO_INPUT)
-GPIO(EC_I2C2_USB_C1_SDA,       PIN(9, 1), GPIO_INPUT)
-GPIO(EC_I2C3_USB_1_MIX_SCL,    PIN(D, 1), GPIO_INPUT)
-GPIO(EC_I2C3_USB_1_MIX_SDA,    PIN(D, 0), GPIO_INPUT)
-GPIO(EC_I2C5_BATTERY_SCL,      PIN(3, 3), GPIO_INPUT)
-GPIO(EC_I2C5_BATTERY_SDA,      PIN(3, 6), GPIO_INPUT)
-GPIO(EC_I2C7_EEPROM_PWR_SCL_R, PIN(B, 3), GPIO_INPUT)
-GPIO(EC_I2C7_EEPROM_PWR_SDA_R, PIN(B, 2), GPIO_INPUT)
-
-/* Battery signals */
-GPIO(EC_BATT_PRES_ODL, 		PIN(E, 1), GPIO_INPUT)
-
-/* Alternate functions GPIO definitions */
-ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0)                   /* I2C1 SCL / I2C2 */
-ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0)                                     /* I2C1 SDA */
-ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0)                            /* I2C3 */
-ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0)                            /* I2C5 */
-ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0)                            /* I2C7 */
-
-/* Fan signals */
-GPIO(EN_PP5000_FAN,            PIN(6, 1), GPIO_OUT_LOW)
-ALTERNATE(PIN_MASK(B, BIT(7)), 0, MODULE_PWM, 0)	/* FAN_PWM */
-ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0)	/* FAN_SPEED_TACH */
-
-/* Keyboard pins */
-#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP)
-ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */
-ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */
-ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */
-GPIO(EC_KSO_02_INV, PIN(1, 7),                        GPIO_OUT_LOW)  /* KSO_02 */
-ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */
-ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */
-ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */
-ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0)                     /* EC_KB_BL_PWM */
-
-/* UART */
-ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0)                           /* UART from EC to Servo */
-
-/* Power Switch Logic (PSL) inputs */
-ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0)                    /* GPIOD2 = EC_LID_OPEN */
-ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0)  /* GPIO00 = ACOK_OD,
-                                                                       GPIO01 = H1_EC_PWR_BTN_ODL
-                                                                       GPIO02 = EC_RST_ODL */
-
-/* Temperature sensors */
-ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */
-ALTERNATE(PIN(F, 1), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */
-
diff --git a/board/chronicler/keyboard.c b/board/chronicler/keyboard.c
deleted file mode 100644
index b9cc378295..0000000000
--- a/board/chronicler/keyboard.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Keyboard config common to ECOS and zephyr */
-
-#include "keyboard_raw.h"
-#include "keyboard_scan.h"
-#include "timer.h"
-
-/* Keyboard scan setting */
-__override struct keyboard_scan_config keyscan_config = {
-	/* Increase from 50 us, because KSO_02 passes through the H1. */
-	.output_settle_us = 80,
-	/* Other values should be the same as the default configuration. */
-	.debounce_down_us = 9 * MSEC,
-	.debounce_up_us = 30 * MSEC,
-	.scan_period_us = 3 * MSEC,
-	.min_post_scan_delay_us = 1000,
-	.poll_timeout_us = 100 * MSEC,
-	.actual_key_mask = {
-		0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
-		0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca  /* full set */
-	},
-};
diff --git a/board/chronicler/led.c b/board/chronicler/led.c
deleted file mode 100644
index dfa7fefa1b..0000000000
--- a/board/chronicler/led.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Power and battery LED control for Chronicler
- */
-
-#include "battery.h"
-#include "charge_manager.h"
-#include "charge_state.h"
-#include "chipset.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "host_command.h"
-#include "led_common.h"
-#include "hooks.h"
-
-#define BAT_LED_ON 0
-#define BAT_LED_OFF 1
-
-#define POWER_LED_ON 0
-#define POWER_LED_OFF 1
-
-#define LED_CYCLE_TIME_MS   (2 * 1000)
-#define LED_TICKS_PER_CYCLE (LED_CYCLE_TIME_MS / HOOK_TICK_INTERVAL_MS)
-#define LED_ON_TIME_MS      (1 * 1000)
-#define LED_ON_TICKS        (LED_ON_TIME_MS / HOOK_TICK_INTERVAL_MS)
-
-const enum ec_led_id supported_led_ids[] = {
-	EC_LED_ID_LEFT_LED,
-	EC_LED_ID_RIGHT_LED,
-};
-
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-enum led_color {
-	LED_OFF = 0,
-	LED_AMBER,
-	LED_WHITE,
-	LED_COLOR_COUNT  /* Number of colors, not a color itself */
-};
-
-enum led_port {
-	RIGHT_PORT = 0,
-	LEFT_PORT
-};
-
-static void led_set_color_battery(enum led_port port, enum led_color color)
-{
-	enum gpio_signal amber_led, white_led;
-
-	amber_led = (port == RIGHT_PORT ? GPIO_C0_CHARGE_LED_AMBER_L :
-				 GPIO_C1_CHARGE_LED_AMBER_L);
-	white_led = (port == RIGHT_PORT ? GPIO_C0_CHARGE_LED_WHITE_L :
-				 GPIO_C1_CHARGE_LED_WHITE_L);
-
-	switch (color) {
-	case LED_WHITE:
-		gpio_set_level(white_led, BAT_LED_ON);
-		gpio_set_level(amber_led, BAT_LED_OFF);
-		break;
-	case LED_AMBER:
-		gpio_set_level(white_led, BAT_LED_OFF);
-		gpio_set_level(amber_led, BAT_LED_ON);
-		break;
-	case LED_OFF:
-		gpio_set_level(white_led, BAT_LED_OFF);
-		gpio_set_level(amber_led, BAT_LED_OFF);
-		break;
-	default:
-		break;
-	}
-}
-
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
-{
-	switch (led_id) {
-	case EC_LED_ID_LEFT_LED:
-		brightness_range[EC_LED_COLOR_WHITE] = 1;
-		brightness_range[EC_LED_COLOR_AMBER] = 1;
-		break;
-	case EC_LED_ID_RIGHT_LED:
-		brightness_range[EC_LED_COLOR_WHITE] = 1;
-		brightness_range[EC_LED_COLOR_AMBER] = 1;
-		break;
-	default:
-		break;
-	}
-}
-
-int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
-{
-	switch (led_id) {
-	case EC_LED_ID_LEFT_LED:
-		if (brightness[EC_LED_COLOR_WHITE] != 0)
-			led_set_color_battery(LEFT_PORT, LED_WHITE);
-		else if (brightness[EC_LED_COLOR_AMBER] != 0)
-			led_set_color_battery(LEFT_PORT, LED_AMBER);
-		else
-			led_set_color_battery(LEFT_PORT, LED_OFF);
-		break;
-	case EC_LED_ID_RIGHT_LED:
-		if (brightness[EC_LED_COLOR_WHITE] != 0)
-			led_set_color_battery(RIGHT_PORT, LED_WHITE);
-		else if (brightness[EC_LED_COLOR_AMBER] != 0)
-			led_set_color_battery(RIGHT_PORT, LED_AMBER);
-		else
-			led_set_color_battery(RIGHT_PORT, LED_OFF);
-		break;
-	default:
-		return EC_ERROR_PARAM1;
-	}
-
-	return EC_SUCCESS;
-}
-
-/*
- * Set active charge port color to the parameter, turn off all others.
- * If no port is active (-1), turn off all LEDs.
- */
-static void set_active_port_color(enum led_color color)
-{
-	int port = charge_manager_get_active_charge_port();
-
-	if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED))
-		led_set_color_battery(RIGHT_PORT,
-				(port == RIGHT_PORT) ? color : LED_OFF);
-	if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
-		led_set_color_battery(LEFT_PORT,
-				(port == LEFT_PORT) ? color : LED_OFF);
-}
-
-static void led_set_battery(void)
-{
-	static int battery_ticks;
-	static int suspend_ticks;
-	uint32_t chflags = charge_get_flags();
-
-	battery_ticks++;
-
-	/*
-	 * Override battery LEDs for Chronicler, Chronicler doesn't
-	 * have power LED, blinking both two side battery white
-	 * LEDs to indicate system suspend without charging state.
-	 */
-	if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) &&
-		charge_get_state() != PWR_STATE_CHARGE) {
-
-		suspend_ticks++;
-
-		led_set_color_battery(RIGHT_PORT, suspend_ticks & 0x4 ?
-					  LED_WHITE : LED_OFF);
-		led_set_color_battery(LEFT_PORT, suspend_ticks & 0x4 ?
-					  LED_WHITE : LED_OFF);
-		return;
-	}
-
-	suspend_ticks = 0;
-
-	switch (charge_get_state()) {
-	case PWR_STATE_CHARGE:
-		/* Always indicate when charging, even in suspend. */
-		set_active_port_color(LED_AMBER);
-		break;
-	case PWR_STATE_DISCHARGE:
-		if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) {
-			if (charge_get_percent() < 10)
-				led_set_color_battery(RIGHT_PORT,
-					(battery_ticks % LED_TICKS_PER_CYCLE
-					 < LED_ON_TICKS) ? LED_WHITE : LED_OFF);
-			else
-				led_set_color_battery(RIGHT_PORT, LED_OFF);
-		}
-
-		if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
-			led_set_color_battery(LEFT_PORT, LED_OFF);
-		break;
-	case PWR_STATE_ERROR:
-		set_active_port_color((battery_ticks & 0x2) ?
-				LED_WHITE : LED_OFF);
-		break;
-	case PWR_STATE_CHARGE_NEAR_FULL:
-		set_active_port_color(LED_WHITE);
-		break;
-	case PWR_STATE_IDLE: /* External power connected in IDLE */
-		if (chflags & CHARGE_FLAG_FORCE_IDLE)
-			set_active_port_color((battery_ticks %
-				LED_TICKS_PER_CYCLE < LED_ON_TICKS) ?
-				LED_AMBER : LED_OFF);
-		else
-			set_active_port_color(LED_WHITE);
-		break;
-	default:
-		/* Other states don't alter LED behavior */
-		break;
-	}
-}
-
-/* Called by hook task every TICK */
-static void led_tick(void)
-{
-	led_set_battery();
-}
-DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT);
diff --git a/board/chronicler/usbc_config.c b/board/chronicler/usbc_config.c
deleted file mode 100644
index b378299f86..0000000000
--- a/board/chronicler/usbc_config.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Volteer family-specific USB-C configuration */
-#include "common.h"
-#include "cbi_ec_fw_config.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "system.h"
-#include "timer.h"
-#include "usbc_config.h"
-#include "usbc_ppc.h"
-#include "usb_mux.h"
-#include "driver/bc12/pi3usb9201_public.h"
-#include "driver/ppc/sn5s330_public.h"
-#include "driver/ppc/syv682x_public.h"
-#include "driver/retimer/bb_retimer_public.h"
-#include "driver/retimer/ps8811.h"
-#include "driver/tcpm/ps8xxx_public.h"
-#include "driver/tcpm/rt1715_public.h"
-#include "driver/tcpm/tusb422_public.h"
-#include "driver/tcpm/tcpci.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/*
- * USB3 DB mux configuration - the top level mux still needs to be set to the
- * virtual_usb_mux_driver so the AP gets notified of mux changes and updates
- * the TCSS configuration on state changes.
- */
-static const struct usb_mux usbc1_usb3_db_retimer = {
-	.usb_port = USBC_PORT_C1,
-	.driver = &tcpci_tcpm_usb_mux_driver,
-	.hpd_update = &ps8xxx_tcpc_update_hpd_status,
-	.next_mux = NULL,
-};
-
-/******************************************************************************/
-/* USBC PPC configuration */
-struct ppc_config_t ppc_chips[] = {
-	[USBC_PORT_C0] = {
-		.i2c_port = I2C_PORT_USB_C0,
-		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
-		.drv = &sn5s330_drv,
-	},
-	[USBC_PORT_C1] = {
-		.i2c_port = I2C_PORT_USB_C1,
-		.i2c_addr_flags = SYV682X_ADDR0_FLAGS,
-		.frs_en = GPIO_USB_C1_FRS_EN,
-		.drv = &syv682x_drv,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-/******************************************************************************/
-/* PPC support routines */
-void ppc_interrupt(enum gpio_signal signal)
-{
-	switch (signal) {
-	case GPIO_USB_C0_PPC_INT_ODL:
-		sn5s330_interrupt(USBC_PORT_C0);
-		break;
-	case GPIO_USB_C1_PPC_INT_ODL:
-		syv682x_interrupt(USBC_PORT_C1);
-	default:
-		break;
-	}
-}
-
-/******************************************************************************/
-/* USBC TCPC configuration */
-const struct tcpc_config_t tcpc_config[] = {
-	[USBC_PORT_C0] = {
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_USB_C0,
-			.addr_flags = RT1715_I2C_ADDR_FLAGS,
-		},
-		.drv = &rt1715_tcpm_drv,
-	},
-	[USBC_PORT_C1] = {
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_USB_C1,
-			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
-		},
-		.flags = TCPC_FLAGS_TCPCI_REV2_0 |
-			TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V,
-		.drv = &ps8xxx_tcpm_drv,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
-BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
-
-/******************************************************************************/
-/* USB-A charging control */
-
-const int usb_port_enable[USB_PORT_COUNT] = {
-	GPIO_EN_PP5000_USBA,
-};
-
-/******************************************************************************/
-/* USBC mux configuration - Tiger Lake includes internal mux */
-const struct usb_mux usb_muxes[] = {
-	[USBC_PORT_C0] = {
-		.usb_port = USBC_PORT_C0,
-		.driver = &virtual_usb_mux_driver,
-		.hpd_update = &virtual_hpd_update,
-	},
-	[USBC_PORT_C1] = {
-		.usb_port = USBC_PORT_C1,
-		.driver = &virtual_usb_mux_driver,
-		.hpd_update = &virtual_hpd_update,
-		.next_mux = &usbc1_usb3_db_retimer,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
-
-static void ps8815_reset(void)
-{
-	int val;
-
-	gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0);
-	msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
-			   PS8815_PWR_H_RST_H_DELAY_MS));
-	gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1);
-	msleep(PS8815_FW_INIT_DELAY_MS);
-
-	/*
-	 * b/144397088
-	 * ps8815 firmware 0x01 needs special configuration
-	 */
-
-	CPRINTS("%s: patching ps8815 registers", __func__);
-
-	if (i2c_read8(I2C_PORT_USB_C1,
-		      PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS)
-		CPRINTS("ps8815: reg 0x0f was %02x", val);
-
-	if (i2c_write8(I2C_PORT_USB_C1,
-		       PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, 0x31) == EC_SUCCESS)
-		CPRINTS("ps8815: reg 0x0f set to 0x31");
-
-	if (i2c_read8(I2C_PORT_USB_C1,
-		      PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS)
-		CPRINTS("ps8815: reg 0x0f now %02x", val);
-}
-
-/*
- * Adjust USB3 settings to improve signal integrity.
- * See b/194985848.
- */
-__override void board_ps8xxx_tcpc_init(int port)
-{
-	int rv;
-
-	CPRINTS("%s", __func__);
-
-	/* TX1 EQ 19db / TX2 EQ 19db */
-	rv = tcpc_addr_write(port, PS8751_I2C_ADDR1_P1_FLAGS, 0x20, 0x77);
-	/* RX1 EQ 12db / RX2 EQ 13db */
-	rv |= tcpc_addr_write(port, PS8751_I2C_ADDR1_P1_FLAGS, 0x22, 0x32);
-	/* Swing level for upstream port output */
-	rv |= tcpc_addr_write(port, PS8751_I2C_ADDR1_P1_FLAGS, 0xc4, 0x03);
-
-	if (rv)
-		CPRINTS("%s fail!", __func__);
-}
-
-/* Called on AP S5 -> S0 transition */
-void board_ps8811_init(void)
-{
-	int rv;
-	const int port = I2C_PORT_USB_1_MIX;
-	const int addr = PS8811_I2C_ADDR_FLAGS0 + PS8811_REG_PAGE1;
-
-	CPRINTS("%s", __func__);
-
-	/* AEQ 12db */
-	rv = i2c_write8(port, addr, 0x01, 0x26);
-	/* ADE 2.1db */
-	rv |= i2c_write8(port, addr, 0x02, 0x60);
-	/* BEQ 10.5db */
-	rv |= i2c_write8(port, addr, 0x05, 0x16);
-	/* BDE 2.1db */
-	rv |= i2c_write8(port, addr, 0x06, 0x63);
-	/* Channel A swing level */
-	rv |= i2c_write8(port, addr, 0x66, 0x20);
-	/* Channel B swing level */
-	rv |= i2c_write8(port, addr, 0xa4, 0x03);
-	/* PS level foe B channel */
-	rv |= i2c_write8(port, addr, 0xa5, 0x83);
-	/* DE level foe B channel */
-	rv |= i2c_write8(port, addr, 0xa6, 0x14);
-
-	if (rv)
-		CPRINTS("%s fail!", __func__);
-}
-DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_ps8811_init, HOOK_PRIO_LAST);
-
-void board_reset_pd_mcu(void)
-{
-	/* No reset available for TCPC on port 0 */
-	/* Daughterboard specific reset for port 1 */
-	ps8815_reset();
-	usb_mux_hpd_update(USBC_PORT_C1, USB_PD_MUX_HPD_LVL_DEASSERTED |
-					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
-}
-
-static void board_tcpc_init(void)
-{
-	/* Don't reset TCPCs after initial reset */
-	if (!system_jumped_late())
-		board_reset_pd_mcu();
-
-	/* Enable PPC interrupts. */
-	gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
-
-	/* Enable TCPC interrupts. */
-	gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
-
-	/* Enable BC1.2 interrupts. */
-	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
-}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
-
-/******************************************************************************/
-/* BC1.2 charger detect configuration */
-const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
-	[USBC_PORT_C0] = {
-		.i2c_port = I2C_PORT_USB_C0,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
-	},
-	[USBC_PORT_C1] = {
-		.i2c_port = I2C_PORT_USB_C1,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
-
-/******************************************************************************/
-/* TCPC support routines */
-uint16_t tcpc_get_alert_status(void)
-{
-	uint16_t status = 0;
-
-	/*
-	 * Check which port has the ALERT line set
-	 */
-	if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL))
-		status |= PD_STATUS_TCPC_ALERT_0;
-	if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL))
-		status |= PD_STATUS_TCPC_ALERT_1;
-
-	return status;
-}
-
-/******************************************************************************/
-
-int ppc_get_alert_status(int port)
-{
-	if (port == USBC_PORT_C0)
-		return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
-	else
-		return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
-}
diff --git a/board/chronicler/usbc_config.h b/board/chronicler/usbc_config.h
deleted file mode 100644
index 55dfce7621..0000000000
--- a/board/chronicler/usbc_config.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* volteer board-specific USB-C configuration */
-
-#ifndef __CROS_EC_USBC_CONFIG_H
-#define __CROS_EC_USBC_CONFIG_H
-
-enum usbc_port {
-	USBC_PORT_C0 = 0,
-	USBC_PORT_C1,
-	USBC_PORT_COUNT
-};
-
-/* Configure the USB3 daughterboard type */
-void config_usb3_db_type(void);
-
-#endif /* __CROS_EC_USBC_CONFIG_H */
diff --git a/board/chronicler/vif_override.xml b/board/chronicler/vif_override.xml
deleted file mode 100644
index f871a543e3..0000000000
--- a/board/chronicler/vif_override.xml
+++ /dev/null
@@ -1,114 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-<VIF xmlns="http://usb.org/VendorInfoFile.xsd">
-  <Model_Part_Number>Volteer RT1715</Model_Part_Number>
-  <Product_Revision>0</Product_Revision>
-  <TID>0</TID>
-  <Product>
-    <!-- Information about TGL USB4 provided by Intel. See b/172963736 -->
-    <USB4_Num_Internal_Host_Controllers value="1" />
-    <USB4_Num_PCIe_DN_Bridges value="0" />
-    <USB4RouterList>
-      <Usb4Router>
-        <USB4_Router_ID value="1" />
-        <USB4_Silicon_VID value="32903">8087</USB4_Silicon_VID>
-        <USB4_Num_Lane_Adapters value="4" />
-        <USB4_Num_USB3_DN_Adapters value="1" />
-        <USB4_Num_DP_IN_Adapters value="1" />
-        <USB4_Num_DP_OUT_Adapters value="0" />
-        <USB4_Num_PCIe_DN_Adapters value="4" />
-        <USB4_TBT3_Not_Supported value="0">TBT3 Compatible</USB4_TBT3_Not_Supported>
-        <USB4_PCIe_Wake_Supported value="true" />
-        <USB4_USB3_Wake_Supported value="false" />
-        <USB4_Num_Unused_Adapters value="0" />
-        <USB4_TBT3_VID value="32903">8087</USB4_TBT3_VID>
-        <USB4_PCIe_Switch_Vendor_ID value="32902">8086</USB4_PCIe_Switch_Vendor_ID>
-        <USB4_PCIe_Switch_Device_ID value="39451">9A1B</USB4_PCIe_Switch_Device_ID>
-      </Usb4Router>
-      <Usb4Router>
-        <USB4_Router_ID value="0" />
-        <USB4_Silicon_VID value="32903">8087</USB4_Silicon_VID>
-        <USB4_Num_Lane_Adapters value="2" />
-        <USB4_Num_USB3_DN_Adapters value="1" />
-        <USB4_Num_DP_IN_Adapters value="0" />
-        <USB4_Num_DP_OUT_Adapters value="0" />
-        <USB4_Num_PCIe_DN_Adapters value="0" />
-        <USB4_TBT3_Not_Supported value="1">Not TBT3-Compatible</USB4_TBT3_Not_Supported>
-        <USB4_PCIe_Wake_Supported value="false" />
-        <USB4_USB3_Wake_Supported value="false" />
-        <USB4_Num_Unused_Adapters value="0" />
-      </Usb4Router>
-    </USB4RouterList>
-  </Product>
-  <Component>
-    <!-- Port 0 is USB3-only. -->
-    <USB4_Supported value="false">NO</USB4_Supported>
-    <Host_Truncates_DP_For_tDHPResponse value="false" />
-    <SrcPdoList>
-      <SrcPDO>
-        <!-- Add in missing fields for SrcPdo0, derived from SYV682B datasheet. -->
-        <Src_PD_OCP_OC_Debounce value="50">50 msec</Src_PD_OCP_OC_Debounce>
-        <Src_PD_OCP_OC_Threshold value="360">3600 mA</Src_PD_OCP_OC_Threshold>
-      </SrcPDO>
-    </SrcPdoList>
-    <DFP_VDO_Port_Number value="0" />
-    <Modal_Operation_Supported_SOP value="false" />
-  </Component>
-  <Component>
-    <USB4_Max_Speed value="1">Gen 3 (40Gb)</USB4_Max_Speed>
-    <USB4_DFP_Supported value="true" />
-    <USB4_UFP_Supported value="false" />
-    <USB4_USB3_Tunneling_Supported value="true" />
-    <USB4_DP_Tunneling_Supported value="true" />
-    <USB4_PCIe_Tunneling_Supported value="true" />
-    <USB4_TBT3_Compatibility_Supported value="true" />
-    <USB4_CL1_State_Supported value="true" />
-    <USB4_CL2_State_Supported value="true" />
-    <USB4_Num_Retimers value="1" />
-    <USB4_DP_Bit_Rate value="3">HBR3</USB4_DP_Bit_Rate>
-    <USB4_Num_DP_Lanes value="4">4 Lanes</USB4_Num_DP_Lanes>
-    <USB4_Lane_0_Adapter value="1" />
-    <Host_Supports_USB_Data value="true" />
-    <Host_Speed value="2">USB 3.2 Gen 2x1</Host_Speed>
-    <Host_Contains_Captive_Retimer value="true" />
-    <Host_Truncates_DP_For_tDHPResponse value="false" />
-    <Host_Suspend_Supported value="true" />
-    <Is_DFP_On_Hub value="false" />
-    <USB_Suspend_May_Be_Cleared value="true" />
-    <FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="3">3A @ 5V</FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
-    <FR_Swap_Supported_As_Initial_Sink value="true" />
-    <SrcPdoList>
-      <SrcPDO>
-        <!-- Add in missing fields for SrcPdo0, derived from SYV682B datasheet. -->
-        <Src_PD_OCP_OC_Debounce value="50">50 msec</Src_PD_OCP_OC_Debounce>
-        <Src_PD_OCP_OC_Threshold value="360">3600 mA</Src_PD_OCP_OC_Threshold>
-      </SrcPDO>
-    </SrcPdoList>
-    <Data_Capable_As_USB_Host_SOP value="true" />
-    <Data_Capable_As_USB_Device_SOP value="false" />
-    <!-- TODO(b/173028252): Figure out the appropriate Discover Identity ACK for
-         Volteer and update the EC and VIF accordingly. -->
-    <Product_Type_UFP_SOP value="3">PSD</Product_Type_UFP_SOP>
-    <Product_Type_DFP_SOP value="4">Alternate Mode Controller (AMC)</Product_Type_DFP_SOP>
-    <DFP_VDO_Port_Number value="1" />
-    <Modal_Operation_Supported_SOP value="true" />
-    <USB_VID_SOP value="6353">18D1</USB_VID_SOP>
-    <bcdDevice_SOP value="0">0000</bcdDevice_SOP>
-    <SVID_Fixed_SOP value="true" />
-    <Num_SVIDs_Min_SOP value="1" />
-    <Num_SVIDs_Max_SOP value="1" />
-    <SOPSVIDList>
-      <SOPSVID>
-        <SVID_SOP value="32903">8087</SVID_SOP>
-        <SVID_Modes_Fixed_SOP value="true" />
-        <SVID_Num_Modes_Min_SOP value="1" />
-        <SVID_Num_Modes_Max_SOP value="1" />
-        <SOPSVIDModeList>
-          <SOPSVIDMode>
-            <SVID_Mode_Enter_SOP value="true" />
-            <SVID_Mode_Recog_Value_SOP value="0">00000000</SVID_Mode_Recog_Value_SOP>
-          </SOPSVIDMode>
-        </SOPSVIDModeList>
-      </SOPSVID>
-    </SOPSVIDList>
-  </Component>
-</VIF>