diff options
author | Andrey Pronin <apronin@google.com> | 2022-01-26 12:47:14 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2022-02-16 09:32:06 +0000 |
commit | 43fa560eb5c519f1a5afabe1fb2374943fe88013 (patch) | |
tree | af638f5b29453da0b9f1bfc477799cc8d1bf0959 /board/cr50/tpm_nvmem_ops.h | |
parent | 76eba574138371ca7dfc5bb47133d032113770ee (diff) | |
download | chrome-ec-stabilize-14526.84.B-cr50_stab.tar.gz |
cr50: preserve ordely nv spaces over TPM resetstabilize-quickfix-14526.91.B-cr50_stabstabilize-14528.B-cr50_stabstabilize-14526.89.B-cr50_stabstabilize-14526.84.B-cr50_stabstabilize-14526.73.B-cr50_stabstabilize-14526.67.B-cr50_stabstabilize-14526.57.B-cr50_stabrelease-R100-14526.B-cr50_stab
This CL in case of unorderly TPM reset that doesn't also reset GSC
preserves RAM-backed values of orderly nv indices.
BUG=b:201101365
TEST=1) create an orderly counter
2) increment it
3) trigger EC reset
4) verify that the counter value was preserved
Cq-Depend: chromium:3417937
Change-Id: I799183ad06584055d025c2acf5f83ff2ded32d39
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3418122
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'board/cr50/tpm_nvmem_ops.h')
-rw-r--r-- | board/cr50/tpm_nvmem_ops.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/cr50/tpm_nvmem_ops.h b/board/cr50/tpm_nvmem_ops.h index ef1c5a07fc..da8036b16f 100644 --- a/board/cr50/tpm_nvmem_ops.h +++ b/board/cr50/tpm_nvmem_ops.h @@ -7,6 +7,8 @@ #ifndef __EC_BOARD_CR50_TPM_NVMEM_OPS_H #define __EC_BOARD_CR50_TPM_NVMEM_OPS_H +#define TPM_ORDERLY_STATE_SIZE 512 + enum tpm_read_rv { TPM_READ_SUCCESS, TPM_READ_NOT_FOUND, @@ -46,4 +48,8 @@ enum tpm_write_rv write_tpm_nvmem_hidden(uint16_t object_index, /* return size of hidden nvmem object, 0 if not found */ size_t read_tpm_nvmem_size(uint16_t obj_index); +void tpm_orderly_state_capture(char copy[TPM_ORDERLY_STATE_SIZE]); + +void tpm_orderly_state_restore(const char copy[TPM_ORDERLY_STATE_SIZE]); + #endif /* ! __EC_BOARD_CR50_TPM_NVMEM_OPS_H */ |