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| author | Keith Short <keithshort@chromium.org> | 2019-10-29 14:57:19 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-11-01 04:36:49 +0000 |
| commit | 28b8d229927d285043fcdaf5043456cf20865a7e (patch) | |
| tree | dffeaa97ed96df6a32e4afbe6a21035768ce7c2f /board/dragonegg | |
| parent | 7dece1affb2b8bcaa449743937c55774a0aa2ee0 (diff) | |
| download | chrome-ec-28b8d229927d285043fcdaf5043456cf20865a7e.tar.gz | |
tigerlake/icelake: add support for SYS_PWROK
Add code to pass through PG_EC_ALL_SYS_PWRGD from the platform to the
PCH signal PCH_SYS_PWROK.
These signals correspond to the Intel signal names ALL_SYS_PWRGD and
PCH_SYS_PWROK, respectively.
BUG=b:143373337
BRANCH=none
TEST=make buildall -j
Change-Id: Iff86508450a5bca8c97fb855fa1a3a586edd99ff
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881753
Commit-Queue: Sean Abraham <seanabraham@chromium.org>
Diffstat (limited to 'board/dragonegg')
| -rw-r--r-- | board/dragonegg/gpio.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/dragonegg/gpio.inc b/board/dragonegg/gpio.inc index 9b18d6f362..474bf49643 100644 --- a/board/dragonegg/gpio.inc +++ b/board/dragonegg/gpio.inc @@ -64,6 +64,10 @@ GPIO(EC_PCH_RSMRST_L, PIN(H, 0), GPIO_OUT_LOW) GPIO(EC_PROCHOT_ODL, PIN(D, 0), GPIO_ODR_HIGH) GPIO(PP5000_PG_OD, PIN(F, 0), GPIO_INPUT) +/* SYS_PWROK generation is done by the Dialog power good IC */ +UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD) +UNIMPLEMENTED(PCH_SYS_PWROK) + /* USB and USBC Signals */ GPIO(USB_OC_ODL, PIN(J, 6), GPIO_ODR_HIGH) GPIO(EN_USB_A_5V, PIN(G, 6), GPIO_OUT_LOW) |