ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

6 files changed, 0 insertions, 639 deletions

diff --git a/board/gingerbread/board.c b/board/gingerbread/board.c
deleted file mode 100644
index 6a2ae0c683..0000000000
--- a/board/gingerbread/board.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Gingerbread board-specific configuration */
-
-#include "common.h"
-#include "cros_board_info.h"
-#include "driver/ppc/sn5s330.h"
-#include "driver/tcpm/ps8xxx.h"
-#include "driver/tcpm/stm32gx.h"
-#include "driver/tcpm/tcpci.h"
-#include "driver/usb_mux/tusb1064.h"
-#include "ec_version.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "mp4245.h"
-#include "switch.h"
-#include "system.h"
-#include "task.h"
-#include "timer.h"
-#include "uart.h"
-#include "usb_descriptor.h"
-#include "usb_pd.h"
-#include "usbc_ppc.h"
-#include "usb_descriptor.h"
-#include "usb_pd_dp_ufp.h"
-#include "usb_pe_sm.h"
-#include "usb_prl_sm.h"
-#include "usb_tc_sm.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
-
-#define QUICHE_PD_DEBUG_LVL 1
-
-#ifdef SECTION_IS_RW
-#define CROS_EC_SECTION "RW"
-#else
-#define CROS_EC_SECTION "RO"
-#endif
-
-#ifdef SECTION_IS_RW
-/*
- * C1 port on gingerbread does not have a PPC. However, C0 port does have a PPC
- * and therefore PPC related config options are defined. Defining a null driver
- * here so that functions from usbc_ppc.c will correctly dereference to a NULL
- * function pointer.
- */
-const struct ppc_drv board_ppc_null_drv = {};
-
-static int pd_dual_role_init[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	PD_DRP_TOGGLE_ON,
-	PD_DRP_FORCE_SOURCE,
-};
-
-static void ppc_interrupt(enum gpio_signal signal)
-{
-	switch (signal) {
-	case GPIO_HOST_USBC_PPC_INT_ODL:
-		sn5s330_interrupt(USB_PD_PORT_HOST);
-		break;
-
-	default:
-		break;
-	}
-}
-
-static void tcpc_alert_event(enum gpio_signal s)
-{
-	int port = -1;
-
-	switch (s) {
-	case GPIO_USBC_DP_MUX_ALERT_ODL:
-		port = USB_PD_PORT_DP;
-		break;
-	default:
-		return;
-	}
-
-	schedule_deferred_pd_interrupt(port);
-}
-
-void hpd_interrupt(enum gpio_signal signal)
-{
-	usb_pd_hpd_edge_event(signal);
-}
-
-static void board_pwr_btn_interrupt(enum gpio_signal signal)
-{
-	baseboard_power_button_evt(gpio_get_level(signal));
-}
-#endif /* SECTION_IS_RW */
-
-#include "gpio_list.h" /* Must come after other header files. */
-
-/*
- * Table GPIO signals control both power rails and reset lines to various chips
- * on the board. The order the signals are changed and the delay between GPIO
- * signals is driven by USB/MST hub power sequencing requirements.
- */
-const struct power_seq board_power_seq[] = {
-	{GPIO_EN_AC_JACK,               1, 20},
-	{GPIO_EN_PP5000_A,              1, 31},
-	{GPIO_EN_PP3300_A,              1, 135},
-	{GPIO_EN_BB,                    1, 30},
-	{GPIO_EN_PP1100_A,              1, 30},
-	{GPIO_EN_PP1000_A,              1, 20},
-	{GPIO_EN_PP1050_A,              1, 30},
-	{GPIO_EN_PP1200_A,              1, 20},
-	{GPIO_EN_PP5000_HSPORT,         1, 31},
-	{GPIO_EN_DP_SINK,               1, 80},
-	{GPIO_MST_LP_CTL_L,             1, 80},
-	{GPIO_MST_RST_L,                1, 41},
-	{GPIO_EC_HUB1_RESET_L,          1, 41},
-	{GPIO_EC_HUB2_RESET_L,          1, 33},
-	{GPIO_USBC_DP_PD_RST_L,         1, 100},
-	{GPIO_USBC_UF_RESET_L,          1, 33},
-	{GPIO_DEMUX_DUAL_DP_PD_N,       1, 100},
-	{GPIO_DEMUX_DUAL_DP_RESET_N,    1, 100},
-	{GPIO_DEMUX_DP_HDMI_PD_N,       1, 10},
-	{GPIO_DEMUX_DUAL_DP_MODE,       1, 10},
-	{GPIO_DEMUX_DP_HDMI_MODE,       1, 1},
-};
-
-const size_t board_power_seq_count = ARRAY_SIZE(board_power_seq);
-
-/*
- * Define the strings used in our USB descriptors.
- */
-const void *const usb_strings[] = {
-	[USB_STR_DESC]         = usb_string_desc,
-	[USB_STR_VENDOR]       = USB_STRING_DESC("Google Inc."),
-	[USB_STR_PRODUCT]      = USB_STRING_DESC("Gingerbread"),
-	[USB_STR_SERIALNO]     = 0,
-	[USB_STR_VERSION]      =
-			USB_STRING_DESC(CROS_EC_SECTION ":" CROS_EC_VERSION32),
-	[USB_STR_UPDATE_NAME]  = USB_STRING_DESC("Firmware update"),
-};
-BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
-
-#ifndef SECTION_IS_RW
-/* USB-C PPC Configuration */
-struct ppc_config_t ppc_chips[] = {
-	[USB_PD_PORT_HOST] = {
-		.i2c_port = I2C_PORT_I2C3,
-		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
-	},
-};
-#endif
-
-#ifdef SECTION_IS_RW
-/*
- * TCPCs: 2 USBC/PD ports
- *     port 0 -> host port              -> STM32G4 UCPD
- *     port 1 -> user data/display port -> PS8805
- */
-const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	{
-		.bus_type = EC_BUS_TYPE_EMBEDDED,
-		.drv = &stm32gx_tcpm_drv,
-	},
-	{
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_I2C3,
-			.addr_flags = PS8751_I2C_ADDR2_FLAGS,
-		},
-		.drv = &ps8xxx_tcpm_drv,
-	},
-};
-
-const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	[USB_PD_PORT_HOST] = {
-		.usb_port = USB_PD_PORT_HOST,
-		.i2c_port = I2C_PORT_I2C1,
-		.i2c_addr_flags = TUSB1064_I2C_ADDR0_FLAGS,
-		.driver = &tusb1064_usb_mux_driver,
-	},
-	[USB_PD_PORT_DP] = {
-		.usb_port = USB_PD_PORT_DP,
-		.i2c_port = I2C_PORT_I2C3,
-		.i2c_addr_flags = PS8751_I2C_ADDR2_FLAGS,
-		.driver = &tcpci_tcpm_usb_mux_driver,
-		.hpd_update = &ps8xxx_tcpc_update_hpd_status,
-	},
-};
-
-/* USB-C PPC Configuration */
-struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = {
-	[USB_PD_PORT_HOST] = {
-		.i2c_port = I2C_PORT_I2C3,
-		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
-		.drv = &sn5s330_drv
-	},
-	[USB_PD_PORT_DP] = {
-		.drv = &board_ppc_null_drv
-	},
-};
-unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
-
-const struct hpd_to_pd_config_t hpd_config = {
-	.port = USB_PD_PORT_HOST,
-	.signal = GPIO_DDI_MST_IN_HPD,
-};
-
-void board_reset_pd_mcu(void)
-{
-	cprints(CC_SYSTEM, "Resetting TCPCs...");
-	cflush();
-	/*
-	 * Reset all TCPCs.
-	 *   C0 -> ucpd (on chip TCPC)
-	 *   C1 -> PS8805 TCPC -> USBC_DP_PD_RST_L
-	 *   C2 -> PS8803 TCPC -> USBC_UF_RESET_L
-	 */
-	gpio_set_level(GPIO_USBC_DP_PD_RST_L, 0);
-	gpio_set_level(GPIO_USBC_UF_RESET_L, 0);
-	msleep(PS8805_FW_INIT_DELAY_MS);
-	gpio_set_level(GPIO_USBC_DP_PD_RST_L, 1);
-	gpio_set_level(GPIO_USBC_UF_RESET_L, 1);
-	msleep(PS8805_FW_INIT_DELAY_MS);
-}
-
-
-/* Power Delivery and charging functions */
-void board_enable_usbc_interrupts(void)
-{
-	board_reset_pd_mcu();
-
-	/* Enable PPC interrupts. */
-	gpio_enable_interrupt(GPIO_HOST_USBC_PPC_INT_ODL);
-
-	/* Enable TCPC interrupts. */
-	gpio_enable_interrupt(GPIO_USBC_DP_MUX_ALERT_ODL);
-
-	/* Enable HPD interrupt */
-	gpio_enable_interrupt(GPIO_DDI_MST_IN_HPD);
-
-}
-
-/* Power Delivery and charging functions */
-void board_disable_usbc_interrupts(void)
-{
-	/* Disable PPC interrupts. */
-	gpio_disable_interrupt(GPIO_HOST_USBC_PPC_INT_ODL);
-
-	/* Disable TCPC interrupts. */
-	gpio_disable_interrupt(GPIO_USBC_DP_MUX_ALERT_ODL);
-
-	/* Disable HPD interrupt */
-	gpio_disable_interrupt(GPIO_DDI_MST_IN_HPD);
-
-}
-
-void board_tcpc_init(void)
-{
-	board_reset_pd_mcu();
-
-	/* Enable board usbc interrupts */
-	board_enable_usbc_interrupts();
-}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 2);
-
-enum pd_dual_role_states board_tc_get_initial_drp_mode(int port)
-{
-	return pd_dual_role_init[port];
-}
-
-int ppc_get_alert_status(int port)
-{
-	if (port == USB_PD_PORT_HOST)
-		return gpio_get_level(GPIO_HOST_USBC_PPC_INT_ODL) == 0;
-
-	return 0;
-}
-
-uint16_t tcpc_get_alert_status(void)
-{
-	uint16_t status = 0;
-
-	if (!gpio_get_level(GPIO_USBC_DP_MUX_ALERT_ODL) &&
-	    gpio_get_level(GPIO_USBC_DP_PD_RST_L))
-		status |= PD_STATUS_TCPC_ALERT_1;
-
-	return status;
-}
-
-void board_overcurrent_event(int port, int is_overcurrented)
-{
-	/* TODO: b/ - check correct operation for honeybuns */
-}
-
-int dock_get_mf_preference(void)
-{
-	int rv;
-	uint32_t fw_config;
-	int mf = MF_OFF;
-
-	/*
-	 * MF (multi function) preferece is indicated by bit 0 of the fw_config
-	 * data field. If this data field does not exist, then default to 4 lane
-	 * mode.
-	 */
-	rv = cbi_get_fw_config(&fw_config);
-	if (!rv)
-		mf = CBI_FW_MF_PREFERENCE(fw_config);
-
-	return mf;
-}
-
-#endif /* SECTION_IS_RW */
-
-static void board_init(void)
-{
-#ifdef SECTION_IS_RW
-
-#endif
-}
-DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
-
-static void board_debug_gpio_1_pulse(void)
-{
-	gpio_set_level(GPIO_TRIGGER_1, 0);
-}
-DECLARE_DEFERRED(board_debug_gpio_1_pulse);
-
-static void board_debug_gpio_2_pulse(void)
-{
-	gpio_set_level(GPIO_TRIGGER_2, 0);
-}
-DECLARE_DEFERRED(board_debug_gpio_2_pulse);
-
-void board_debug_gpio(enum debug_gpio trigger, int level, int pulse_usec)
-{
-	switch (trigger) {
-	case TRIGGER_1:
-		gpio_set_level(GPIO_TRIGGER_1, level);
-		if (pulse_usec)
-			hook_call_deferred(&board_debug_gpio_1_pulse_data,
-					   pulse_usec);
-		break;
-	case TRIGGER_2:
-		gpio_set_level(GPIO_TRIGGER_2, level);
-		if (pulse_usec)
-			hook_call_deferred(&board_debug_gpio_2_pulse_data,
-					   pulse_usec);
-		break;
-	default:
-		CPRINTS("bad debug gpio selection");
-		break;
-	}
-}
diff --git a/board/gingerbread/board.h b/board/gingerbread/board.h
deleted file mode 100644
index cfc5bbf0a0..0000000000
--- a/board/gingerbread/board.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Gingerbread board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-/* Baseboard features */
-#include "baseboard.h"
-
-/* Optional features */
-/*
- * For MP release, CONFIG_SYSTEM_UNLOCKED must be undefined, and
- * CONFIG_FLASH_PSTATE_LOCKED must be defined in order to enable write protect
- * using option bytes WRP registers.
- */
-#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */
-#undef CONFIG_FLASH_PSTATE_LOCKED
-
-
-#define CONFIG_WP_ACTIVE_HIGH
-
-/* Console */
-#define CONFIG_UART_CONSOLE 3
-#define CONFIG_UART_TX_DMA_CH STM32_DMAC_USART3_TX
-#define CONFIG_UART_TX_DMA_PH DMAMUX_REQ_USART3_TX
-
-/* USB Type C and USB PD defines */
-#define USB_PD_PORT_HOST   0
-#define USB_PD_PORT_DP   1
-
-#define CONFIG_USB_PD_PORT_MAX_COUNT 2
-#define CONFIG_USB_MUX_TUSB1064
-#define CONFIG_USB_PD_VBUS_DETECT_TCPC
-#define BOARD_C1_NO_PPC
-#define BOARD_C1_1A5_LIMIT
-
-#define CONFIG_USB_PID 0x5049
-#define CONFIG_USB_BCD_DEV 0x0001 /* v 0.01 */
-#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
-#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
-
-/* I2C port names */
-#define I2C_PORT_I2C1	0
-#define I2C_PORT_I2C2	1
-#define I2C_PORT_I2C3	2
-/* Required symbolic I2C port names */
-#define I2C_PORT_MP4245 I2C_PORT_I2C3
-#define I2C_PORT_EEPROM I2C_PORT_I2C1
-#define MP4245_I2C_ADDR_FLAGS  MP4245_I2C_ADDR_0_FLAGS
-
-/*
- * Macros for GPIO signals used in common code that don't match the
- * schematic names. Signal names in gpio.inc match the schematic and are
- * then redefined here to so it's more clear which signal is being used for
- * which purpose.
- */
-#define GPIO_ENTERING_RW	GPIO_EC_ENTERING_RW
-#define GPIO_WP_L		GPIO_EC_WP_L
-#define GPIO_WP		GPIO_EC_WP_L
-
-/* Include math_util for bitmask_uint64 used in pd_timers */
-#define CONFIG_MATH_UTIL
-
-#ifndef __ASSEMBLER__
-
-#include "registers.h"
-
-#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
-#define GPIO_BPWR_DET GPIO_TP71
-#define GPIO_PWR_BUTTON_RED GPIO_EC_STATUS_LED1
-#define GPIO_PWR_BUTTON_GREEN GPIO_EC_STATUS_LED2
-
-#define BUTTON_PRESSED_LEVEL 0
-#define BUTTON_RELEASED_LEVEL 1
-
-#define GPIO_TRIGGER_1 GPIO_USB3_A1_CDP_EN
-#define GPIO_TRIGGER_2 GPIO_USB3_A2_CDP_EN
-
-enum  debug_gpio {
-	TRIGGER_1 = 0,
-	TRIGGER_2,
-};
-
-/*
- * Function used to control GPIO signals as a timing marker. This is intended to
- * be used for development/debugging purposes.
- *
- * @param trigger GPIO debug signal selection
- * @param level desired level of the debug gpio signal
- * @param pulse_usec pulse width if non-zero
- */
-void board_debug_gpio(enum debug_gpio trigger, int level, int pulse_usec);
-
-/*
- * Function called in power on case to enable usbc related interrupts
- */
-void board_enable_usbc_interrupts(void);
-
-/*
- * Function called in power off case to disable usbc related interrupts
- */
-void board_disable_usbc_interrupts(void);
-
-#endif /* !__ASSEMBLER__ */
-
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/gingerbread/build.mk b/board/gingerbread/build.mk
deleted file mode 100644
index f994cc1434..0000000000
--- a/board/gingerbread/build.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-# -*- makefile -*-
-# Copyright 2020 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-#
-
-CHIP:=stm32
-# TODO(b/148493929): The chip family for honeybuns is STM32G4. The chip
-# variant is STM32G431x. Support for this chip is not yet in the Cros EC
-# codebase. Currently, using a variant of the F family so the project will
-# build properly.
-CHIP_FAMILY:=stm32g4
-CHIP_VARIANT:=stm32g473xc
-BASEBOARD:=honeybuns
-
-board-y=board.o
diff --git a/board/gingerbread/dev_key.pem b/board/gingerbread/dev_key.pem
deleted file mode 100644
index 7b1df5d805..0000000000
--- a/board/gingerbread/dev_key.pem
+++ /dev/null
@@ -1,39 +0,0 @@
------BEGIN RSA PRIVATE KEY-----
-MIIG5AIBAAKCAYEA2hyGIDxIS/jWNh3Nhg7V4/5Ce8KT4CIb1XaLd0mR2gWCkYdZ
-iRWSjAjMsMCLSLM0gUDnFU5xJgbUdg1GeafXdPlRQojG2ztZ/z+JBNgQvsWtdJhR
-m9dMm1cbq3rajU5NoVu1hiLIWpayYo91w1qMnf3LRFAgrVDvEUt8elCpTB60uZiS
-QL3PSCJhZiGyK2QGix+vNKxri+GnM+SxXggi3IrLMI2gqpCTiTZl4t8Ecnsn4QMC
-OvgRzDj2TnYJhhAdFeg7SuQ9TKCXAyw0LAR9AcuQ8tbf3ox04umLdbAj518ScXZB
-ef2xrnXIBkXcA5UXZ2J6+YP7tvm6XCEnwdhEq5gi65Mjc1i8vihzABXbXrKhFdKt
-ACLdQ8V6eM2nTK4NwNIeHdF0KRBvln5APxapNfjQh9Fz67ytvxt7TaBQWOheWB1V
-8NL7AzfcEPUH5blCjdWNfLcUXNqZa6+Jxk5Zug5dPazo1y1R5XoLFKpZ76c33fPr
-ngV8jwkTNaXVU84jAgEDAoIBgQCRaFlq0trdUI7OvokECePtVCxSgbfqwWfjpFz6
-MQvmrlcLr5EGDmGysIh11bIwd3hWK0S43vYZWeL5Xi77xTpN+4uBsISSJ5FU1QYD
-OrXUg8j4ZYu9OjMSOhJyUecI3t5rknkEFzA8ZHbsX6PXkbMT/oeC4BXI4J9g3P2m
-4HDdac3REGGAfoowFuuZa8wc7VmyFR94cvJdQRoimHY+sBc9sdzLCRXHCw0GJEPs
-lK2hp2/rV1bR+raIJfmJpAZZYBIn4W8yHD2LX6/ofgnTIxw9jAL1eheBviKwpYw8
-QOr46FlX3SZs8cupHbCf+DiPbcwZce3viPPMXSF+XW4wmiXgQeJnAh7sStcu4WjF
-TWxppqto6mr/5D5uI+NWjm13puJVL6OsPkJrhEZ1gSW6u3pPxAotkj4sppIg2qUJ
-pmxohz4D8gChOyedxtg1DRBqMY9VDnfRN5DMuPiF9t77KkOuHfZI3tUwWIeZeRKV
-tJEldJjnTBZfqZirjznlIBq1oasCgcEA/9RLDoX70KACdkki4o8MOrqHvmU3fgtZ
-MWIxrbjFoR9JhjFIZm41Ak8/sMhbs0dOskS4FmNaeKgkhsalZR997HvZXDxAsB7X
-tWkYcqKI1XaB48rIB5g5rxFmnxh/vVrchlUh80YQS/jvetD+fmjzXHeyrC2OCAgR
-2cfrl0ZwbXDbvoWoUcAl9C8YuUWUYurJsyqnwNLg6uiGB5anjBITNVGOXYD8hdcv
-2RoOOSnuGwTHRtytphO1WJiUqn9yOV5jAoHBANpByXEz5SrxDLAmAozAxmq/BMQ6
-hR3j56iPB22V/dDjQud5P3Akyy55/2WJK3kpFo7y3fvTM4vF45fOXRPRje65dfTT
-tGDJokJtPWV/L+rCHhSoRHi0Re9+Ptffg1vY3bq1hqguADvRFmtriSiUfmHbDpdI
-iKC6wLQLmCfgPU6spZOsrK06GaJefwgb2uOEIdsVMgIQ2j7cnpsmk8F84P+P3XLd
-rIjRVqYqYPrxkhxzizwlHGhzYjUZp7N2Own9QQKBwQCqjYdfA/01wAGkMMHsX118
-fFp+7iT+sjt2QXZz0IPAv4ZZdjBESXisNNUghZJ3hN8hgyVkQjxQcBhZ2cOYv6lI
-UpDoKCsgFI/ORhBMbFs4+avtMdqvutEfYO8Uuv/TkehZjhaiLrWH+0pR4Kmpm0zo
-T8xyyQlasAvmhUe6LvWeSz0prnA2gBlNdLsmLmLsnIZ3ccUrN0CcmwQFDxpdYWIj
-i7Q+Vf2uj3U7ZrQmG/QSAy+Ekx5ut847EGMcVPbQ6ZcCgcEAkYEw9iKYx0tdysQB
-sysu8dSt2CcDaUKacF9aSQ6pNezXRPt/oBiHdFFU7ltyUMYPCfc+p+IiXS6XuomT
-Youz9Huj+I0i6zEW1vN+Q6of8da+uHAtpc2D9P7Uj+pXkpCT0c5ZxXQAJ+C5nPJb
-cGL+6+dfD4WwaycrIrJlb+rTichuYnMdyNFmbD7/Wr08l61r52N2rAs8KehpvMRi
-gP3rVQqToekdsIuPGXGV/KEMEveyKBi9mveWzhEad6QnW/4rAoHBAM1TgJVVYCKl
-tmUf8XcC8+bNQ+dlqPdBQa3cAPFlQdRZUzDIYU+ZHa66GWUWb2uuD2hFCDDEpC1l
-Ke34tNROiruDfj9lfD6UmJv8vw/wPG3m52Qb5iWdA+B1512MK8p7KZg9YQJot/Yj
-B2rNxv1O+IjWPxxtUEVsFpx/XGoEemc85iS+icjNXvtOwyEGdNliRFiQtVkh2mtX
-7uKbkUAL2HKzxfnJ/LbWZwDlW45x/qDQtncp93sTcM3k8FVE+MtLbw==
------END RSA PRIVATE KEY-----
diff --git a/board/gingerbread/ec.tasklist b/board/gingerbread/ec.tasklist
deleted file mode 100644
index cc36bf5a74..0000000000
--- a/board/gingerbread/ec.tasklist
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * See CONFIG_TASK_LIST in config.h for details.
- */
-
-#define CONFIG_TASK_LIST \
-	TASK_ALWAYS_RO(RWSIG,    rwsig_task,   NULL, 1280) \
-	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS_RW(POWER_BUTTON, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS_RW(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS_RW(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS_RW(PD_INT_C1, pd_interrupt_handler_task, 1, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS_RW(UCPD, ucpd_task, 0, LARGER_TASK_STACK_SIZE)
diff --git a/board/gingerbread/gpio.inc b/board/gingerbread/gpio.inc
deleted file mode 100644
index 5b7b3a9619..0000000000
--- a/board/gingerbread/gpio.inc
+++ /dev/null
@@ -1,99 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first. */
-
-#ifdef SECTION_IS_RW
-GPIO_INT(HOST_USBC_PPC_INT_ODL,  PIN(C, 1),       GPIO_INT_FALLING | GPIO_PULL_UP,  ppc_interrupt)
-GPIO_INT(USBC_DP_MUX_ALERT_ODL,  PIN(C, 12),       GPIO_INT_FALLING | GPIO_PULL_UP,   tcpc_alert_event)
-GPIO_INT(DDI_MST_IN_HPD,         PIN(C, 14),      GPIO_INT_BOTH, hpd_interrupt)
-GPIO_INT(PWR_BTN,                PIN(A,  0),      GPIO_INT_BOTH, board_pwr_btn_interrupt)
-#endif
-
-/* Power sequencing signals */
-GPIO(EN_AC_JACK,                    PIN(A, 1),  GPIO_OUT_LOW)
-GPIO(EN_BB,                         PIN(C, 0),  GPIO_OUT_LOW)
-GPIO(EN_PP3300_A,                   PIN(C, 10), GPIO_OUT_LOW)
-GPIO(EN_PP5000_A,                   PIN(C, 2),  GPIO_OUT_LOW)
-GPIO(EN_PP1200_A,                   PIN(C, 3),  GPIO_OUT_LOW)
-GPIO(EN_PP1100_A,                   PIN(C, 4),  GPIO_OUT_LOW)
-GPIO(EN_PP1000_A,                   PIN(C, 5),  GPIO_OUT_LOW)
-GPIO(EN_PP1050_A,                   PIN(C, 6),  GPIO_OUT_LOW)
-GPIO(EN_PP5000_HSPORT,              PIN(C, 7),  GPIO_OUT_LOW)
-GPIO(EC_STATUS_LED1,                PIN(A, 2),  GPIO_OUT_HIGH)
-GPIO(EC_STATUS_LED2,                PIN(B, 12), GPIO_OUT_HIGH)
-
-/* MST Hub signals */
-GPIO(MST_LP_CTL_L,                  PIN(B, 9),  GPIO_OUT_LOW)
-GPIO(MST_RST_L,                     PIN(B, 3),  GPIO_ODR_LOW)
-GPIO(MST_HUB_LANE_SWITCH,           PIN(C, 15), GPIO_OUT_HIGH)
-
-/* Display Demux signals */
-GPIO(DEMUX_DUAL_DP_MODE,            PIN(D, 8),  GPIO_OUT_LOW)
-GPIO(DEMUX_DP_HDMI_MODE,            PIN(D, 10), GPIO_OUT_LOW)
-GPIO(DEMUX_DUAL_DP_RESET_N,         PIN(B, 14), GPIO_ODR_HIGH)
-GPIO(DEMUX_DUAL_DP_PD_N,            PIN(D, 2),  GPIO_ODR_HIGH)
-GPIO(DEMUX_DP_HDMI_PD_N,            PIN(D, 9),  GPIO_ODR_HIGH)
-
-/* USBC Mux and Demux Signals */
-GPIO(EN_DP_SINK,                    PIN(B, 2),  GPIO_OUT_LOW)
-GPIO(DP_SINK_RESET,                 PIN(B, 1),  GPIO_OUT_LOW)
-GPIO(USBC_DP_PD_RST_L,              PIN(C, 13), GPIO_ODR_LOW)
-GPIO(USBC_UF_RESET_L,               PIN(C, 11), GPIO_ODR_LOW)
-
-/* USB Hubs signals */
-GPIO(EC_HUB1_RESET_L,               PIN(E, 13), GPIO_ODR_LOW)
-GPIO(EC_HUB2_RESET_L,               PIN(E, 14), GPIO_ODR_LOW)
-
-/* DEBUG signals */
-GPIO(DEBUG_GPIO1,                   PIN(B, 13),      GPIO_OUT_LOW)
-
-/* Configure as output to enable @1.5A on USBA Ports
-* USB CDP enables. */
-GPIO(USB3_A1_CDP_EN,                PIN(E, 7),       GPIO_OUT_LOW)
-GPIO(USB3_A2_CDP_EN,                PIN(E, 8),       GPIO_OUT_LOW)
-GPIO(USB3_P3_CDP_EN,                PIN(D, 1),      GPIO_OUT_LOW)
-GPIO(USB3_P4_CDP_EN,                PIN(E, 12),      GPIO_OUT_LOW)
-
-/* Write protect */
-GPIO(EC_FLASH_WP_ODL,               PIN(A, 3),       GPIO_ODR_HIGH)
-GPIO(EC_WP_L,                       PIN(E, 11),      GPIO_INT_BOTH)
-
-
-/* SPI Bus */
-GPIO(FLASH_SPI1_NSS,                PIN(A, 4),       GPIO_INT_FALLING)
-GPIO(FLASH_SPI1_SCK,                PIN(A, 5),       GPIO_INT_BOTH)
-GPIO(FLASH_SPI1_MISO,               PIN(A, 6),       GPIO_INT_BOTH)
-GPIO(FLASH_SPI1_MOSI,               PIN(A, 7),       GPIO_INT_BOTH)
-
-/* misc signals */
-GPIO(EC_DFU_MUX_CTRL,               PIN(A, 8),       GPIO_OUT_HIGH)
-GPIO(TP71,               PIN(B, 0),       GPIO_OUT_LOW)
-
-/*
- * I2C SCL/SDA pins. These will normally be under control of the peripheral from
- * alt fucntion setting below. But if a port gets wedged, the unwedge code uses
- * these signals as regular GPIOs.
- */
-GPIO(EC_I2C1_SCL,                   PIN(A, 15),  GPIO_ODR_HIGH)
-GPIO(EC_I2C1_SDA,                   PIN(B,  7),  GPIO_ODR_HIGH)
-GPIO(EC_I2C3_SCL,                   PIN(C,  8),  GPIO_ODR_HIGH)
-GPIO(EC_I2C3_SDA,                   PIN(C,  9),  GPIO_ODR_HIGH)
-
-UNIMPLEMENTED(EC_ENTERING_RW)
-
-ALTERNATE(PIN_MASK(B, 0x0C00), GPIO_ALT_USART,   MODULE_UART,     GPIO_PULL_UP) /* GPIOB 10-11:USART3_TX/RX */
-ALTERNATE(PIN_MASK(A, 0x00F0),      5,           MODULE_SPI,      0) /* GPIOA4-7: SPI Signals */
-/* I2C Ports
- *   I2C1: SDA/SCL -> PB7/PA15
- *   I2C2: SDA/SCL -> PA8/PA9
- *   I2C3: SDA/SCL -> PC8/PC9
- */
-ALTERNATE(PIN_MASK(B, 0x0080),  4, MODULE_I2C,   GPIO_OPEN_DRAIN)
-ALTERNATE(PIN_MASK(A, 0X8000),  4, MODULE_I2C,   GPIO_OPEN_DRAIN)
-ALTERNATE(PIN_MASK(C, 0x0300),  8, MODULE_I2C,   GPIO_OPEN_DRAIN)