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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /board/hatch_fp/board_rw.c
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14682.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/hatch_fp/board_rw.c')
-rw-r--r--board/hatch_fp/board_rw.c60
1 files changed, 0 insertions, 60 deletions
diff --git a/board/hatch_fp/board_rw.c b/board/hatch_fp/board_rw.c
deleted file mode 100644
index 4c83c8723c..0000000000
--- a/board/hatch_fp/board_rw.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "console.h"
-#include "fpsensor_detect.h"
-#include "gpio.h"
-#include "registers.h"
-#include "spi.h"
-#include "task.h"
-#include "usart_host_command.h"
-#include "util.h"
-
-#ifndef SECTION_IS_RW
-#error "This file should only be built for RW."
-#endif
-
-/* SPI devices */
-struct spi_device_t spi_devices[] = {
- /* Fingerprint sensor (SCLK at 4Mhz) */
- { .port = CONFIG_SPI_FP_PORT, .div = 3, .gpio_cs = GPIO_SPI2_NSS }
-};
-const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
-
-static void configure_fp_sensor_spi(void)
-{
- /* The dragonclaw development board needs this enabled to enable the
- * AND gate (U10) to CS. Production boards could disable this to save
- * power since it's only needed for initial detection on those boards.
- */
- gpio_set_level(GPIO_DIVIDER_HIGHSIDE, 1);
-
- /* Configure SPI GPIOs */
- gpio_config_module(MODULE_SPI_CONTROLLER, 1);
-
- /* Set all SPI master signal pins to very high speed: B12/13/14/15 */
- STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000;
-
- /* Enable clocks to SPI2 module (master) */
- STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
-
- spi_enable(&spi_devices[0], 1);
-}
-
-void board_init_rw(void)
-{
- /*
- * FP_RST_ODL pin is defined in gpio_rw.inc (with GPIO_OUT_HIGH
- * flag) but not in gpio.inc, so RO leaves this pin set to 0 (reset
- * default), but RW doesn't initialize this pin to 1 because sysjump
- * to RW is a warm reset (see gpio_pre_init() in chip/stm32/gpio.c).
- * Explicitly reset FP_RST_ODL pin to default value.
- */
- gpio_reset(GPIO_FP_RST_ODL);
-
- /* Configure and enable SPI as master for FP sensor */
- configure_fp_sensor_spi();
-}