diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 13:39:17 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 05:09:49 +0000 |
commit | a9bb007f364fd25979d164cd3636fa7e77eae59a (patch) | |
tree | 529ba0bc6db0975b5f3f929a19c6b9743e8840e9 /board/hoho | |
parent | 26d05e43830ccfe6bdf0c33e4b639f40fba1c54a (diff) | |
download | chrome-ec-a9bb007f364fd25979d164cd3636fa7e77eae59a.tar.gz |
board/hoho/board.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ide779e54af0322831ed91d3ff515adc762ae705c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728321
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'board/hoho')
-rw-r--r-- | board/hoho/board.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/board/hoho/board.c b/board/hoho/board.c index 07b772c826..e36f89a1b9 100644 --- a/board/hoho/board.c +++ b/board/hoho/board.c @@ -98,7 +98,7 @@ void board_config_pre_init(void) /* enable SYSCFG clock */ STM32_RCC_APB2ENR |= BIT(0); /* Remap USART DMA to match the USART driver */ - STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10);/* Remap USART1 RX/TX DMA */ + STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10); /* Remap USART1 RX/TX DMA */ } #ifdef CONFIG_SPI_FLASH @@ -142,11 +142,10 @@ static void factory_validation_deferred(void) /* test mcdp via serial to validate function */ if (!mcdp_get_info(&info) && (MCDP_FAMILY(info.family) == 0x0010) && - (MCDP_CHIPID(info.chipid) == 0x2850)) { + (MCDP_CHIPID(info.chipid) == 0x2850)) { gpio_set_level(GPIO_MCDP_READY, 1); pd_log_event(PD_EVENT_VIDEO_CODEC, - PD_LOG_PORT_SIZE(0, sizeof(info)), - 0, &info); + PD_LOG_PORT_SIZE(0, sizeof(info)), 0, &info); } mcdp_disable(); @@ -167,7 +166,7 @@ static void board_init(void) gpio_set_level(GPIO_STM_READY, 1); /* factory test only */ /* Delay needed to allow HDMI MCU to boot. */ - hook_call_deferred(&factory_validation_deferred_data, 200*MSEC); + hook_call_deferred(&factory_validation_deferred_data, 200 * MSEC); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); @@ -175,11 +174,11 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); /* ADC channels */ const struct adc_t adc_channels[] = { /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ - [ADC_CH_CC1_PD] = {"USB_C_CC1_PD", 3300, 4096, 0, STM32_AIN(1)}, + [ADC_CH_CC1_PD] = { "USB_C_CC1_PD", 3300, 4096, 0, STM32_AIN(1) }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); -const void * const usb_strings[] = { +const void *const usb_strings[] = { [USB_STR_DESC] = usb_string_desc, [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."), [USB_STR_PRODUCT] = USB_STRING_DESC("Hoho"), |