diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2021-11-04 12:11:58 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-05 04:22:34 +0000 |
commit | 252457d4b21f46889eebad61d4c0a65331919cec (patch) | |
tree | 01856c4d31d710b20e85a74c8d7b5836e35c3b98 /board/it8xxx2_evb/gpio.inc | |
parent | 08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff) | |
download | chrome-ec-release-R98-14388.B-ish.tar.gz |
ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/it8xxx2_evb/gpio.inc')
-rw-r--r-- | board/it8xxx2_evb/gpio.inc | 75 |
1 files changed, 0 insertions, 75 deletions
diff --git a/board/it8xxx2_evb/gpio.inc b/board/it8xxx2_evb/gpio.inc deleted file mode 100644 index 8a7f593ab6..0000000000 --- a/board/it8xxx2_evb/gpio.inc +++ /dev/null @@ -1,75 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI -GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) -#endif -GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) -GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH | GPIO_PULL_UP, switch_interrupt) /* Write protect input */ -#ifdef CONFIG_LOW_POWER_IDLE -GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING | GPIO_PULL_UP, uart_deepsleep_interrupt) /* UART1 RX input */ -#endif - -GPIO(PCH_SMI_L, PIN(D, 3), GPIO_OUT_HIGH) -GPIO(PCH_SCI_L, PIN(D, 4), GPIO_OUT_HIGH) -GPIO(GATE_A20_H, PIN(B, 5), GPIO_OUT_HIGH) -GPIO(SYS_RESET_L, PIN(B, 6), GPIO_OUT_HIGH) -GPIO(LPC_CLKRUN_L, PIN(H, 0), GPIO_OUT_LOW) -GPIO(PCH_WAKE_L, PIN(B, 7), GPIO_ODR_HIGH) /* Wake signal from EC to PCH */ - -GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) -GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) -GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) -#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 -GPIO(I2C_C_SCL, PIN(C, 7), GPIO_INPUT) -#else -GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) -#endif -GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) - -GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) -GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) - -#ifdef CONFIG_UART_HOST -GPIO(UART2_SIN1, PIN(H, 1), GPIO_INPUT) -GPIO(UART2_SOUT1, PIN(H, 2), GPIO_INPUT) -#endif - -/* KSO/KSI pins can be used as GPIO input. */ -GPIO(BOARD_VERSION1, PIN(KSO_H, 5), GPIO_INPUT) -GPIO(BOARD_VERSION2, PIN(KSO_H, 6), GPIO_INPUT) -GPIO(BOARD_VERSION3, PIN(KSO_H, 7), GPIO_INPUT) - -/* Unimplemented signals which we need to emulate for now */ -UNIMPLEMENTED(ENTERING_RW) - -ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART1 */ -#ifdef CONFIG_UART_HOST -ALTERNATE(PIN_MASK(H, 0x06), 1, MODULE_UART, 0) /* UART2 */ -#endif -ALTERNATE(PIN_MASK(A, 0x40), 3, MODULE_SPI_CONTROLLER, 0) /* SSCK of SPI */ -ALTERNATE(PIN_MASK(C, 0x28), 3, MODULE_SPI_CONTROLLER, 0) /* SMOSI/SMISO of SPI */ -ALTERNATE(PIN_MASK(G, 0x01), 3, MODULE_SPI_CONTROLLER, 0) /* SSCE1# of SPI */ -ALTERNATE(PIN_MASK(G, 0x04), 3, MODULE_SPI_CONTROLLER, 0) /* SSCE0# of SPI */ -ALTERNATE(PIN_MASK(A, 0x80), 1, MODULE_PWM, 0) /* PWM7 for FAN1 */ -ALTERNATE(PIN_MASK(D, 0x40), 3, MODULE_PWM, 0) /* TACH0A for FAN1 */ -ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A SCL/SDA */ -#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 -ALTERNATE(PIN_MASK(C, 0x86), 1, MODULE_I2C, 0) /* I2C B SCL/SDA, C SCL */ -ALTERNATE(PIN_MASK(F, 0x80), 1, MODULE_I2C, 0) /* I2C C SDA */ -#else -ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, 0) /* I2C B SCL/SDA */ -ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C SCL/SDA */ -#endif -ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E SCL/SDA E0/E7 */ -ALTERNATE(PIN_MASK(I, 0x03), 1, MODULE_ADC, 0) /* ADC CH0, CH1 */ -ALTERNATE(PIN_MASK(L, 0x0F), 1, MODULE_ADC, 0) /* ADC CH13-CH16 */ |