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authorShelley Chen <shchen@google.com>2019-11-20 22:22:25 -0800
committerCommit Bot <commit-bot@chromium.org>2019-11-22 10:17:22 +0000
commit62c28034b339011cb877feca705dfeb6b695459e (patch)
treee8d69a85410a7788aa9dbd24cfc3b4c8c5193767 /board/kindred
parent5b30bc23812eb0d54789851a5b951b364d28f635 (diff)
downloadchrome-ec-62c28034b339011cb877feca705dfeb6b695459e.tar.gz
all hatch variants: Make sure EC_RST_ODL is GPIO_LOCKED
BUG=b:144886704 BRANCH=hatch TEST=make buildall Change-Id: I0d520a5c375a2b47c55a335da91f556ccfd59c29 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928422 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/kindred')
-rw-r--r--board/kindred/gpio.inc11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/kindred/gpio.inc b/board/kindred/gpio.inc
index c197eb9f28..91b41a4730 100644
--- a/board/kindred/gpio.inc
+++ b/board/kindred/gpio.inc
@@ -61,6 +61,17 @@ GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT)
/* MKBP event synchronization */
GPIO(EC_INT_L, PIN(7, 0), GPIO_ODR_HIGH)
+/*
+ * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an
+ * interrupt handler because it is automatically handled by the PSL.
+ *
+ * We need to lock the setting so this gpio can't be reconfigured to overdrive
+ * the real reset signal. (This is the PSL input pin not the real reset pin).
+ */
+GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH |
+ GPIO_HIB_WAKE_HIGH |
+ GPIO_LOCKED)
+
/* USB and USBC Signals */
GPIO(USB_C_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH)
GPIO(USB_C0_TCPC_RST, PIN(9, 7), GPIO_OUT_LOW)