diff options
| author | Scott Collyer <scollyer@google.com> | 2019-04-24 11:46:04 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-05-08 19:35:20 -0700 |
| commit | 2befbf878db0d4a51349eac629d9a61e5459d2aa (patch) | |
| tree | 8e430958db0448dfb91f3ef28049ba8339891575 /board/kohaku/gpio.inc | |
| parent | b8b8d41c4fe01cb068f2175831bc42e21e54bb1f (diff) | |
| download | chrome-ec-2befbf878db0d4a51349eac629d9a61e5459d2aa.tar.gz | |
hatch/kohaku: Account for TCPC reset polarity in ALERT handler
Reset polarity was added to tcpc_config so that the reset function
could be common across different boards which have different TCPC
selections. This was applied to pd_reset_mcu(), however, that CL did
not take into account the reset polarity in the tcpc_get_alert_status
function. This CL fixes that oversight.
In addition, this CL fixes the name for kohaku's port 0 TCPC reset
line to match the schematic.
BUG=b:130194031
BRANCH=none
TEST=verified on Hatch that both ports 0/1 function correctly.
Change-Id: I0d75d3655c799d4c74f4a6fb1805c06c1fe99c06
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1582964
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/kohaku/gpio.inc')
| -rw-r--r-- | board/kohaku/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/kohaku/gpio.inc b/board/kohaku/gpio.inc index c695faad93..9e0e06fa30 100644 --- a/board/kohaku/gpio.inc +++ b/board/kohaku/gpio.inc @@ -58,7 +58,7 @@ GPIO(EC_INT_L, PIN(7, 0), GPIO_OUT_HIGH) /* USB and USBC Signals */ GPIO(USB_C_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C0_TCPC_RST, PIN(9, 7), GPIO_OUT_LOW) +GPIO(USB_C0_TCPC_RST_ODL, PIN(9, 7), GPIO_ODR_HIGH) GPIO(USB_C1_TCPC_RST_ODL, PIN(3, 2), GPIO_ODR_HIGH) GPIO(USB_C0_BC12_CHG_DET_L, PIN(0, 6), GPIO_INPUT) GPIO(USB_C1_BC12_CHG_DET_L, PIN(3, 5), GPIO_INPUT) |