diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 13:56:29 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-29 13:16:42 +0000 |
commit | c156da88ff968554cd39f7793556d969ea56b9b1 (patch) | |
tree | 8e4746db0075f1b18eafdbfb8de57ab9d043cc92 /board/npcx9_evb | |
parent | f7605fcbf316e4de4078666cdb32d652dce27d34 (diff) | |
download | chrome-ec-c156da88ff968554cd39f7793556d969ea56b9b1.tar.gz |
board/npcx9_evb/board.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Id40c793a4d510e5a10315d76e2bfbf7490ebcb62
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728767
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'board/npcx9_evb')
-rw-r--r-- | board/npcx9_evb/board.c | 102 |
1 files changed, 52 insertions, 50 deletions
diff --git a/board/npcx9_evb/board.c b/board/npcx9_evb/board.c index b412fe8b30..fd1e2276e4 100644 --- a/board/npcx9_evb/board.c +++ b/board/npcx9_evb/board.c @@ -36,25 +36,37 @@ /******************************************************************************/ /* ADC channels. Must be in the exactly same order as in enum adc_channel. */ const struct adc_t adc_channels[] = { - [ADC_CH_0] = {"ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_1] = {"ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_2] = {"ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_3] = {"ADC3", NPCX_ADC_CH3, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_4] = {"ADC4", NPCX_ADC_CH4, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_5] = {"ADC5", NPCX_ADC_CH5, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_6] = {"ADC6", NPCX_ADC_CH6, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_7] = {"ADC7", NPCX_ADC_CH7, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_8] = {"ADC8", NPCX_ADC_CH8, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_9] = {"ADC9", NPCX_ADC_CH9, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_10] = {"ADC10", NPCX_ADC_CH10, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, - [ADC_CH_11] = {"ADC11", NPCX_ADC_CH11, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, + [ADC_CH_0] = { "ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_1] = { "ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_2] = { "ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_3] = { "ADC3", NPCX_ADC_CH3, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_4] = { "ADC4", NPCX_ADC_CH4, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_5] = { "ADC5", NPCX_ADC_CH5, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_6] = { "ADC6", NPCX_ADC_CH6, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_7] = { "ADC7", NPCX_ADC_CH7, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_8] = { "ADC8", NPCX_ADC_CH8, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_9] = { "ADC9", NPCX_ADC_CH9, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_10] = { "ADC10", NPCX_ADC_CH10, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, + [ADC_CH_11] = { "ADC11", NPCX_ADC_CH11, ADC_MAX_VOLT, ADC_READ_MAX + 1, + 0 }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ const struct pwm_t pwm_channels[] = { - [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000}, + [PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000 }, [PWM_CH_KBLIGHT] = { 2, 0, 10000 }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); @@ -63,7 +75,7 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); /* Physical fans. These are logically separate from pwm_channels. */ const struct fan_conf fan_conf_0 = { .flags = FAN_USE_RPM_MODE, - .ch = 0, /* Use MFT id to control fan */ + .ch = 0, /* Use MFT id to control fan */ .pgood_gpio = GPIO_PGOOD_FAN, .enable_gpio = -1, }; @@ -96,48 +108,38 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /******************************************************************************/ /* MFT channels. These are logically separate from pwm_channels. */ const struct mft_t mft_channels[] = { - [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN}, + [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN }, }; BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* I2C ports */ const struct i2c_port_t i2c_ports[] = { - { - .name = "master0-0", - .port = NPCX_I2C_PORT0_0, - .kbps = 100, - .scl = GPIO_I2C0_SCL0, - .sda = GPIO_I2C0_SDA0 - }, - { - .name = "master1-0", - .port = NPCX_I2C_PORT1_0, - .kbps = 100, - .scl = GPIO_I2C1_SCL0, - .sda = GPIO_I2C1_SDA0 - }, - { - .name = "master2-0", - .port = NPCX_I2C_PORT2_0, - .kbps = 100, - .scl = GPIO_I2C2_SCL0, - .sda = GPIO_I2C2_SDA0 - }, - { - .name = "master3-0", - .port = NPCX_I2C_PORT3_0, - .kbps = 100, - .scl = GPIO_I2C3_SCL0, - .sda = GPIO_I2C3_SDA0 - }, - { - .name = "master7-0", - .port = NPCX_I2C_PORT7_0, - .kbps = 100, - .scl = GPIO_I2C7_SCL0, - .sda = GPIO_I2C7_SDA0 - }, + { .name = "master0-0", + .port = NPCX_I2C_PORT0_0, + .kbps = 100, + .scl = GPIO_I2C0_SCL0, + .sda = GPIO_I2C0_SDA0 }, + { .name = "master1-0", + .port = NPCX_I2C_PORT1_0, + .kbps = 100, + .scl = GPIO_I2C1_SCL0, + .sda = GPIO_I2C1_SDA0 }, + { .name = "master2-0", + .port = NPCX_I2C_PORT2_0, + .kbps = 100, + .scl = GPIO_I2C2_SCL0, + .sda = GPIO_I2C2_SDA0 }, + { .name = "master3-0", + .port = NPCX_I2C_PORT3_0, + .kbps = 100, + .scl = GPIO_I2C3_SCL0, + .sda = GPIO_I2C3_SDA0 }, + { .name = "master7-0", + .port = NPCX_I2C_PORT7_0, + .kbps = 100, + .scl = GPIO_I2C7_SCL0, + .sda = GPIO_I2C7_SDA0 }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); |