rainier: initial mainboard

Copied board-related files from scarlet folder and made edits to
fit rainier. Left in most battery related code and config since there
is enough logic to detect absent battery

BUG=chromium:776441
TEST=Run "make -j BOARD=rainier"
BRANCH=none
Signed-off-by: egemih@google.com
Change-Id: Ifd1201a9a44cebd9b433545f0ac7ee04741429c9
Reviewed-on: https://chromium-review.googlesource.com/755949
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Ege Mihmanli <egemih@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>

1 files changed, 177 insertions, 0 deletions

diff --git a/board/rainier/board.h b/board/rainier/board.h
new file mode 100644
index 0000000000..8c67257695
--- /dev/null
+++ b/board/rainier/board.h
@@ -0,0 +1,177 @@
+/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Configuration for Rainier */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/* Optional modules */
+#define CONFIG_ADC
+#undef  CONFIG_ADC_WATCHDOG
+#define CONFIG_CHIPSET_RK3399
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_RTC
+#define CONFIG_HOSTCMD_RTC
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_I2C_PASSTHRU_RESTRICTED
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_POWER_COMMON
+#define CONFIG_SPI
+#define CONFIG_SPI_MASTER
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_STM32_CLOCK_LSE
+#define CONFIG_SWITCH
+#define CONFIG_WATCHDOG_HELP
+
+#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */
+
+#undef  CONFIG_UART_CONSOLE
+#define CONFIG_UART_CONSOLE 1
+
+/* Region sizes are no longer a power of 2 so we can't enable MPU */
+#undef  CONFIG_MPU
+
+/* Enable a different power-on sequence than the one on gru */
+#undef CONFIG_CHIPSET_POWER_SEQ_VERSION
+#define CONFIG_CHIPSET_POWER_SEQ_VERSION 2
+
+/* Optional features */
+#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_SPECIFIC_VERSION
+#define CONFIG_BOARD_VERSION
+#define CONFIG_BUTTON_COUNT        2
+#define CONFIG_BUTTON_RECOVERY
+#define CONFIG_CHARGER_ILIM_PIN_DISABLED
+#define CONFIG_FORCE_CONSOLE_RESUME
+#define CONFIG_HOST_COMMAND_STATUS
+
+/* By default, set hcdebug to off */
+#undef CONFIG_HOSTCMD_DEBUG_MODE
+#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
+#undef CONFIG_LID_SWITCH
+#undef CONFIG_LTO
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_IGNORE_LID
+#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
+#define CONFIG_SOFTWARE_PANIC
+#define CONFIG_VBOOT_HASH
+
+#define CONFIG_USB_MUX_VIRTUAL
+
+/* Increase tx buffer size, as we'd like to stream EC log to AP. */
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 4096
+
+/* Motion Sensors */
+#define CONFIG_ACCELGYRO_BMI160
+#define CONFIG_ACCEL_INTERRUPTS
+#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)
+#define CONFIG_BARO_BMP280
+
+/* To be able to indicate the device is in tablet mode. */
+#define CONFIG_TABLET_MODE_SWITCH
+
+/* FIFO size is in power of 2. */
+#define CONFIG_ACCEL_FIFO 256
+#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3)
+
+/* Sensors without hardware FIFO are in forced mode. */
+#define CONFIG_ACCEL_FORCE_MODE_MASK (1 << LID_BARO)
+
+/* USB PD config */
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_CUSTOM_VDM
+#define CONFIG_USB_PD_DISCHARGE
+#define CONFIG_USB_PD_DISCHARGE_GPIO
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_PORT_COUNT 1
+#define CONFIG_USB_PD_TCPM_FUSB302
+#define CONFIG_USB_PD_VBUS_DETECT_TCPC
+#define ADC_VBUS -1
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+#define CONFIG_USB_PD_COMM_LOCKED
+
+#define PD_OPERATING_POWER_MW 15000
+#define PD_MAX_POWER_MW       ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)
+#define PD_MAX_CURRENT_MA     3000
+#define PD_MAX_VOLTAGE_MV     12850
+
+#define PD_POWER_SUPPLY_TURN_ON_DELAY  30000  /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000  /* us */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
+/* Timer selection */
+#define TIM_CLOCK32  2
+#define TIM_WATCHDOG 7
+
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
+/* Optional for testing */
+#undef  CONFIG_PECI
+#undef  CONFIG_PSTORE
+
+#define CONFIG_TASK_PROFILING
+
+#define I2C_PORT_TCPC0 1
+
+/* Enable Accel over SPI */
+#define CONFIG_SPI_ACCEL_PORT    0  /* The first SPI master port (SPI2) */
+
+#define CONFIG_KEYBOARD_PROTOCOL_MKBP
+#define CONFIG_MKBP_EVENT
+/* Define the MKBP events which are allowed to wakeup AP in S3. */
+#define CONFIG_MKBP_WAKEUP_MASK \
+		(EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) |\
+		 EC_HOST_EVENT_MASK(EC_HOST_EVENT_RTC))
+
+#ifndef __ASSEMBLER__
+
+enum adc_channel {
+	/* Real ADC channels begin here */
+	ADC_BOARD_ID = 0,
+	ADC_CH_COUNT
+};
+
+enum button {
+	BUTTON_VOLUME_DOWN = 0,
+	BUTTON_VOLUME_UP = 1,
+	BUTTON_COUNT
+};
+
+/* power signal definitions */
+enum power_signal {
+	PP1250_S3_PWR_GOOD = 0,
+	PP900_S0_PWR_GOOD,
+	AP_PWR_GOOD,
+	SUSPEND_DEASSERTED,
+
+	/* Number of signals */
+	POWER_SIGNAL_COUNT,
+};
+
+/* Motion sensors */
+enum sensor_id {
+	LID_ACCEL = 0,
+	LID_GYRO,
+	LID_BARO,
+};
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+void board_reset_pd_mcu(void);
+int board_get_version(void);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */