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authorKevin K Wong <kevin.k.wong@intel.com>2016-06-22 10:33:12 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-07-06 18:07:02 -0700
commitdf7642329fa2b0a4a9783ba3d007f398adbd583e (patch)
treea9da1a3794ad281b9fc5f7015aa54b3b33091271 /board/reef
parent11c156aedd6c28a23ad710493f806ea69b976183 (diff)
downloadchrome-ec-df7642329fa2b0a4a9783ba3d007f398adbd583e.tar.gz
reef: correct GPIO name for PMIC_EN signal pin
Rename from V5A_EN to PMIC_EN. The name V5A_EN came from Amenia where it controls both 5V_A-Rail and PMIC_EN. Reef has a separate 5V_A-Rail control (EN_PP5000) and an another GPIO pin for PMIC_EN. BUG=chrome-os-partner:53666 BRANCH=none TEST=buildall pass Change-Id: Ic5e39b9811a6cf0e968c1d6262b9b9f849268ed4 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/354767 Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'board/reef')
-rw-r--r--board/reef/board.c10
-rw-r--r--board/reef/gpio.inc2
-rw-r--r--board/reef/usb_pd_policy.c2
3 files changed, 7 insertions, 7 deletions
diff --git a/board/reef/board.c b/board/reef/board.c
index 51a836b1e4..329870d674 100644
--- a/board/reef/board.c
+++ b/board/reef/board.c
@@ -300,9 +300,9 @@ static void board_init(void)
gpio_set_level(GPIO_EN_PP5000, 0);
/* Toggle PMIC_EN */
- gpio_set_level(GPIO_V5A_EN, 1);
+ gpio_set_level(GPIO_PMIC_EN, 1);
msleep(500);
- gpio_set_level(GPIO_V5A_EN, 0);
+ gpio_set_level(GPIO_PMIC_EN, 0);
}
/* FIXME: Handle tablet mode */
@@ -316,7 +316,7 @@ static void board_init(void)
* 1. PP5000 must be enabled before PP3300 (chrome-os-partner:50807).
* 2. TCPC chips must be powered until we can re-factor the PD handling
* code to be aware of TCPCs being off (chrome-os-partner:53644).
- * 3. To prevent SLP glitches, PMIC_EN (V5A_EN) should be enabled
+ * 3. To prevent SLP glitches, PMIC_EN should be enabled
* at the same time as PP3300 (chrome-os-partner:51323).
*/
/* Enable PP5000 before PP3300 due to NFC: chrome-os-partner:50807 */
@@ -325,7 +325,7 @@ static void board_init(void)
;
/* Enable PMIC */
- gpio_set_level(GPIO_V5A_EN, 1);
+ gpio_set_level(GPIO_PMIC_EN, 1);
/* Enable 3.3V rail */
gpio_set_level(GPIO_EN_PP3300, 1);
@@ -452,7 +452,7 @@ void chipset_do_shutdown(void)
/*
* If we shut off TCPCs the TCPC tasks will fail and spam the
* EC console with I2C errors. So for now we'll leave the TCPCs
- * on which means leaving V5A_EN, PP3300, and PP5000 enabled.
+ * on which means leaving PMIC_EN, PP3300, and PP5000 enabled.
*/
cprintf(CC_CHIPSET, "%s called, but not doing anything.\n", __func__);
}
diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc
index 755b3f75d7..a835d39154 100644
--- a/board/reef/gpio.inc
+++ b/board/reef/gpio.inc
@@ -81,7 +81,7 @@ GPIO(USB_C0_CABLE_DET, PIN(C, 5), GPIO_INPUT)
GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW)
GPIO(EC_BATT_PRES_L, PIN(3, 4), GPIO_INPUT)
-GPIO(V5A_EN, PIN(8, 5), GPIO_OUT_LOW) /* PMIC_EN */
+GPIO(PMIC_EN, PIN(8, 5), GPIO_OUT_LOW)
GPIO(EN_PP3300, PIN(C, 2), GPIO_OUT_LOW)
GPIO(PP3300_PG, PIN(6, 2), GPIO_INPUT)
GPIO(EN_PP5000, PIN(C, 6), GPIO_OUT_LOW)
diff --git a/board/reef/usb_pd_policy.c b/board/reef/usb_pd_policy.c
index f442f725f3..b972cb52e0 100644
--- a/board/reef/usb_pd_policy.c
+++ b/board/reef/usb_pd_policy.c
@@ -153,7 +153,7 @@ int pd_check_data_swap(int port, int data_role)
int pd_check_vconn_swap(int port)
{
/* in G3, do not allow vconn swap since pp5000_A rail is off */
- return gpio_get_level(GPIO_V5A_EN);
+ return gpio_get_level(GPIO_EN_PP5000);
}
void pd_execute_data_swap(int port, int data_role)