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authorKeith Short <keithshort@chromium.org>2021-08-03 12:29:48 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-23 21:33:52 +0000
commit9203b2b7d069d074a85a171f7b84de7552a0d4e9 (patch)
treea0f48fe8c9a371ca385da8ddf2f2301292eab439 /board/scarlet/board.h
parent103197eeadb9cb489831f06ea47e0eedf0a4801d (diff)
downloadchrome-ec-9203b2b7d069d074a85a171f7b84de7552a0d4e9.tar.gz
COIL: Update SPI references to controller/peripheral
Update SPI references to controller/peripheral for inclusivity. BUG=b:163885307 BRANCH=none TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I19b02fb949aad9ade569c4658a904e9ce59e27c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066272 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/scarlet/board.h')
-rw-r--r--board/scarlet/board.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/scarlet/board.h b/board/scarlet/board.h
index f8d1ba7011..5f5e1ef4bb 100644
--- a/board/scarlet/board.h
+++ b/board/scarlet/board.h
@@ -186,7 +186,7 @@
#define VIRTUAL_BATTERY_ADDR_FLAGS 0x0B
/* Enable Accel over SPI */
-#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */
+#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */
#define CONFIG_MKBP_INPUT_DEVICES
#define CONFIG_MKBP_EVENT