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author | Tom Hughes <tomhughes@chromium.org> | 2021-01-26 11:36:48 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-01-28 01:08:04 +0000 |
commit | b5a0fdab0680fd93b0b7b08a139a5fdcbb679ee6 (patch) | |
tree | e950d8969881d4f8b8978b349b94b9c7085eb3e5 /board/scarlet | |
parent | c60037148c629e4947b67287b88c3abf701e2040 (diff) | |
download | chrome-ec-b5a0fdab0680fd93b0b7b08a139a5fdcbb679ee6.tar.gz |
spi: Pass in spi_device as argument to spi_enable instead of port
Rather than passing in the port and iterating over the global
spi_devices variable, pass in the specific spi_device that is being
enabled/disabled. The spi_device_t struct has the port.
This change makes the functions in spi.h more consistent since they now
all take a spi_device_t*. This change is the first step in making the
SPI configuration more dynamic.
BRANCH=none
BUG=b:177908650
TEST=git grep 'spi_enable(CONFIG' => no results
TEST=make buildall
TEST=Flash dragonclaw v0.2 and view console to verify FP sensor ID
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I64124e0ebcf898e88496acb77703b5f59ae931c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654081
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'board/scarlet')
-rw-r--r-- | board/scarlet/board.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/scarlet/board.c b/board/scarlet/board.c index c1beb0882a..4544aa551c 100644 --- a/board/scarlet/board.c +++ b/board/scarlet/board.c @@ -239,7 +239,7 @@ static void board_spi_enable(void) STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; - spi_enable(CONFIG_SPI_ACCEL_PORT, 1); + spi_enable(&spi_devices[0], 1); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_spi_enable, @@ -247,7 +247,7 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, static void board_spi_disable(void) { - spi_enable(CONFIG_SPI_ACCEL_PORT, 0); + spi_enable(&spi_devices[0], 0); /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; |