Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release

Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release

Relevant changes:

git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "stm32f_rtc": PASSED
     Test "panic_data_bloonchipper_v2.0.4277": PASSED
     Test "panic_data_bloonchipper_v2.0.5938": PASSED

Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3

1 files changed, 46 insertions, 50 deletions

diff --git a/board/scout/board.h b/board/scout/board.h
index 53958b1686..41a93845d7 100644
--- a/board/scout/board.h
+++ b/board/scout/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -12,8 +12,8 @@
 #define CONFIG_UART_TX_BUF_SIZE 4096
 
 /* NPCX7 config */
-#define NPCX7_PWM1_SEL    0  /* GPIO C2 is not used as PWM1. */
-#define NPCX_UART_MODULE2 1  /* GPIO64/65 are used as UART pins. */
+#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
+#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
 
 /* Internal SPI flash on NPCX796FC is 512 kB */
 #define CONFIG_FLASH_SIZE_BYTES (512 * 1024)
@@ -40,7 +40,7 @@
 #undef CONFIG_HIBERNATE
 #define CONFIG_HOST_INTERFACE_ESPI
 #define CONFIG_LED_COMMON
-#undef  CONFIG_LID_SWITCH
+#undef CONFIG_LID_SWITCH
 #define CONFIG_LTO
 #define CONFIG_PWM
 #define CONFIG_VBOOT_EFS2
@@ -50,7 +50,7 @@
 #define CONFIG_SHA256
 
 /* Sensor */
-#undef  CONFIG_MOTION_SENSE_RESUME_DELAY_US
+#undef CONFIG_MOTION_SENSE_RESUME_DELAY_US
 #define CONFIG_MOTION_SENSE_RESUME_DELAY_US (1000 * MSEC)
 #define CONFIG_CMD_ACCEL_INFO
 /* Enable sensor fifo, must also define the _SIZE and _THRES */
@@ -139,14 +139,14 @@
 /* I2C Bus Configuration */
 #define CONFIG_I2C
 #define CONFIG_I2C_CONTROLLER
-#define I2C_PORT_INA		NPCX_I2C_PORT0_0
-#define I2C_PORT_PPC0		NPCX_I2C_PORT1_0
-#define I2C_PORT_SCALER		NPCX_I2C_PORT2_0
-#define I2C_PORT_SENSORS	NPCX_I2C_PORT3_0
-#define I2C_PORT_TCPC0		NPCX_I2C_PORT3_0
-#define I2C_PORT_POWER		NPCX_I2C_PORT5_0
-#define I2C_PORT_EEPROM		NPCX_I2C_PORT7_0
-#define I2C_ADDR_EEPROM_FLAGS	0x50
+#define I2C_PORT_INA NPCX_I2C_PORT0_0
+#define I2C_PORT_PPC0 NPCX_I2C_PORT1_0
+#define I2C_PORT_SCALER NPCX_I2C_PORT2_0
+#define I2C_PORT_SENSORS NPCX_I2C_PORT3_0
+#define I2C_PORT_TCPC0 NPCX_I2C_PORT3_0
+#define I2C_PORT_POWER NPCX_I2C_PORT5_0
+#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0
+#define I2C_ADDR_EEPROM_FLAGS 0x50
 
 #define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD)
 
@@ -164,12 +164,12 @@ enum board_version {
 };
 
 enum adc_channel {
-	ADC_SNS_PP3300,     /* ADC2 */
-	ADC_SNS_PP1050,     /* ADC7 */
-	ADC_VBUS,           /* ADC4 */
-	ADC_PPVAR_IMON,     /* ADC9 */
-	ADC_TEMP_SENSOR_1,  /* ADC0 */
-	ADC_TEMP_SENSOR_2,  /* ADC1 */
+	ADC_SNS_PP3300, /* ADC2 */
+	ADC_SNS_PP1050, /* ADC7 */
+	ADC_VBUS, /* ADC4 */
+	ADC_PPVAR_IMON, /* ADC9 */
+	ADC_TEMP_SENSOR_1, /* ADC0 */
+	ADC_TEMP_SENSOR_2, /* ADC1 */
 	/* Number of ADC channels */
 	ADC_CH_COUNT
 };
@@ -194,11 +194,7 @@ enum mft_channel {
 	MFT_CH_COUNT,
 };
 
-enum temp_sensor_id {
-	TEMP_SENSOR_CORE,
-	TEMP_SENSOR_WIFI,
-	TEMP_SENSOR_COUNT
-};
+enum temp_sensor_id { TEMP_SENSOR_CORE, TEMP_SENSOR_WIFI, TEMP_SENSOR_COUNT };
 
 enum sensor_id {
 	CLEAR_ALS,
@@ -218,20 +214,20 @@ void show_critical_error(void);
 /*
  * Barrel-jack power (4 bits).
  */
-#define EC_CFG_BJ_POWER_L		0
-#define EC_CFG_BJ_POWER_H		3
+#define EC_CFG_BJ_POWER_L 0
+#define EC_CFG_BJ_POWER_H 3
 #define EC_CFG_BJ_POWER_MASK GENMASK(EC_CFG_BJ_POWER_H, EC_CFG_BJ_POWER_L)
 /*
  * USB Connector 4 not present (1 bit).
  */
-#define EC_CFG_NO_USB4_L		4
-#define EC_CFG_NO_USB4_H		4
+#define EC_CFG_NO_USB4_L 4
+#define EC_CFG_NO_USB4_H 4
 #define EC_CFG_NO_USB4_MASK GENMASK(EC_CFG_NO_USB4_H, EC_CFG_NO_USB4_L)
 /*
  * Thermal solution config (3 bits).
  */
-#define EC_CFG_THERMAL_L		5
-#define EC_CFG_THERMAL_H		7
+#define EC_CFG_THERMAL_L 5
+#define EC_CFG_THERMAL_H 7
 #define EC_CFG_THERMAL_MASK GENMASK(EC_CFG_THERMAL_H, EC_CFG_THERMAL_L)
 
 int ec_config_get_usb4_present(void);
@@ -240,30 +236,30 @@ unsigned int ec_config_get_thermal_solution(void);
 #endif /* !__ASSEMBLER__ */
 
 /* Pin renaming */
-#define GPIO_WP_L               GPIO_EC_WP_ODL
-#define GPIO_PP5000_A_PG_OD     GPIO_PG_PP5000_A_OD
-#define GPIO_EN_PP5000		GPIO_EN_PP5000_A
-#define GPIO_RECOVERY_L         GPIO_EC_RECOVERY_BTN_ODL
-#define GPIO_RECOVERY_L_2       GPIO_H1_EC_RECOVERY_BTN_ODL
-#define GPIO_POWER_BUTTON_L	GPIO_H1_EC_PWR_BTN_ODL
-#define GPIO_PCH_WAKE_L		GPIO_EC_PCH_WAKE_ODL
-#define GPIO_PCH_PWRBTN_L	GPIO_EC_PCH_PWR_BTN_ODL
-#define GPIO_ENTERING_RW	GPIO_EC_ENTERING_RW
-#define GPIO_SYS_RESET_L	GPIO_SYS_RST_ODL
-#define GPIO_PCH_RSMRST_L	GPIO_EC_PCH_RSMRST_L
-#define GPIO_CPU_PROCHOT	GPIO_EC_PROCHOT_ODL
-#define GPIO_PCH_RTCRST		GPIO_EC_PCH_RTCRST
-#define GPIO_PCH_SYS_PWROK	GPIO_EC_PCH_SYS_PWROK
-#define GPIO_PCH_SLP_S0_L	GPIO_SLP_S0_L
-#define GPIO_PCH_SLP_S3_L	GPIO_SLP_S3_L
-#define GPIO_PCH_SLP_S4_L	GPIO_SLP_S4_L
-#define GPIO_TEMP_SENSOR_POWER	GPIO_EN_ROA_RAILS
-#define GPIO_AC_PRESENT		GPIO_BJ_ADP_PRESENT_L
+#define GPIO_WP_L GPIO_EC_WP_ODL
+#define GPIO_PP5000_A_PG_OD GPIO_PG_PP5000_A_OD
+#define GPIO_EN_PP5000 GPIO_EN_PP5000_A
+#define GPIO_RECOVERY_L GPIO_EC_RECOVERY_BTN_ODL
+#define GPIO_RECOVERY_L_2 GPIO_H1_EC_RECOVERY_BTN_ODL
+#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL
+#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL
+#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL
+#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
+#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL
+#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L
+#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
+#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
+#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK
+#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
+#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
+#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L
+#define GPIO_TEMP_SENSOR_POWER GPIO_EN_ROA_RAILS
+#define GPIO_AC_PRESENT GPIO_BJ_ADP_PRESENT_L
 
 /*
  * There is no RSMRST input, so alias it to the output. This short-circuits
  * common_intel_x86_handle_rsmrst.
  */
-#define GPIO_PG_EC_RSMRST_ODL	GPIO_PCH_RSMRST_L
+#define GPIO_PG_EC_RSMRST_ODL GPIO_PCH_RSMRST_L
 
 #endif /* __CROS_EC_BOARD_H */