diff options
| author | Anton Staaf <robotboy@chromium.org> | 2014-06-25 13:09:37 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-07-01 00:43:04 +0000 |
| commit | 3500c28b501c9fc0918552bb70cb53391dd3f3fd (patch) | |
| tree | 04ead74394aa01c93d127c98c997c6f019ad9c39 /board/spring | |
| parent | f1ddcab82d5966ef320e027be7670a106c990cdf (diff) | |
| download | chrome-ec-3500c28b501c9fc0918552bb70cb53391dd3f3fd.tar.gz | |
gpio: Reformat gpio.inc files to use longer than 80-column lines
These files are tabular data more than source code. We discussed
and concluded that the 80-column limit makes them harder to read,
not easier. This commit reformats them to take advantage of
longer lines, mainly by putting per GPIO comments on the end of
the line that defines the GPIO.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: I60f3e3620680196eb9462f97b34c453289240465
Reviewed-on: https://chromium-review.googlesource.com/205672
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/spring')
| -rw-r--r-- | board/spring/gpio.inc | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/board/spring/gpio.inc b/board/spring/gpio.inc index 02478a5674..173d1e19e3 100644 --- a/board/spring/gpio.inc +++ b/board/spring/gpio.inc @@ -7,18 +7,13 @@ /* Inputs with interrupt handlers are first for efficiency */ /* Keyboard power button */ -GPIO(KB_PWR_ON_L, B, 5, GPIO_INT_BOTH, power_signal_interrupt) -/* LDO2 is ON (end of PMIC sequence) */ -GPIO(PP1800_LDO2, A, 1, GPIO_INT_BOTH, power_signal_interrupt) -/* App Processor ON */ -GPIO(SOC1V8_XPSHOLD, A, 3, GPIO_INT_BOTH, power_signal_interrupt) -GPIO(CHARGER_INT_L, C, 4, GPIO_INT_FALLING, pmu_irq_handler) -/* LID switch detection */ -GPIO(LID_OPEN, C, 13, GPIO_INT_BOTH, lid_interrupt) -/* AP suspend/resume state */ -GPIO(SUSPEND_L, A, 7, INT_BOTH_FLOATING, power_signal_interrupt) -/* Write protection pin (low active) */ -GPIO(WP_L, A, 13, GPIO_INPUT, NULL) +GPIO(KB_PWR_ON_L, B, 5, GPIO_INT_BOTH, power_signal_interrupt) +GPIO(PP1800_LDO2, A, 1, GPIO_INT_BOTH, power_signal_interrupt) /* LDO2 is ON (end of PMIC sequence) */ +GPIO(SOC1V8_XPSHOLD, A, 3, GPIO_INT_BOTH, power_signal_interrupt) /* App Processor ON */ +GPIO(CHARGER_INT_L, C, 4, GPIO_INT_FALLING, pmu_irq_handler) +GPIO(LID_OPEN, C, 13, GPIO_INT_BOTH, lid_interrupt) /* LID switch detection */ +GPIO(SUSPEND_L, A, 7, INT_BOTH_FLOATING, power_signal_interrupt) /* AP suspend/resume state */ +GPIO(WP_L, A, 13, GPIO_INPUT, NULL) /* Write protection pin (low active) */ /* Keyboard inputs */ GPIO(KB_IN00, C, 8, GPIO_KB_INPUT, keyboard_raw_gpio_interrupt) @@ -49,9 +44,7 @@ GPIO(EN_PP5000, A, 11, GPIO_OUT_LOW, NULL) /* 5.0v rail enable */ GPIO(EN_PP3300, A, 8, GPIO_OUT_LOW, NULL) /* 3.3v rail enable */ GPIO(PMIC_PWRON_L,A, 12, GPIO_OUT_HIGH, NULL) /* 5v rail ready */ GPIO(PMIC_RESET, A, 15, GPIO_OUT_LOW, NULL) /* Force hard reset of the pmic */ - -/* EC is R/W mode for the kbc mux */ -GPIO(ENTERING_RW, D, 0, GPIO_OUT_LOW, NULL) +GPIO(ENTERING_RW, D, 0, GPIO_OUT_LOW, NULL) /* EC is R/W mode for the kbc mux */ GPIO(CHARGER_EN, B, 2, GPIO_OUT_LOW, NULL) GPIO(EC_INT, B, 9, GPIO_ODR_HIGH, NULL) GPIO(ID_MUX, D, 1, GPIO_OUT_LOW, NULL) |