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| author | Jack Rosenthal <jrosenth@chromium.org> | 2021-11-04 12:11:58 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-05 04:22:34 +0000 |
| commit | 252457d4b21f46889eebad61d4c0a65331919cec (patch) | |
| tree | 01856c4d31d710b20e85a74c8d7b5836e35c3b98 /board/stm32l476g-eval/board.h | |
| parent | 08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff) | |
| download | chrome-ec-release-R101-14588.B-ish.tar.gz | |
ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/stm32l476g-eval/board.h')
| -rw-r--r-- | board/stm32l476g-eval/board.h | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/board/stm32l476g-eval/board.h b/board/stm32l476g-eval/board.h deleted file mode 100644 index e8ce99845f..0000000000 --- a/board/stm32l476g-eval/board.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* STM32L476G-Eval board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -#ifdef CTS_MODULE -/* CTS tests are small. We can use smaller size to expedite flash time. */ -#undef CONFIG_FLASH_SIZE_BYTES -#define CONFIG_FLASH_SIZE_BYTES 0x00040000 /* 256k */ -#endif - -/* Optional features */ -#undef CONFIG_WATCHDOG_HELP -#undef CONFIG_LID_SWITCH - -/* Console is on LPUART (PG7/8). Undef it to use USART1 (PB6/7). */ -#define STM32L476G_EVAL_USE_LPUART_CONSOLE -#undef CONFIG_UART_CONSOLE - -#ifdef STM32L476G_EVAL_USE_LPUART_CONSOLE -#define CONFIG_UART_CONSOLE 9 -#define CONFIG_UART_TX_DMA_CH STM32_DMAC_CH14 -#define CONFIG_UART_TX_DMA_PH 4 -#else -#define CONFIG_UART_CONSOLE 1 -#define CONFIG_UART_TX_DMA_CH STM32_DMAC_USART1_TX -#define CONFIG_UART_TX_DMA_PH 2 -#endif - -/* Optional features */ -#define CONFIG_STM_HWTIMER32 - -#ifdef CTS_MODULE_I2C -#define CONFIG_I2C -#define CONFIG_I2C_PERIPHERAL -#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c -#define I2C_PORT_EC STM32_I2C2_PORT -#endif - -/* - * Allow dangerous commands all the time, since we don't have a write protect - * switch. - */ -#define CONFIG_SYSTEM_UNLOCKED - -#ifndef __ASSEMBLER__ - -#undef CONFIG_FLASH_CROS -#undef CONFIG_FLASH_PHYSICAL - -/* Timer selection */ -#define TIM_CLOCK32 5 - -/* External clock speeds (8 MHz) */ -#define STM32_HSE_CLOCK 8000000 - -/* PLL configuration. Freq = STM32_HSE_CLOCK * n/m/r */ -#undef STM32_PLLM -#define STM32_PLLM 1 -#undef STM32_PLLN -#define STM32_PLLN 10 -#undef STM32_PLLR -#define STM32_PLLR 2 - -#include "gpio_signal.h" - -#endif /* !__ASSEMBLER__ */ -#endif /* __CROS_EC_BOARD_H */ |