diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2019-12-04 12:09:09 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-12-07 02:51:20 +0000 |
| commit | fdcc690ac4bd08bb28df5a88aee0a10ac5397e22 (patch) | |
| tree | 835fb923871074c190790fc0074e62aa6276cbb0 /board/volteer/board.h | |
| parent | 41acb78745d413f0db6dfc95c00276b622802be7 (diff) | |
| download | chrome-ec-fdcc690ac4bd08bb28df5a88aee0a10ac5397e22.tar.gz | |
volteer: Enable BC1.2 charge ramp
BUG=b:145683021
BRANCH=none
TEST=Able to charge ramp BC1.2 devices on both the ports
Change-Id: Iccabb3a1cf51c2cf22c6620e560d7ab74415a2cf
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951426
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'board/volteer/board.h')
| -rw-r--r-- | board/volteer/board.h | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/board/volteer/board.h b/board/volteer/board.h index 72dca78ddc..7f7344bf74 100644 --- a/board/volteer/board.h +++ b/board/volteer/board.h @@ -57,25 +57,26 @@ * then redefined here to so it's more clear which signal is being used for * which purpose. */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_EC_INT_L EC_PCH_INT_ODL +#define GPIO_EN_PP5000 GPIO_EN_PP5000_A +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_LID_OPEN GPIO_EC_LID_OPEN +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK +#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL +#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL #ifndef __ASSEMBLER__ |