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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2019-10-02 14:27:47 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-11-01 18:43:42 +0000 |
| commit | 9577704f30c7e824c0590264df22d95a2c706575 (patch) | |
| tree | 566b5beeeae8b343803718101ba0b00c940506cb /chip/host | |
| parent | e8121e83e478fef2d5a29304be900311f3f020c4 (diff) | |
| download | chrome-ec-9577704f30c7e824c0590264df22d95a2c706575.tar.gz | |
Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT
Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/host')
| -rw-r--r-- | chip/host/usb_pd_phy.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/host/usb_pd_phy.c b/chip/host/usb_pd_phy.c index c44b8eea02..0ca92604b8 100644 --- a/chip/host/usb_pd_phy.c +++ b/chip/host/usb_pd_phy.c @@ -35,7 +35,7 @@ static struct pd_physical { int last_edge_written; uint8_t out_msg[PD_BIT_LEN / 5]; int verified_idx; -} pd_phy[CONFIG_USB_PD_PORT_COUNT]; +} pd_phy[CONFIG_USB_PD_PORT_MAX_COUNT]; static const uint16_t enc4b5b[] = { 0x1E, 0x09, 0x14, 0x15, 0x0A, 0x0B, 0x0E, 0x0F, 0x12, 0x13, 0x16, |