it83xx: adc: interrupt is used

We don't need to loop and waiting ADC's data valid flag
after the change was made.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. We build a EC binary for PD EVB (declared two ADC channels
        for VBUS measurement of PD task and priority is highest)
     2. Use console command "adc" continually to read ADC channels
        and check if any error.

Change-Id: I1379e0b4c9ef721c29cb053d7d85e1a8ece9471b
Reviewed-on: https://chromium-review.googlesource.com/421307
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

1 files changed, 12 insertions, 1 deletions

diff --git a/chip/it83xx/adc_chip.h b/chip/it83xx/adc_chip.h
index ae7ee403b0..424e00c24d 100644
--- a/chip/it83xx/adc_chip.h
+++ b/chip/it83xx/adc_chip.h
@@ -3,11 +3,22 @@
  * found in the LICENSE file.
  */
 
-/* IT8380 ADC module for Chrome EC */
+/* IT83xx ADC module for Chrome EC */
 
 #ifndef __CROS_EC_ADC_CHIP_H
 #define __CROS_EC_ADC_CHIP_H
 
+#include "common.h"
+
+/*
+ * Maximum time we allow for an ADC conversion.
+ * NOTE:
+ * This setting must be less than "SLEEP_SET_HTIMER_DELAY_USEC" in clock.c
+ * or adding a sleep mask to prevent going in to deep sleep while ADC
+ * converting.
+ */
+#define ADC_TIMEOUT_US 248
+
 /* Data structure to define ADC channel control registers. */
 struct adc_ctrl_t {
 	volatile uint8_t *adc_ctrl;