ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

1 files changed, 0 insertions, 126 deletions

diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h
deleted file mode 100644
index 2f552c794a..0000000000
--- a/chip/it83xx/config_chip.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __CROS_EC_CONFIG_CHIP_H
-#define __CROS_EC_CONFIG_CHIP_H
-
-#if defined(CHIP_FAMILY_IT8320)    /* N8 core */
-#include "config_chip_it8320.h"
-#elif defined(CHIP_FAMILY_IT8XXX2) /* RISCV core */
-#include "config_chip_it8xxx2.h"
-#else
-#error "Unsupported chip family!"
-#endif
-
-/* Number of IRQ vectors on the IVIC */
-#define CONFIG_IRQ_COUNT IT83XX_IRQ_COUNT
-
-/* Interval between HOOK_TICK notifications */
-#define HOOK_TICK_INTERVAL_MS 500
-#define HOOK_TICK_INTERVAL    (HOOK_TICK_INTERVAL_MS * MSEC)
-
-/* Default PLL frequency. */
-#define PLL_CLOCK 48000000
-
-/* Number of I2C ports */
-#define I2C_PORT_COUNT 6
-
-/* I2C ports on chip
- * IT83xx - There are three i2c standard ports.
- *          There are three i2c enhanced ports.
- */
-#define I2C_STANDARD_PORT_COUNT 3
-#define I2C_ENHANCED_PORT_COUNT 3
-
-/* System stack size */
-#define CONFIG_STACK_SIZE           1024
-
-/* non-standard task stack sizes */
-#define SMALLER_TASK_STACK_SIZE     (384 + CHIP_EXTRA_STACK_SPACE)
-#define IDLE_TASK_STACK_SIZE        (512 + CHIP_EXTRA_STACK_SPACE)
-#define LARGER_TASK_STACK_SIZE      (768 + CHIP_EXTRA_STACK_SPACE)
-#define VENTI_TASK_STACK_SIZE       (896 + CHIP_EXTRA_STACK_SPACE)
-#define ULTRA_TASK_STACK_SIZE       (1056 + CHIP_EXTRA_STACK_SPACE)
-#define TRENTA_TASK_STACK_SIZE      (1184 + CHIP_EXTRA_STACK_SPACE)
-
-/* Default task stack size */
-#define TASK_STACK_SIZE             (512 + CHIP_EXTRA_STACK_SPACE)
-
-#ifdef IT83XX_CHIP_FLASH_IS_KGD
-#define CONFIG_FLASH_BANK_SIZE      0x00001000  /* protect bank size */
-#define CONFIG_FLASH_ERASE_SIZE     0x00001000  /* erase bank size */
-#else
-#define CONFIG_FLASH_BANK_SIZE      0x00000800  /* protect bank size */
-#define CONFIG_FLASH_ERASE_SIZE     0x00000400  /* erase bank size */
-#endif
-#define CONFIG_FLASH_WRITE_SIZE     0x00000004  /* minimum write size */
-
-/*
- * This is the block size of the ILM on the it83xx chip.
- * The ILM for static code cache, CPU fetch instruction from
- * ILM(ILM -> CPU)instead of flash(flash -> IMMU -> CPU) if enabled.
- */
-#define IT83XX_ILM_BLOCK_SIZE       0x00001000
-
-#ifdef IT83XX_CHIP_FLASH_IS_KGD
-/*
- * One page program instruction allows maximum 256 bytes (a page) of data
- * to be programmed.
- */
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256
-#else
-/*
- * The AAI program instruction allows continue write flash
- * until write disable instruction.
- */
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE CONFIG_FLASH_ERASE_SIZE
-#endif
-
-/****************************************************************************/
-/* Define our flash layout. */
-
-/* Memory-mapped internal flash */
-#define CONFIG_INTERNAL_STORAGE
-#define CONFIG_MAPPED_STORAGE
-
-/* Program is run directly from storage */
-#define CONFIG_MAPPED_STORAGE_BASE CONFIG_PROGRAM_MEMORY_BASE
-
-/* Compute the rest of the flash params from these */
-#include "config_std_internal_flash.h"
-
-/****************************************************************************/
-/* H2RAM memory mapping */
-
-/*
- * Only it839x series and IT838x DX support mapping LPC I/O cycle 800h ~ 9FFh
- * to 0x8D800h ~ 0x8D9FFh of DLM13.
- *
- * IT8xxx2 series support mapping LPC/eSPI I/O cycle 800h ~ 9FFh
- * to 0x80081800 ~ 0x800819FF of DLM1.
- */
-#define CONFIG_H2RAM_BASE               (CHIP_H2RAM_BASE)
-#define CONFIG_H2RAM_SIZE               0x00001000
-#define CONFIG_H2RAM_HOST_LPC_IO_BASE   0x800
-
-/****************************************************************************/
-/* Customize the build */
-
-#define CONFIG_FW_RESET_VECTOR
-
-/* Optional features present on this chip */
-#define CHIP_FAMILY_IT83XX
-#define CONFIG_ADC
-#define CONFIG_SWITCH
-
-/* Chip needs to do custom pre-init */
-#define CONFIG_CHIP_PRE_INIT
-
-#define GPIO_PIN(port, index) GPIO_##port, BIT(index)
-#define GPIO_PIN_MASK(p, m) .port = GPIO_##p, .mask = (m)
-
-#define __RAM_CODE_SECTION_NAME ".ram_code"
-
-#endif  /* __CROS_EC_CONFIG_CHIP_H */