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| author | Jack Rosenthal <jrosenth@chromium.org> | 2021-11-04 12:11:58 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-05 04:22:34 +0000 |
| commit | 252457d4b21f46889eebad61d4c0a65331919cec (patch) | |
| tree | 01856c4d31d710b20e85a74c8d7b5836e35c3b98 /chip/max32660/wdt_regs.h | |
| parent | 08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff) | |
| download | chrome-ec-stabilize-14469.8.B-ish.tar.gz | |
ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/max32660/wdt_regs.h')
| -rw-r--r-- | chip/max32660/wdt_regs.h | 355 |
1 files changed, 0 insertions, 355 deletions
diff --git a/chip/max32660/wdt_regs.h b/chip/max32660/wdt_regs.h deleted file mode 100644 index 32d6fe0925..0000000000 --- a/chip/max32660/wdt_regs.h +++ /dev/null @@ -1,355 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* MAX32660 Registers, Bit Masks and Bit Positions for the WDT Peripheral */ - -#ifndef _WDT_REGS_H_ -#define _WDT_REGS_H_ - -#include <stdint.h> - -/* - If types are not defined elsewhere (CMSIS) define them here -*/ -#ifndef __IO -#define __IO volatile -#endif -#ifndef __I -#define __I volatile const -#endif -#ifndef __O -#define __O volatile -#endif -#ifndef __R -#define __R volatile const -#endif - -/** - * Structure type to access the WDT Registers. - */ -typedef struct { - __IO uint32_t ctrl; /**< <tt>\b 0x00:<\tt> WDT CTRL Register */ - __O uint32_t rst; /**< <tt>\b 0x04:<\tt> WDT RST Register */ -} mxc_wdt_regs_t; - -/** - * WDT Peripheral Register Offsets from the WDT Base Peripheral - * Address. - */ -#define MXC_R_WDT_CTRL \ - ((uint32_t)0x00000000UL) /**< Offset from WDT Base Address: <tt> \ - 0x0x000 */ -#define MXC_R_WDT_RST \ - ((uint32_t)0x00000004UL) /**< Offset from WDT Base Address: <tt> \ - 0x0x004 */ - -/** - * Watchdog Timer Control Register. - */ -#define MXC_F_WDT_CTRL_INT_PERIOD_POS 0 /**< CTRL_INT_PERIOD Position */ -#define MXC_F_WDT_CTRL_INT_PERIOD \ - ((uint32_t)( \ - 0xFUL << MXC_F_WDT_CTRL_INT_PERIOD_POS)) /**< CTRL_INT_PERIOD \ - Mask */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW31 \ - ((uint32_t)0x0UL) /**< CTRL_INT_PERIOD_WDT2POW31 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW31 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW31 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW31 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW30 \ - ((uint32_t)0x1UL) /**< CTRL_INT_PERIOD_WDT2POW30 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW30 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW30 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW30 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW29 \ - ((uint32_t)0x2UL) /**< CTRL_INT_PERIOD_WDT2POW29 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW29 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW29 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW29 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW28 \ - ((uint32_t)0x3UL) /**< CTRL_INT_PERIOD_WDT2POW28 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW28 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW28 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW28 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW27 \ - ((uint32_t)0x4UL) /**< CTRL_INT_PERIOD_WDT2POW27 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW27 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW27 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW27 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW26 \ - ((uint32_t)0x5UL) /**< CTRL_INT_PERIOD_WDT2POW26 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW26 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW26 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW26 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW25 \ - ((uint32_t)0x6UL) /**< CTRL_INT_PERIOD_WDT2POW25 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW25 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW25 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW25 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW24 \ - ((uint32_t)0x7UL) /**< CTRL_INT_PERIOD_WDT2POW24 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW24 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW24 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW24 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW23 \ - ((uint32_t)0x8UL) /**< CTRL_INT_PERIOD_WDT2POW23 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW23 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW23 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW23 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW22 \ - ((uint32_t)0x9UL) /**< CTRL_INT_PERIOD_WDT2POW22 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW22 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW22 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW22 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW21 \ - ((uint32_t)0xAUL) /**< CTRL_INT_PERIOD_WDT2POW21 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW21 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW21 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW21 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW20 \ - ((uint32_t)0xBUL) /**< CTRL_INT_PERIOD_WDT2POW20 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW20 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW20 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW20 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW19 \ - ((uint32_t)0xCUL) /**< CTRL_INT_PERIOD_WDT2POW19 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW19 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW19 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW19 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW18 \ - ((uint32_t)0xDUL) /**< CTRL_INT_PERIOD_WDT2POW18 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW18 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW18 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW18 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW17 \ - ((uint32_t)0xEUL) /**< CTRL_INT_PERIOD_WDT2POW17 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW17 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW17 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW17 \ - Setting */ -#define MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW16 \ - ((uint32_t)0xFUL) /**< CTRL_INT_PERIOD_WDT2POW16 Value */ -#define MXC_S_WDT_CTRL_INT_PERIOD_WDT2POW16 \ - (MXC_V_WDT_CTRL_INT_PERIOD_WDT2POW16 \ - << MXC_F_WDT_CTRL_INT_PERIOD_POS) /**< CTRL_INT_PERIOD_WDT2POW16 \ - Setting */ - -#define MXC_F_WDT_CTRL_RST_PERIOD_POS 4 /**< CTRL_RST_PERIOD Position */ -#define MXC_F_WDT_CTRL_RST_PERIOD \ - ((uint32_t)( \ - 0xFUL << MXC_F_WDT_CTRL_RST_PERIOD_POS)) /**< CTRL_RST_PERIOD \ - Mask */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW31 \ - ((uint32_t)0x0UL) /**< CTRL_RST_PERIOD_WDT2POW31 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW31 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW31 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW31 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW30 \ - ((uint32_t)0x1UL) /**< CTRL_RST_PERIOD_WDT2POW30 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW30 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW30 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW30 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW29 \ - ((uint32_t)0x2UL) /**< CTRL_RST_PERIOD_WDT2POW29 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW29 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW29 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW29 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW28 \ - ((uint32_t)0x3UL) /**< CTRL_RST_PERIOD_WDT2POW28 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW28 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW28 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW28 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW27 \ - ((uint32_t)0x4UL) /**< CTRL_RST_PERIOD_WDT2POW27 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW27 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW27 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW27 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW26 \ - ((uint32_t)0x5UL) /**< CTRL_RST_PERIOD_WDT2POW26 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW26 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW26 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW26 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW25 \ - ((uint32_t)0x6UL) /**< CTRL_RST_PERIOD_WDT2POW25 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW25 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW25 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW25 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW24 \ - ((uint32_t)0x7UL) /**< CTRL_RST_PERIOD_WDT2POW24 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW24 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW24 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW24 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW23 \ - ((uint32_t)0x8UL) /**< CTRL_RST_PERIOD_WDT2POW23 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW23 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW23 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW23 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW22 \ - ((uint32_t)0x9UL) /**< CTRL_RST_PERIOD_WDT2POW22 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW22 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW22 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW22 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW21 \ - ((uint32_t)0xAUL) /**< CTRL_RST_PERIOD_WDT2POW21 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW21 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW21 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW21 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW20 \ - ((uint32_t)0xBUL) /**< CTRL_RST_PERIOD_WDT2POW20 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW20 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW20 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW20 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW19 \ - ((uint32_t)0xCUL) /**< CTRL_RST_PERIOD_WDT2POW19 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW19 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW19 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW19 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW18 \ - ((uint32_t)0xDUL) /**< CTRL_RST_PERIOD_WDT2POW18 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW18 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW18 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW18 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW17 \ - ((uint32_t)0xEUL) /**< CTRL_RST_PERIOD_WDT2POW17 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW17 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW17 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW17 \ - Setting */ -#define MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW16 \ - ((uint32_t)0xFUL) /**< CTRL_RST_PERIOD_WDT2POW16 Value */ -#define MXC_S_WDT_CTRL_RST_PERIOD_WDT2POW16 \ - (MXC_V_WDT_CTRL_RST_PERIOD_WDT2POW16 \ - << MXC_F_WDT_CTRL_RST_PERIOD_POS) /**< CTRL_RST_PERIOD_WDT2POW16 \ - Setting */ - -#define MXC_F_WDT_CTRL_WDT_EN_POS 8 /**< CTRL_WDT_EN Position */ -#define MXC_F_WDT_CTRL_WDT_EN \ - ((uint32_t)( \ - 0x1UL << MXC_F_WDT_CTRL_WDT_EN_POS)) /**< CTRL_WDT_EN Mask */ -#define MXC_V_WDT_CTRL_WDT_EN_DIS \ - ((uint32_t)0x0UL) /**< CTRL_WDT_EN_DIS Value */ -#define MXC_S_WDT_CTRL_WDT_EN_DIS \ - (MXC_V_WDT_CTRL_WDT_EN_DIS \ - << MXC_F_WDT_CTRL_WDT_EN_POS) /**< CTRL_WDT_EN_DIS Setting */ -#define MXC_V_WDT_CTRL_WDT_EN_EN \ - ((uint32_t)0x1UL) /**< CTRL_WDT_EN_EN Value \ - */ -#define MXC_S_WDT_CTRL_WDT_EN_EN \ - (MXC_V_WDT_CTRL_WDT_EN_EN \ - << MXC_F_WDT_CTRL_WDT_EN_POS) /**< CTRL_WDT_EN_EN Setting */ - -#define MXC_F_WDT_CTRL_INT_FLAG_POS 9 /**< CTRL_INT_FLAG Position */ -#define MXC_F_WDT_CTRL_INT_FLAG \ - ((uint32_t)( \ - 0x1UL \ - << MXC_F_WDT_CTRL_INT_FLAG_POS)) /**< CTRL_INT_FLAG Mask */ -#define MXC_V_WDT_CTRL_INT_FLAG_INACTIVE \ - ((uint32_t)0x0UL) /**< CTRL_INT_FLAG_INACTIVE Value */ -#define MXC_S_WDT_CTRL_INT_FLAG_INACTIVE \ - (MXC_V_WDT_CTRL_INT_FLAG_INACTIVE \ - << MXC_F_WDT_CTRL_INT_FLAG_POS) /**< CTRL_INT_FLAG_INACTIVE Setting \ - */ -#define MXC_V_WDT_CTRL_INT_FLAG_PENDING \ - ((uint32_t)0x1UL) /**< CTRL_INT_FLAG_PENDING Value */ -#define MXC_S_WDT_CTRL_INT_FLAG_PENDING \ - (MXC_V_WDT_CTRL_INT_FLAG_PENDING \ - << MXC_F_WDT_CTRL_INT_FLAG_POS) /**< CTRL_INT_FLAG_PENDING Setting */ - -#define MXC_F_WDT_CTRL_INT_EN_POS 10 /**< CTRL_INT_EN Position */ -#define MXC_F_WDT_CTRL_INT_EN \ - ((uint32_t)( \ - 0x1UL << MXC_F_WDT_CTRL_INT_EN_POS)) /**< CTRL_INT_EN Mask */ -#define MXC_V_WDT_CTRL_INT_EN_DIS \ - ((uint32_t)0x0UL) /**< CTRL_INT_EN_DIS Value */ -#define MXC_S_WDT_CTRL_INT_EN_DIS \ - (MXC_V_WDT_CTRL_INT_EN_DIS \ - << MXC_F_WDT_CTRL_INT_EN_POS) /**< CTRL_INT_EN_DIS Setting */ -#define MXC_V_WDT_CTRL_INT_EN_EN \ - ((uint32_t)0x1UL) /**< CTRL_INT_EN_EN Value \ - */ -#define MXC_S_WDT_CTRL_INT_EN_EN \ - (MXC_V_WDT_CTRL_INT_EN_EN \ - << MXC_F_WDT_CTRL_INT_EN_POS) /**< CTRL_INT_EN_EN Setting */ - -#define MXC_F_WDT_CTRL_RST_EN_POS 11 /**< CTRL_RST_EN Position */ -#define MXC_F_WDT_CTRL_RST_EN \ - ((uint32_t)( \ - 0x1UL << MXC_F_WDT_CTRL_RST_EN_POS)) /**< CTRL_RST_EN Mask */ -#define MXC_V_WDT_CTRL_RST_EN_DIS \ - ((uint32_t)0x0UL) /**< CTRL_RST_EN_DIS Value */ -#define MXC_S_WDT_CTRL_RST_EN_DIS \ - (MXC_V_WDT_CTRL_RST_EN_DIS \ - << MXC_F_WDT_CTRL_RST_EN_POS) /**< CTRL_RST_EN_DIS Setting */ -#define MXC_V_WDT_CTRL_RST_EN_EN \ - ((uint32_t)0x1UL) /**< CTRL_RST_EN_EN Value \ - */ -#define MXC_S_WDT_CTRL_RST_EN_EN \ - (MXC_V_WDT_CTRL_RST_EN_EN \ - << MXC_F_WDT_CTRL_RST_EN_POS) /**< CTRL_RST_EN_EN Setting */ - -#define MXC_F_WDT_CTRL_RST_FLAG_POS 31 /**< CTRL_RST_FLAG Position */ -#define MXC_F_WDT_CTRL_RST_FLAG \ - ((uint32_t)( \ - 0x1UL \ - << MXC_F_WDT_CTRL_RST_FLAG_POS)) /**< CTRL_RST_FLAG Mask */ -#define MXC_V_WDT_CTRL_RST_FLAG_NOEVENT \ - ((uint32_t)0x0UL) /**< CTRL_RST_FLAG_NOEVENT Value */ -#define MXC_S_WDT_CTRL_RST_FLAG_NOEVENT \ - (MXC_V_WDT_CTRL_RST_FLAG_NOEVENT \ - << MXC_F_WDT_CTRL_RST_FLAG_POS) /**< CTRL_RST_FLAG_NOEVENT Setting */ -#define MXC_V_WDT_CTRL_RST_FLAG_OCCURRED \ - ((uint32_t)0x1UL) /**< CTRL_RST_FLAG_OCCURRED Value */ -#define MXC_S_WDT_CTRL_RST_FLAG_OCCURRED \ - (MXC_V_WDT_CTRL_RST_FLAG_OCCURRED \ - << MXC_F_WDT_CTRL_RST_FLAG_POS) /**< CTRL_RST_FLAG_OCCURRED Setting \ - */ - -/** - * Watchdog Timer Reset Register. - */ -#define MXC_F_WDT_RST_WDT_RST_POS 0 /**< RST_WDT_RST Position */ -#define MXC_F_WDT_RST_WDT_RST \ - ((uint32_t)( \ - 0xFFUL << MXC_F_WDT_RST_WDT_RST_POS)) /**< RST_WDT_RST Mask */ -#define MXC_V_WDT_RST_WDT_RST_SEQ0 \ - ((uint32_t)0xA5UL) /**< RST_WDT_RST_SEQ0 Value */ -#define MXC_S_WDT_RST_WDT_RST_SEQ0 \ - (MXC_V_WDT_RST_WDT_RST_SEQ0 \ - << MXC_F_WDT_RST_WDT_RST_POS) /**< RST_WDT_RST_SEQ0 Setting */ -#define MXC_V_WDT_RST_WDT_RST_SEQ1 \ - ((uint32_t)0x5AUL) /**< RST_WDT_RST_SEQ1 Value */ -#define MXC_S_WDT_RST_WDT_RST_SEQ1 \ - (MXC_V_WDT_RST_WDT_RST_SEQ1 \ - << MXC_F_WDT_RST_WDT_RST_POS) /**< RST_WDT_RST_SEQ1 Setting */ - -#endif /* _WDT_REGS_H_ */ |