Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release

Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release

Relevant changes:

git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "stm32f_rtc": PASSED
     Test "panic_data_bloonchipper_v2.0.4277": PASSED
     Test "panic_data_bloonchipper_v2.0.5938": PASSED

Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3

1 files changed, 29 insertions, 33 deletions

diff --git a/chip/mchp/config_flash_layout.h b/chip/mchp/config_flash_layout.h
index caa1e204e0..f495f65465 100644
--- a/chip/mchp/config_flash_layout.h
+++ b/chip/mchp/config_flash_layout.h
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -16,8 +16,8 @@
 
 /* Non-memmory mapped, external SPI */
 #define CONFIG_EXTERNAL_STORAGE
-#undef  CONFIG_MAPPED_STORAGE
-#undef  CONFIG_FLASH_PSTATE
+#undef CONFIG_MAPPED_STORAGE
+#undef CONFIG_FLASH_PSTATE
 #define CONFIG_SPI_FLASH
 
 /*
@@ -33,32 +33,30 @@
  * EC_RO and EC_RW padded sizes from the build are 188KB each.
  * Storage size is 1/2 flash size.
  */
-#define CONFIG_EC_PROTECTED_STORAGE_OFF	0
+#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
 /* Lower 256KB of flash is protected region */
 #define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000
 /* Writable storage for EC_RW starts at 256KB */
 #define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
 /* Writeable storage is 256KB */
-#define CONFIG_EC_WRITABLE_STORAGE_SIZE  0x40000
-
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000
 
 /* Loader resides at the beginning of program memory */
-#define CONFIG_LOADER_MEM_OFF		0
-#define CONFIG_LOADER_SIZE		0x1000
+#define CONFIG_LOADER_MEM_OFF 0
+#define CONFIG_LOADER_SIZE 0x1000
 
 /* Write protect Loader and RO Image */
-#define CONFIG_WP_STORAGE_OFF		CONFIG_EC_PROTECTED_STORAGE_OFF
+#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
 /*
  * Write protect LFW + EC_RO
  */
-#define CONFIG_WP_STORAGE_SIZE		CONFIG_EC_PROTECTED_STORAGE_SIZE
+#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
 
 /*
  * RO / RW images follow the loader in program memory. Either RO or RW
  * image will be loaded -- both cannot be loaded at the same time.
  */
-#define CONFIG_RO_MEM_OFF		(CONFIG_LOADER_MEM_OFF + \
-					CONFIG_LOADER_SIZE)
+#define CONFIG_RO_MEM_OFF (CONFIG_LOADER_MEM_OFF + CONFIG_LOADER_SIZE)
 /*
  * Total SRAM and the amount allocated for data are specified
  * by CONFIG_MEC_SRAM_SIZE and CONFIG_RAM_SIZE in config_chip.h
@@ -69,20 +67,20 @@
  * and must be located on a erase block boundary. !!!
  */
 #if (CONFIG_MEC_SRAM_SIZE > CONFIG_EC_PROTECTED_STORAGE_SIZE)
-#define CONFIG_RO_SIZE			(CONFIG_EC_PROTECTED_STORAGE_SIZE - \
-					CONFIG_LOADER_SIZE - 0x2000)
+#define CONFIG_RO_SIZE \
+	(CONFIG_EC_PROTECTED_STORAGE_SIZE - CONFIG_LOADER_SIZE - 0x2000)
 #else
-#define CONFIG_RO_SIZE			(CONFIG_MEC_SRAM_SIZE - \
-					CONFIG_RAM_SIZE - CONFIG_LOADER_SIZE)
+#define CONFIG_RO_SIZE \
+	(CONFIG_MEC_SRAM_SIZE - CONFIG_RAM_SIZE - CONFIG_LOADER_SIZE)
 #endif
 
-#define CONFIG_RW_MEM_OFF		CONFIG_RO_MEM_OFF
+#define CONFIG_RW_MEM_OFF CONFIG_RO_MEM_OFF
 /*
  * NOTE: CONFIG_RW_SIZE is passed to the SPI image generation script by
  * chip build.mk
  * LFW requires CONFIG_RW_SIZE is equal to CONFIG_RO_SIZE !!!
  */
-#define CONFIG_RW_SIZE			CONFIG_RO_SIZE
+#define CONFIG_RW_SIZE CONFIG_RO_SIZE
 
 /*
  * WP region consists of first half of SPI containing TAGs at beginning
@@ -104,7 +102,7 @@
  * greater aligned boundaries.
  */
 
-#define CONFIG_RW_BOOT_HEADER_STORAGE_OFF	0
+#define CONFIG_RW_BOOT_HEADER_STORAGE_OFF 0
 #if defined(CHIP_FAMILY_MEC172X)
 /*
  * Changed to 0x140 original 0xc0 which is incorrect
@@ -123,33 +121,31 @@
  * 0x40000 - 0x7ffff = EC_RW padded with 0xFF
  * To EC the "header" is one 4KB chunk at offset 0
  */
-#define CONFIG_BOOT_HEADER_STORAGE_OFF		0
-#define CONFIG_BOOT_HEADER_STORAGE_SIZE     0x1000
+#define CONFIG_BOOT_HEADER_STORAGE_OFF 0
+#define CONFIG_BOOT_HEADER_STORAGE_SIZE 0x1000
 #elif defined(CHIP_FAMILY_MEC152X)
-#define CONFIG_BOOT_HEADER_STORAGE_OFF		0x1000
-#define CONFIG_BOOT_HEADER_STORAGE_SIZE		0x140
+#define CONFIG_BOOT_HEADER_STORAGE_OFF 0x1000
+#define CONFIG_BOOT_HEADER_STORAGE_SIZE 0x140
 #elif defined(CHIP_FAMILY_MEC170X)
-#define CONFIG_BOOT_HEADER_STORAGE_OFF		0x1000
-#define CONFIG_BOOT_HEADER_STORAGE_SIZE		0x80
+#define CONFIG_BOOT_HEADER_STORAGE_OFF 0x1000
+#define CONFIG_BOOT_HEADER_STORAGE_SIZE 0x80
 #else
 #error "FORCED BUILD ERROR: CHIP_FAMILY_xxxx not set or invalid"
 #endif
-#define CONFIG_RW_BOOT_HEADER_STORAGE_SIZE	0
+#define CONFIG_RW_BOOT_HEADER_STORAGE_SIZE 0
 
 /* Loader / lfw image immediately follows the boot header on SPI */
-#define CONFIG_LOADER_STORAGE_OFF	(CONFIG_BOOT_HEADER_STORAGE_OFF + \
-					CONFIG_BOOT_HEADER_STORAGE_SIZE)
+#define CONFIG_LOADER_STORAGE_OFF \
+	(CONFIG_BOOT_HEADER_STORAGE_OFF + CONFIG_BOOT_HEADER_STORAGE_SIZE)
 
 /* RO image immediately follows the loader image */
-#define CONFIG_RO_STORAGE_OFF		(CONFIG_LOADER_STORAGE_OFF + \
-					CONFIG_LOADER_SIZE)
+#define CONFIG_RO_STORAGE_OFF (CONFIG_LOADER_STORAGE_OFF + CONFIG_LOADER_SIZE)
 
 /*
  * RW image starts at offset 0 of second half of SPI.
  * RW Header not needed.
  */
-#define CONFIG_RW_STORAGE_OFF		(CONFIG_RW_BOOT_HEADER_STORAGE_OFF + \
-					CONFIG_RW_BOOT_HEADER_STORAGE_SIZE)
-
+#define CONFIG_RW_STORAGE_OFF \
+	(CONFIG_RW_BOOT_HEADER_STORAGE_OFF + CONFIG_RW_BOOT_HEADER_STORAGE_SIZE)
 
 #endif /* __CROS_EC_CONFIG_FLASH_LAYOUT_H */