diff options
author | Tom Hughes <tomhughes@chromium.org> | 2022-09-21 14:10:01 -0700 |
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committer | Tom Hughes <tomhughes@chromium.org> | 2022-09-22 12:49:33 -0700 |
commit | 2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch) | |
tree | fcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/mchp/lfw/ec_lfw.c | |
parent | e5fb0b9ba488614b5684e640530f00821ab7b943 (diff) | |
parent | 28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff) | |
download | chrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release
Relevant changes:
git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header
BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
Test "aes": PASSED
Test "cec": PASSED
Test "cortexm_fpu": PASSED
Test "crc": PASSED
Test "flash_physical": PASSED
Test "flash_write_protect": PASSED
Test "fpsensor_hw": PASSED
Test "fpsensor_spi_ro": PASSED
Test "fpsensor_spi_rw": PASSED
Test "fpsensor_uart_ro": PASSED
Test "fpsensor_uart_rw": PASSED
Test "mpu_ro": PASSED
Test "mpu_rw": PASSED
Test "mutex": PASSED
Test "pingpong": PASSED
Test "printf": PASSED
Test "queue": PASSED
Test "rollback_region0": PASSED
Test "rollback_region1": PASSED
Test "rollback_entropy": PASSED
Test "rtc": PASSED
Test "sha256": PASSED
Test "sha256_unrolled": PASSED
Test "static_if": PASSED
Test "stdlib": PASSED
Test "system_is_locked_wp_on": PASSED
Test "system_is_locked_wp_off": PASSED
Test "timer_dos": PASSED
Test "utils": PASSED
Test "utils_str": PASSED
Test "stm32f_rtc": PASSED
Test "panic_data_bloonchipper_v2.0.4277": PASSED
Test "panic_data_bloonchipper_v2.0.5938": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'chip/mchp/lfw/ec_lfw.c')
-rw-r--r-- | chip/mchp/lfw/ec_lfw.c | 75 |
1 files changed, 35 insertions, 40 deletions
diff --git a/chip/mchp/lfw/ec_lfw.c b/chip/mchp/lfw/ec_lfw.c index 6f34a33a8d..dfd9814e6e 100644 --- a/chip/mchp/lfw/ec_lfw.c +++ b/chip/mchp/lfw/ec_lfw.c @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -41,15 +41,16 @@ #define LFW_SPI_BYTE_TRANSFER_TIMEOUT_US (1 * MSEC) #define LFW_SPI_BYTE_TRANSFER_POLL_INTERVAL_US 100 -__attribute__ ((section(".intvector"))) +__attribute__((section(".intvector"))) const struct int_vector_t hdr_int_vect = { /* init sp, unused. set by MEC ROM loader */ - (void *)lfw_stack_top, /* preserve ROM log. was (void *)0x11FA00, */ - &lfw_main, /* was &lfw_main, */ /* reset vector */ - &fault_handler, /* NMI handler */ - &fault_handler, /* HardFault handler */ - &fault_handler, /* MPU fault handler */ - &fault_handler /* Bus fault handler */ + (void *)lfw_stack_top, /* preserve ROM log. was (void *)0x11FA00, */ + &lfw_main, + /* was &lfw_main, */ /* reset vector */ + &fault_handler, /* NMI handler */ + &fault_handler, /* HardFault handler */ + &fault_handler, /* MPU fault handler */ + &fault_handler /* Bus fault handler */ }; /* SPI devices - from board.c */ @@ -123,7 +124,6 @@ void timer_init(void) /* Start counting in timer 0 */ MCHP_TMR32_CTL(0) |= BIT(5); - } /* @@ -132,14 +132,11 @@ void timer_init(void) * before starting SPI read to minimize probability of * timer wrap. */ -static int spi_flash_readloc(uint8_t *buf_usr, - unsigned int offset, - unsigned int bytes) +static int spi_flash_readloc(uint8_t *buf_usr, unsigned int offset, + unsigned int bytes) { - uint8_t cmd[4] = {SPI_FLASH_READ, - (offset >> 16) & 0xFF, - (offset >> 8) & 0xFF, - offset & 0xFF}; + uint8_t cmd[4] = { SPI_FLASH_READ, (offset >> 16) & 0xFF, + (offset >> 8) & 0xFF, offset & 0xFF }; if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) return EC_ERROR_INVAL; @@ -156,8 +153,8 @@ static int spi_flash_readloc(uint8_t *buf_usr, */ int spi_image_load(uint32_t offset) { - uint8_t *buf = (uint8_t *) (CONFIG_RW_MEM_OFF + - CONFIG_PROGRAM_MEMORY_BASE); + uint8_t *buf = + (uint8_t *)(CONFIG_RW_MEM_OFF + CONFIG_PROGRAM_MEMORY_BASE); uint32_t i; #ifdef CONFIG_MCHP_LFW_DEBUG uint32_t crc_calc, crc_exp; @@ -172,13 +169,11 @@ int spi_image_load(uint32_t offset) for (i = 0; i < CONFIG_RO_SIZE; i += SPI_CHUNK_SIZE) #ifdef CONFIG_MCHP_LFW_DEBUG rc = spi_flash_readloc(&buf[i], offset + i, SPI_CHUNK_SIZE); - if (rc != EC_SUCCESS) { - trace2(0, LFW, 0, - "spi_flash_readloc block %d ret = %d", - i, rc); - while (MCHP_PCR_PROC_CLK_CTL) - MCHP_PCR_CHIP_OSC_ID &= 0x1FE; - } + if (rc != EC_SUCCESS) { + trace2(0, LFW, 0, "spi_flash_readloc block %d ret = %d", i, rc); + while (MCHP_PCR_PROC_CLK_CTL) + MCHP_PCR_CHIP_OSC_ID &= 0x1FE; + } #else spi_flash_readloc(&buf[i], offset + i, SPI_CHUNK_SIZE); #endif @@ -234,7 +229,7 @@ timestamp_t get_time(void) { timestamp_t ts; - ts.le.hi = 0; /* clksrc_high; */ + ts.le.hi = 0; /* clksrc_high; */ ts.le.lo = __hw_clock_source_read(); return ts; } @@ -297,11 +292,17 @@ void uart_init(void) gpio_config_module(MODULE_UART, 1); } #else -void uart_write_c(char c __attribute__((unused))) {} +void uart_write_c(char c __attribute__((unused))) +{ +} -void uart_puts(const char *str __attribute__((unused))) {} +void uart_puts(const char *str __attribute__((unused))) +{ +} -void uart_init(void) {} +void uart_init(void) +{ +} #endif /* #ifdef CONFIG_UART_CONSOLE */ void fault_handler(void) @@ -312,12 +313,11 @@ void fault_handler(void) MCHP_PCR_SYS_RST = MCHP_PCR_SYS_SOFT_RESET; while (1) ; - } void jump_to_image(uintptr_t init_addr) { - void (*resetvec)(void) = (void(*)(void))init_addr; + void (*resetvec)(void) = (void (*)(void))init_addr; resetvec(); } @@ -329,16 +329,13 @@ void jump_to_image(uintptr_t init_addr) void system_init(void) { uint32_t wdt_sts = MCHP_VBAT_STS & MCHP_VBAT_STS_ANY_RST; - uint32_t rst_sts = MCHP_PCR_PWR_RST_STS & - MCHP_PWR_RST_STS_SYS; + uint32_t rst_sts = MCHP_PCR_PWR_RST_STS & MCHP_PWR_RST_STS_SYS; - trace12(0, LFW, 0, - "VBAT_STS = 0x%08x PCR_PWR_RST_STS = 0x%08x", + trace12(0, LFW, 0, "VBAT_STS = 0x%08x PCR_PWR_RST_STS = 0x%08x", wdt_sts, rst_sts); if (rst_sts || wdt_sts) - MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX) - = EC_IMAGE_UNKNOWN; + MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX) = EC_IMAGE_UNKNOWN; } enum ec_image system_get_image_copy(void) @@ -346,7 +343,6 @@ enum ec_image system_get_image_copy(void) return MCHP_VBAT_RAM(MCHP_IMAGETYPE_IDX); } - /* * lfw_main is entered by MEC BootROM or EC_RO/RW calling it directly. * NOTE: Based on LFW from MEC1322 @@ -360,11 +356,10 @@ enum ec_image system_get_image_copy(void) */ void lfw_main(void) { - uintptr_t init_addr; /* install vector table */ - *((uintptr_t *) 0xe000ed08) = (uintptr_t) &hdr_int_vect; + *((uintptr_t *)0xe000ed08) = (uintptr_t)&hdr_int_vect; /* Use 48 MHz processor clock to power through boot */ MCHP_PCR_PROC_CLK_CTL = 1; |