diff options
author | Divya Jyothi <divya.jyothi@intel.com> | 2015-05-14 10:11:13 -0700 |
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committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-06-14 22:18:34 +0000 |
commit | b99f00b7f974faec2329f21100f72e0a332be1f2 (patch) | |
tree | c7602436bf5724e9dc841edb12caca752339c017 /chip/mec1322/config_chip.h | |
parent | 5ea69a7b3b06d8877fc0d420a6892b1db42cd290 (diff) | |
download | chrome-ec-stabilize-7173.B.tar.gz |
mec1322: Added support for sysjump.stabilize-7173.B
changes added to support flashrom are:
sysjump support to be able to copy the RO/RW image
and jump to it without causing AP to reboot while
its alreday ON.
LPC init should be reinitialized on sysjump
corrected gpio_set_flags_by_mask to make sure we
update the register only for GPIO_LOW condition and not
all else conditions.
BUG=chrome-os-partner:38103
TEST=commands : flashrom -p ec -w ec.bin
flashrom -p ec -r ec.bin
BRANCH=none
Change-Id: I23892f0378d756052030e73034c3acdd41477e34
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/272000
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'chip/mec1322/config_chip.h')
-rw-r--r-- | chip/mec1322/config_chip.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h index 49131ec243..8257b03d32 100644 --- a/chip/mec1322/config_chip.h +++ b/chip/mec1322/config_chip.h @@ -156,12 +156,8 @@ which contains Loader and RO Images */ #define CONFIG_RW_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \ CONFIG_RW_STORAGE_OFF) -/* Memory Lcation shared between lfw and RO /RW image */ -#define SHARED_RAM_LFW_RORW (CONFIG_MEC_SRAM_BASE_START + \ - (CONFIG_LOADER_SIZE - 4)) - /* Non-memmapped, external SPI */ -/* #define CONFIG_CODERAM_ARCH */ +#define CONFIG_CODERAM_ARCH #undef CONFIG_FLASH_MAPPED #undef CONFIG_FLASH_PSTATE #define CONFIG_SPI_FLASH |