diff options
author | Tom Hughes <tomhughes@chromium.org> | 2022-09-21 14:10:01 -0700 |
---|---|---|
committer | Tom Hughes <tomhughes@chromium.org> | 2022-09-22 12:49:33 -0700 |
commit | 2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch) | |
tree | fcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/mt_scp/mt818x/memmap.c | |
parent | e5fb0b9ba488614b5684e640530f00821ab7b943 (diff) | |
parent | 28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff) | |
download | chrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz |
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release
Relevant changes:
git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh
ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header
BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
Test "aes": PASSED
Test "cec": PASSED
Test "cortexm_fpu": PASSED
Test "crc": PASSED
Test "flash_physical": PASSED
Test "flash_write_protect": PASSED
Test "fpsensor_hw": PASSED
Test "fpsensor_spi_ro": PASSED
Test "fpsensor_spi_rw": PASSED
Test "fpsensor_uart_ro": PASSED
Test "fpsensor_uart_rw": PASSED
Test "mpu_ro": PASSED
Test "mpu_rw": PASSED
Test "mutex": PASSED
Test "pingpong": PASSED
Test "printf": PASSED
Test "queue": PASSED
Test "rollback_region0": PASSED
Test "rollback_region1": PASSED
Test "rollback_entropy": PASSED
Test "rtc": PASSED
Test "sha256": PASSED
Test "sha256_unrolled": PASSED
Test "static_if": PASSED
Test "stdlib": PASSED
Test "system_is_locked_wp_on": PASSED
Test "system_is_locked_wp_off": PASSED
Test "timer_dos": PASSED
Test "utils": PASSED
Test "utils_str": PASSED
Test "stm32f_rtc": PASSED
Test "panic_data_bloonchipper_v2.0.4277": PASSED
Test "panic_data_bloonchipper_v2.0.5938": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'chip/mt_scp/mt818x/memmap.c')
-rw-r--r-- | chip/mt_scp/mt818x/memmap.c | 86 |
1 files changed, 41 insertions, 45 deletions
diff --git a/chip/mt_scp/mt818x/memmap.c b/chip/mt_scp/mt818x/memmap.c index 6d8f2b0c87..0ecb370cf3 100644 --- a/chip/mt_scp/mt818x/memmap.c +++ b/chip/mt_scp/mt818x/memmap.c @@ -1,4 +1,4 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. +/* Copyright 2018 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -12,6 +12,7 @@ #include "memmap.h" #include "registers.h" #include "util.h" +#include "task.h" /* * Map SCP address (bits 31~28) to AP address @@ -34,13 +35,13 @@ #define MAP_INVALID 0xff static const uint8_t addr_map[16] = { - MAP_INVALID, /* 0x0: SRAM */ - MAP_INVALID, /* 0x1: Cached access (see below) */ - 0x4, 0x5, /* 0x2-0x3 */ - MAP_INVALID, MAP_INVALID, /* 0x4-0x5 (unmapped: registers) */ - 0x6, 0x7, 0x8, /* 0x6-0x8 */ - 0x0, 0x1, 0x2, 0x3, /* 0x9-0xc */ - 0x1, 0xa, 0x9 /* 0xd-0xf */ + MAP_INVALID, /* 0x0: SRAM */ + MAP_INVALID, /* 0x1: Cached access (see below) */ + 0x4, 0x5, /* 0x2-0x3 */ + MAP_INVALID, MAP_INVALID, /* 0x4-0x5 (unmapped: registers) */ + 0x6, 0x7, 0x8, /* 0x6-0x8 */ + 0x0, 0x1, 0x2, 0x3, /* 0x9-0xc */ + 0x1, 0xa, 0x9 /* 0xd-0xf */ }; /* @@ -49,8 +50,6 @@ static const uint8_t addr_map[16] = { */ #define CACHE_TRANS_AP_ADDR 0x50000000 #define CACHE_TRANS_SCP_CACHE_ADDR 0x10000000 -/* FIXME: This should be configurable */ -#define CACHE_TRANS_AP_SIZE 0x00400000 #ifdef CONFIG_DRAM_BASE BUILD_ASSERT(CONFIG_DRAM_BASE_LOAD == CACHE_TRANS_AP_ADDR); @@ -60,16 +59,14 @@ BUILD_ASSERT(CONFIG_DRAM_BASE == CACHE_TRANS_SCP_CACHE_ADDR); static void cpu_invalidate_icache(void) { SCP_CACHE_OP(CACHE_ICACHE) &= ~SCP_CACHE_OP_OP_MASK; - SCP_CACHE_OP(CACHE_ICACHE) |= - OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; + SCP_CACHE_OP(CACHE_ICACHE) |= OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; asm volatile("dsb; isb"); } void cpu_invalidate_dcache(void) { SCP_CACHE_OP(CACHE_DCACHE) &= ~SCP_CACHE_OP_OP_MASK; - SCP_CACHE_OP(CACHE_DCACHE) |= - OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; + SCP_CACHE_OP(CACHE_DCACHE) |= OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; /* Read is necessary to confirm the invalidation finish. */ REG32(CACHE_TRANS_SCP_CACHE_ADDR); asm volatile("dsb;"); @@ -80,6 +77,8 @@ void cpu_invalidate_dcache_range(uintptr_t base, unsigned int length) size_t pos; uintptr_t addr; + interrupt_disable(); + for (pos = 0; pos < length; pos += SCP_CACHE_LINE_SIZE) { addr = base + pos; SCP_CACHE_OP(CACHE_DCACHE) = addr & SCP_CACHE_OP_TADDR_MASK; @@ -88,17 +87,18 @@ void cpu_invalidate_dcache_range(uintptr_t base, unsigned int length) /* Read necessary to confirm the invalidation finish. */ REG32(addr); } + asm volatile("dsb;"); + interrupt_enable(); } void cpu_clean_invalidate_dcache(void) { SCP_CACHE_OP(CACHE_DCACHE) &= ~SCP_CACHE_OP_OP_MASK; - SCP_CACHE_OP(CACHE_DCACHE) |= - OP_CACHE_FLUSH_ALL_LINES | SCP_CACHE_OP_EN; + SCP_CACHE_OP(CACHE_DCACHE) |= OP_CACHE_FLUSH_ALL_LINES | + SCP_CACHE_OP_EN; SCP_CACHE_OP(CACHE_DCACHE) &= ~SCP_CACHE_OP_OP_MASK; - SCP_CACHE_OP(CACHE_DCACHE) |= - OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; + SCP_CACHE_OP(CACHE_DCACHE) |= OP_INVALIDATE_ALL_LINES | SCP_CACHE_OP_EN; /* Read necessary to confirm the invalidation finish. */ REG32(CACHE_TRANS_SCP_CACHE_ADDR); asm volatile("dsb;"); @@ -109,6 +109,7 @@ void cpu_clean_invalidate_dcache_range(uintptr_t base, unsigned int length) size_t pos; uintptr_t addr; + interrupt_disable(); for (pos = 0; pos < length; pos += SCP_CACHE_LINE_SIZE) { addr = base + pos; SCP_CACHE_OP(CACHE_DCACHE) = addr & SCP_CACHE_OP_TADDR_MASK; @@ -120,7 +121,9 @@ void cpu_clean_invalidate_dcache_range(uintptr_t base, unsigned int length) /* Read necessary to confirm the invalidation finish. */ REG32(addr); } + asm volatile("dsb;"); + interrupt_enable(); } static void scp_cache_init(void) @@ -137,8 +140,8 @@ static void scp_cache_init(void) * should only be be configured in kernel driver before * laoding the firmware. b/137920815#comment18 */ - SCP_CACHE_CON(c) &= (SCP_CACHE_CON_CACHESIZE_MASK | - SCP_CACHE_CON_WAYEN); + SCP_CACHE_CON(c) &= + (SCP_CACHE_CON_CACHESIZE_MASK | SCP_CACHE_CON_WAYEN); SCP_CACHE_REGION_EN(c) = 0; SCP_CACHE_ENTRY(c, region) = 0; SCP_CACHE_END_ENTRY(c, region) = 0; @@ -164,7 +167,7 @@ static void scp_cache_init(void) /* Disable sleep protect */ SCP_SLP_PROTECT_CFG = SCP_SLP_PROTECT_CFG & - ~(P_CACHE_SLP_PROT_EN | D_CACHE_SLP_PROT_EN); + ~(P_CACHE_SLP_PROT_EN | D_CACHE_SLP_PROT_EN); /* Enable region 0 for both I-cache and D-cache. */ for (c = 0; c < CACHE_COUNT; c++) { @@ -186,16 +189,16 @@ static void scp_cache_init(void) cpu_invalidate_dcache(); } -static int command_cacheinfo(int argc, char **argv) +static int command_cacheinfo(int argc, const char **argv) { - const char cache_name[] = {'I', 'D'}; + const char cache_name[] = { 'I', 'D' }; int c; for (c = 0; c < 2; c++) { uint64_t hit = ((uint64_t)SCP_CACHE_HCNT0U(c) << 32) | - SCP_CACHE_HCNT0L(c); + SCP_CACHE_HCNT0L(c); uint64_t access = ((uint64_t)SCP_CACHE_CCNT0U(c) << 32) | - SCP_CACHE_CCNT0L(c); + SCP_CACHE_CCNT0L(c); ccprintf("%ccache hit count: %llu\n", cache_name[c], hit); ccprintf("%ccache access count: %llu\n", cache_name[c], access); @@ -203,8 +206,7 @@ static int command_cacheinfo(int argc, char **argv) return EC_SUCCESS; } -DECLARE_SAFE_CONSOLE_COMMAND(cacheinfo, command_cacheinfo, - NULL, +DECLARE_SAFE_CONSOLE_COMMAND(cacheinfo, command_cacheinfo, NULL, "Dump cache info"); void scp_memmap_init(void) @@ -221,11 +223,9 @@ void scp_memmap_init(void) * EXT_ADDR1[13:8] remap register for addr msb 31~28 equal to 0x3 * EXT_ADDR0[5:0] remap register for addr msb 31~28 equal to 0x2 */ - SCP_REMAP_CFG1 = - (uint32_t)addr_map[0x7] << 24 | - (uint32_t)addr_map[0x6] << 16 | - (uint32_t)addr_map[0x3] << 8 | - (uint32_t)addr_map[0x2]; + SCP_REMAP_CFG1 = (uint32_t)addr_map[0x7] << 24 | + (uint32_t)addr_map[0x6] << 16 | + (uint32_t)addr_map[0x3] << 8 | (uint32_t)addr_map[0x2]; /* * SCP_REMAP_CFG2 @@ -234,11 +234,9 @@ void scp_memmap_init(void) * EXT_ADDR5[13:8] remap register for addr msb 31~28 equal to 0x9 * EXT_ADDR4[5:0] remap register for addr msb 31~28 equal to 0x8 */ - SCP_REMAP_CFG2 = - (uint32_t)addr_map[0xb] << 24 | - (uint32_t)addr_map[0xa] << 16 | - (uint32_t)addr_map[0x9] << 8 | - (uint32_t)addr_map[0x8]; + SCP_REMAP_CFG2 = (uint32_t)addr_map[0xb] << 24 | + (uint32_t)addr_map[0xa] << 16 | + (uint32_t)addr_map[0x9] << 8 | (uint32_t)addr_map[0x8]; /* * SCP_REMAP_CFG3 * AUD_ADDR[31:28] remap register for addr msb 31~28 equal to 0xd @@ -246,11 +244,9 @@ void scp_memmap_init(void) * EXT_ADDR9[13:8] remap register for addr msb 31~28 equal to 0xe * EXT_ADDR8[5:0] remap register for addr msb 31~28 equal to 0xc */ - SCP_REMAP_CFG3 = - (uint32_t)addr_map[0xd] << 28 | - (uint32_t)addr_map[0xf] << 16 | - (uint32_t)addr_map[0xe] << 8 | - (uint32_t)addr_map[0xc]; + SCP_REMAP_CFG3 = (uint32_t)addr_map[0xd] << 28 | + (uint32_t)addr_map[0xf] << 16 | + (uint32_t)addr_map[0xe] << 8 | (uint32_t)addr_map[0xc]; /* Initialize cache remapping. */ scp_cache_init(); @@ -266,7 +262,7 @@ int memmap_ap_to_scp(uintptr_t ap_addr, uintptr_t *scp_addr) continue; *scp_addr = (ap_addr & SCP_REMAP_ADDR_LSB_MASK) | - (i << SCP_REMAP_ADDR_SHIFT); + (i << SCP_REMAP_ADDR_SHIFT); return EC_SUCCESS; } @@ -281,7 +277,7 @@ int memmap_scp_to_ap(uintptr_t scp_addr, uintptr_t *ap_addr) return EC_ERROR_INVAL; *ap_addr = (scp_addr & SCP_REMAP_ADDR_LSB_MASK) | - (addr_map[i] << SCP_REMAP_ADDR_SHIFT); + (addr_map[i] << SCP_REMAP_ADDR_SHIFT); return EC_SUCCESS; } @@ -310,7 +306,7 @@ int memmap_scp_cache_to_ap(uintptr_t scp_addr, uintptr_t *ap_addr) uintptr_t lsb; if ((scp_addr & SCP_L1_EXT_ADDR_OTHER_MSB_MASK) != - CACHE_TRANS_SCP_CACHE_ADDR) + CACHE_TRANS_SCP_CACHE_ADDR) return EC_ERROR_INVAL; lsb = scp_addr & SCP_L1_EXT_ADDR_OTHER_LSB_MASK; |