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authorTom Hughes <tomhughes@chromium.org>2022-09-21 14:10:01 -0700
committerTom Hughes <tomhughes@chromium.org>2022-09-22 12:49:33 -0700
commit2bcf863b492fe7ed8105c853814dba6ed32ba719 (patch)
treefcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/mt_scp/mt8192/intc.h
parente5fb0b9ba488614b5684e640530f00821ab7b943 (diff)
parent28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff)
downloadchrome-ec-firmware-fpmcu-bloonchipper-release.tar.gz
Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release
Generated by: ./util/update_release_branch.py --board bloonchipper --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware- fpmcu-bloonchipper-release Relevant changes: git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint util/getversion.sh ded9307b79 util/getversion.sh: Fix version when not in a git repo 956055e692 board: change Google USB vendor info 71b2ef709d Update license boilerplate text in source code files 33e11afda0 Revert "fpsensor: Build fpsensor source file with C++" c8d0360723 fpsensor: Build fpsensor source file with C++ bc113abd53 fpsensor: Fix g++ compiler error 150a58a0dc fpsensor: Fix fp_set_sensor_mode return type b33b5ce85b fpsensor: Remove nested designators for C++ compatibility 2e864b2539 tree-wide: const-ify argv for console commands 56d8b360f9 test: Add test for get ikm failure when seed not set 3a3d6c3690 test: Add test for fpsensor trivial key failure 233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256 0a041b285b docs/fingerprint: Typo correction c03fab67e2 docs/fingerprint: Fix the path of fputils.py 0b5d4baf5a util/getversion.sh: Fix empty file list handling 6e128fe760 FPMCU dev board environment with Satlab 3eb29b6aa5 builtin: Move ssize_t to sys/types.h 345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release c25ffdb316 common: Conditionally support printf %l and %i modifiers 9a3c514b45 test: Add a test to check if the debugger is connected 54e603413f Move standard library tests to their own file 43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release 25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format 4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format 738de2b575 trng: Rename rand to trng_rand 14b8270edd docs/fingerprint: Update dragonclaw power numbers 0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format 5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format 6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format 7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format 21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format 98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format 73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format 0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format 1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format dc3e9008b8 board/hatch_fp/board.h: Format with clang-format dca9d74321 Revert "trng: Rename rand to trng_rand" a6b0b3554f trng: Rename rand to trng_rand 28d0b75b70 third_party/boringssl: Remove unused header BRANCH=None BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210 BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908 BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158 BUG=b:234781655 b:215613183 b:242720910 TEST=`make -j buildall` TEST=./test/run_device_tests.py --board bloonchipper Test "aes": PASSED Test "cec": PASSED Test "cortexm_fpu": PASSED Test "crc": PASSED Test "flash_physical": PASSED Test "flash_write_protect": PASSED Test "fpsensor_hw": PASSED Test "fpsensor_spi_ro": PASSED Test "fpsensor_spi_rw": PASSED Test "fpsensor_uart_ro": PASSED Test "fpsensor_uart_rw": PASSED Test "mpu_ro": PASSED Test "mpu_rw": PASSED Test "mutex": PASSED Test "pingpong": PASSED Test "printf": PASSED Test "queue": PASSED Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Test "rtc": PASSED Test "sha256": PASSED Test "sha256_unrolled": PASSED Test "static_if": PASSED Test "stdlib": PASSED Test "system_is_locked_wp_on": PASSED Test "system_is_locked_wp_off": PASSED Test "timer_dos": PASSED Test "utils": PASSED Test "utils_str": PASSED Test "stm32f_rtc": PASSED Test "panic_data_bloonchipper_v2.0.4277": PASSED Test "panic_data_bloonchipper_v2.0.5938": PASSED Force-Relevant-Builds: all Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3
Diffstat (limited to 'chip/mt_scp/mt8192/intc.h')
-rw-r--r--chip/mt_scp/mt8192/intc.h182
1 files changed, 91 insertions, 91 deletions
diff --git a/chip/mt_scp/mt8192/intc.h b/chip/mt_scp/mt8192/intc.h
index 63eb1243b3..6c1d3c549c 100644
--- a/chip/mt_scp/mt8192/intc.h
+++ b/chip/mt_scp/mt8192/intc.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,120 +7,120 @@
#define __CROS_EC_INTC_H
/* INTC */
-#define SCP_INTC_IRQ_POL0 0xef001f20
-#define SCP_INTC_IRQ_POL1 0x0800001d
-#define SCP_INTC_IRQ_POL2 0x00000020
-#define SCP_INTC_GRP_LEN 3
-#define SCP_INTC_IRQ_COUNT 96
+#define SCP_INTC_IRQ_POL0 0xef001f20
+#define SCP_INTC_IRQ_POL1 0x0800001d
+#define SCP_INTC_IRQ_POL2 0x00000020
+#define SCP_INTC_GRP_LEN 3
+#define SCP_INTC_IRQ_COUNT 96
/* IRQ numbers */
-#define SCP_IRQ_GIPC_IN0 0
-#define SCP_IRQ_GIPC_IN1 1
-#define SCP_IRQ_GIPC_IN2 2
-#define SCP_IRQ_GIPC_IN3 3
+#define SCP_IRQ_GIPC_IN0 0
+#define SCP_IRQ_GIPC_IN1 1
+#define SCP_IRQ_GIPC_IN2 2
+#define SCP_IRQ_GIPC_IN3 3
/* 4 */
-#define SCP_IRQ_SPM 4
-#define SCP_IRQ_AP_CIRQ 5
-#define SCP_IRQ_EINT 6
-#define SCP_IRQ_PMIC 7
+#define SCP_IRQ_SPM 4
+#define SCP_IRQ_AP_CIRQ 5
+#define SCP_IRQ_EINT 6
+#define SCP_IRQ_PMIC 7
/* 8 */
-#define SCP_IRQ_UART0_TX 8
-#define SCP_IRQ_UART1_TX 9
-#define SCP_IRQ_I2C0 10
-#define SCP_IRQ_I2C1_0 11
+#define SCP_IRQ_UART0_TX 8
+#define SCP_IRQ_UART1_TX 9
+#define SCP_IRQ_I2C0 10
+#define SCP_IRQ_I2C1_0 11
/* 12 */
-#define SCP_IRQ_BUS_DBG_TRACKER 12
-#define SCP_IRQ_CLK_CTRL 13
-#define SCP_IRQ_VOW 14
-#define SCP_IRQ_TIMER0 15
+#define SCP_IRQ_BUS_DBG_TRACKER 12
+#define SCP_IRQ_CLK_CTRL 13
+#define SCP_IRQ_VOW 14
+#define SCP_IRQ_TIMER0 15
/* 16 */
-#define SCP_IRQ_TIMER1 16
-#define SCP_IRQ_TIMER2 17
-#define SCP_IRQ_TIMER3 18
-#define SCP_IRQ_TIMER4 19
+#define SCP_IRQ_TIMER1 16
+#define SCP_IRQ_TIMER2 17
+#define SCP_IRQ_TIMER3 18
+#define SCP_IRQ_TIMER4 19
/* 20 */
-#define SCP_IRQ_TIMER5 20
-#define SCP_IRQ_OS_TIMER 21
-#define SCP_IRQ_UART0_RX 22
-#define SCP_IRQ_UART1_RX 23
+#define SCP_IRQ_TIMER5 20
+#define SCP_IRQ_OS_TIMER 21
+#define SCP_IRQ_UART0_RX 22
+#define SCP_IRQ_UART1_RX 23
/* 24 */
-#define SCP_IRQ_GDMA 24
-#define SCP_IRQ_AUDIO 25
-#define SCP_IRQ_MD_DSP 26
-#define SCP_IRQ_ADSP 27
+#define SCP_IRQ_GDMA 24
+#define SCP_IRQ_AUDIO 25
+#define SCP_IRQ_MD_DSP 26
+#define SCP_IRQ_ADSP 27
/* 28 */
-#define SCP_IRQ_CPU_TICK 28
-#define SCP_IRQ_SPI0 29
-#define SCP_IRQ_SPI1 30
-#define SCP_IRQ_SPI2 31
+#define SCP_IRQ_CPU_TICK 28
+#define SCP_IRQ_SPI0 29
+#define SCP_IRQ_SPI1 30
+#define SCP_IRQ_SPI2 31
/* 32 */
-#define SCP_IRQ_NEW_INFRA_SYS_CIRQ 32
-#define SCP_IRQ_DBG 33
-#define SCP_IRQ_CCIF0 34
-#define SCP_IRQ_CCIF1 35
+#define SCP_IRQ_NEW_INFRA_SYS_CIRQ 32
+#define SCP_IRQ_DBG 33
+#define SCP_IRQ_CCIF0 34
+#define SCP_IRQ_CCIF1 35
/* 36 */
-#define SCP_IRQ_CCIF2 36
-#define SCP_IRQ_WDT 37
-#define SCP_IRQ_USB0 38
-#define SCP_IRQ_USB1 39
+#define SCP_IRQ_CCIF2 36
+#define SCP_IRQ_WDT 37
+#define SCP_IRQ_USB0 38
+#define SCP_IRQ_USB1 39
/* 40 */
-#define SCP_IRQ_DPMAIF 40
-#define SCP_IRQ_INFRA 41
-#define SCP_IRQ_CLK_CTRL_CORE 42
-#define SCP_IRQ_CLK_CTRL2_CORE 43
+#define SCP_IRQ_DPMAIF 40
+#define SCP_IRQ_INFRA 41
+#define SCP_IRQ_CLK_CTRL_CORE 42
+#define SCP_IRQ_CLK_CTRL2_CORE 43
/* 44 */
-#define SCP_IRQ_CLK_CTRL2 44
-#define SCP_IRQ_GIPC_IN4 45 /* HALT */
-#define SCP_IRQ_PERIBUS_TIMEOUT 46
-#define SCP_IRQ_INFRABUS_TIMEOUT 47
+#define SCP_IRQ_CLK_CTRL2 44
+#define SCP_IRQ_GIPC_IN4 45 /* HALT */
+#define SCP_IRQ_PERIBUS_TIMEOUT 46
+#define SCP_IRQ_INFRABUS_TIMEOUT 47
/* 48 */
-#define SCP_IRQ_MET0 48
-#define SCP_IRQ_MET1 49
-#define SCP_IRQ_MET2 50
-#define SCP_IRQ_MET3 51
+#define SCP_IRQ_MET0 48
+#define SCP_IRQ_MET1 49
+#define SCP_IRQ_MET2 50
+#define SCP_IRQ_MET3 51
/* 52 */
-#define SCP_IRQ_AP_WDT 52
-#define SCP_IRQ_L2TCM_SEC_VIO 53
-#define SCP_IRQ_CPU_TICK1 54
-#define SCP_IRQ_MAD_DATAIN 55
+#define SCP_IRQ_AP_WDT 52
+#define SCP_IRQ_L2TCM_SEC_VIO 53
+#define SCP_IRQ_CPU_TICK1 54
+#define SCP_IRQ_MAD_DATAIN 55
/* 56 */
-#define SCP_IRQ_I3C0_IBI_WAKE 56
-#define SCP_IRQ_I3C1_IBI_WAKE 57
-#define SCP_IRQ_I3C2_IBI_WAKE 58
-#define SCP_IRQ_APU_ENGINE 59
+#define SCP_IRQ_I3C0_IBI_WAKE 56
+#define SCP_IRQ_I3C1_IBI_WAKE 57
+#define SCP_IRQ_I3C2_IBI_WAKE 58
+#define SCP_IRQ_APU_ENGINE 59
/* 60 */
-#define SCP_IRQ_MBOX0 60
-#define SCP_IRQ_MBOX1 61
-#define SCP_IRQ_MBOX2 62
-#define SCP_IRQ_MBOX3 63
+#define SCP_IRQ_MBOX0 60
+#define SCP_IRQ_MBOX1 61
+#define SCP_IRQ_MBOX2 62
+#define SCP_IRQ_MBOX3 63
/* 64 */
-#define SCP_IRQ_MBOX4 64
-#define SCP_IRQ_SYS_CLK_REQ 65
-#define SCP_IRQ_BUS_REQ 66
-#define SCP_IRQ_APSRC_REQ 67
+#define SCP_IRQ_MBOX4 64
+#define SCP_IRQ_SYS_CLK_REQ 65
+#define SCP_IRQ_BUS_REQ 66
+#define SCP_IRQ_APSRC_REQ 67
/* 68 */
-#define SCP_IRQ_APU_MBOX 68
-#define SCP_IRQ_DEVAPC_SECURE_VIO 69
+#define SCP_IRQ_APU_MBOX 68
+#define SCP_IRQ_DEVAPC_SECURE_VIO 69
/* 72 */
/* 76 */
-#define SCP_IRQ_I2C1_2 78
-#define SCP_IRQ_I2C2 79
+#define SCP_IRQ_I2C1_2 78
+#define SCP_IRQ_I2C2 79
/* 80 */
-#define SCP_IRQ_AUD2AUDIODSP 80
-#define SCP_IRQ_AUD2AUDIODSP_2 81
-#define SCP_IRQ_CONN2ADSP_A2DPOL 82
-#define SCP_IRQ_CONN2ADSP_BTCVSD 83
+#define SCP_IRQ_AUD2AUDIODSP 80
+#define SCP_IRQ_AUD2AUDIODSP_2 81
+#define SCP_IRQ_CONN2ADSP_A2DPOL 82
+#define SCP_IRQ_CONN2ADSP_BTCVSD 83
/* 84 */
-#define SCP_IRQ_CONN2ADSP_BLEISO 84
-#define SCP_IRQ_PCIE2ADSP 85
-#define SCP_IRQ_APU2ADSP_ENGINE 86
-#define SCP_IRQ_APU2ADSP_MBOX 87
+#define SCP_IRQ_CONN2ADSP_BLEISO 84
+#define SCP_IRQ_PCIE2ADSP 85
+#define SCP_IRQ_APU2ADSP_ENGINE 86
+#define SCP_IRQ_APU2ADSP_MBOX 87
/* 88 */
-#define SCP_IRQ_CCIF3 88
-#define SCP_IRQ_I2C_DMA0 89
-#define SCP_IRQ_I2C_DMA1 90
-#define SCP_IRQ_I2C_DMA2 91
+#define SCP_IRQ_CCIF3 88
+#define SCP_IRQ_I2C_DMA0 89
+#define SCP_IRQ_I2C_DMA1 90
+#define SCP_IRQ_I2C_DMA2 91
/* 92 */
-#define SCP_IRQ_I2C_DMA3 92
+#define SCP_IRQ_I2C_DMA3 92
#endif /* __CROS_EC_INTC_H */